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1. 发明申请

US20110037520A1 MULTISTAGE AMPLIFYING CIRCUIT 有权
标题翻译：多级放大电路
公开(公告)号：US20110037520A1
公开(公告)日：2011-02-17
申请号：US12841558
申请日：2010-07-22
申请人： MICHAEL CHOI , Ho-jin Park , Eun-seok Shin , Kyoung-jun Moon , Seung-hoon Lee , Kyung-hoon Lee , Young-ju Kim , Se-won Lee , Beom-soo Park
发明人： MICHAEL CHOI , Ho-jin Park , Eun-seok Shin , Kyoung-jun Moon , Seung-hoon Lee , Kyung-hoon Lee , Young-ju Kim , Se-won Lee , Beom-soo Park
IPC分类号： H03F3/68
CPC分类号： H03F3/45179 , H03F3/68 , H03F3/72
摘要： A multistage amplifying circuit includes a first amplifying circuit that either samples a first analog voltage input or amplifies a difference between the first analog voltage and a first digital voltage converted from the first analog voltage, in response to a control signal. A second amplifying circuit either samples a second analog voltage input or amplifies a difference between the second analog voltage and a second digital voltage converted from the second analog voltage, in response to the control signal. A common amplifier receives output voltages of the first amplifying circuit and the second amplifying circuit and either resets the output voltage of the first amplifying circuit and determines an output voltage by using the second amplifying circuit, or resets the output voltage of the second amplifying circuit and determines an output voltage by using the first amplifying circuit, in response to the control signal.
摘要翻译：多级放大电路包括：第一放大电路，其响应于控制信号，对第一模拟电压输入进行采样或放大第一模拟电压与从第一模拟电压转换的第一数字电压之间的差。第二放大电路响应于控制信号对第二模拟电压输入进行采样或放大第二模拟电压与从第二模拟电压转换的第二数字电压之间的差。公共放大器接收第一放大电路和第二放大电路的输出电压，并且复位第一放大电路的输出电压，并通过使用第二放大电路确定输出电压，或者复位第二放大电路的输出电压，以及响应于控制信号，通过使用第一放大电路确定输出电压。

2. 发明授权

US08026759B2 Multistage amplifying circuit 有权
标题翻译：多级放大电路
公开(公告)号：US08026759B2
公开(公告)日：2011-09-27
申请号：US12841558
申请日：2010-07-22
申请人： Michael Choi , Ho-jin Park , Eun-seok Shin , Kyoung-jun Moon , Seung-hoon Lee , Kyung-hoon Lee , Young-ju Kim , Se-won Lee , Beom-soo Park
发明人： Michael Choi , Ho-jin Park , Eun-seok Shin , Kyoung-jun Moon , Seung-hoon Lee , Kyung-hoon Lee , Young-ju Kim , Se-won Lee , Beom-soo Park
IPC分类号： H03F1/02
CPC分类号： H03F3/45179 , H03F3/68 , H03F3/72
摘要： A multistage amplifying circuit includes a first amplifying circuit that either samples a first analog voltage input or amplifies a difference between the first analog voltage and a first digital voltage converted from the first analog voltage, in response to a control signal. A second amplifying circuit either samples a second analog voltage input or amplifies a difference between the second analog voltage and a second digital voltage converted from the second analog voltage, in response to the control signal. A common amplifier receives output voltages of the first amplifying circuit and the second amplifying circuit and either resets the output voltage of the first amplifying circuit and determines an output voltage by using the second amplifying circuit, or resets the output voltage of the second amplifying circuit and determines an output voltage by using the first amplifying circuit, in response to the control signal.
摘要翻译：多级放大电路包括：第一放大电路，其响应于控制信号，对第一模拟电压输入进行采样或放大第一模拟电压与从第一模拟电压转换的第一数字电压之间的差。第二放大电路响应于控制信号对第二模拟电压输入进行采样或放大第二模拟电压与从第二模拟电压转换的第二数字电压之间的差。公共放大器接收第一放大电路和第二放大电路的输出电压，并且复位第一放大电路的输出电压，并通过使用第二放大电路确定输出电压，或者复位第二放大电路的输出电压，以及响应于控制信号，通过使用第一放大电路确定输出电压。

3. 外观设计

USD633126S1 Visual presenter 有权
公开(公告)号：USD633126S1
公开(公告)日：2011-02-22
申请号：US29357922
申请日：2010-03-19
申请人： Ho-jin Park
设计人： Ho-jin Park

4. 发明授权

US5983375A Multi-bit test circuit and method thereof 失效
标题翻译：多位测试电路及其方法
公开(公告)号：US5983375A
公开(公告)日：1999-11-09
申请号：US766116
申请日：1996-12-16
申请人： Hong Kim , Ho-jin Park , Jong-hyun Kim , Jeon Hwangbo
发明人： Hong Kim , Ho-jin Park , Jong-hyun Kim , Jeon Hwangbo
IPC分类号： G11C29/34 , G11C29/10 , G11C29/28 , G11C29/00
CPC分类号： G11C29/28
摘要： A multi-bit data block testing circuit and method thereof are described. The semiconductor memory device includes a multi-bit data block testing circuit for testing adjacent cell blocks using any one pattern selected from the same data pattern and a different data pattern during a multi-bit test mode. The multi-bit data block testing circuit further comprises a comparator operatively coupled to receive a data signal from each of the adjacent cell blocks. A multi-bit data block input source is interconnected with the multi-bit data block testing circuit via an input port and provides the data patterns during the multi-test mode. A multi-bit data block output receiver is interconnected with the multi-bit data block testing circuit via an output port and receives a test result indication from the comparator of the multi-bit data block testing circuit.
摘要翻译：描述了一种多位数据块测试电路及其方法。半导体存储器件包括多位数据块测试电路，用于在多位测试模式期间使用从相同数据模式和不同数据模式中选出的任何一种模式测试相邻单元块。该多比特数据块测试电路还包括可操作地耦合以从每个相邻小区块接收数据信号的比较器。多位数据块输入源通过输入端口与多位数据块测试电路互连，并在多测试模式下提供数据模式。多位数据块输出接收器经由输出端口与多位数据块测试电路互连，并从多位数据块测试电路的比较器接收测试结果指示。

5. 外观设计

USD651633S1 Wireless monitoring camera 有权
标题翻译：无线监控摄像机
公开(公告)号：USD651633S1
公开(公告)日：2012-01-03
申请号：US29384656
申请日：2011-02-02
申请人： Ho-jin Park , Joo-bok Kim
设计人： Ho-jin Park , Joo-bok Kim

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