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1. 发明申请

US20060267146A1 Multilayered emitter window for bipolar junction transistor 审中-公开
标题翻译：双极结晶体管的多层发射极窗口
公开(公告)号：US20060267146A1
公开(公告)日：2006-11-30
申请号：US11436390
申请日：2006-05-18
申请人： Noel Hoilien , Kyeonglan Rho , Daniel Fertig , Steven Kosier
发明人： Noel Hoilien , Kyeonglan Rho , Daniel Fertig , Steven Kosier
IPC分类号： H01L27/082 , H01L27/102
CPC分类号： H01L29/732 , H01L29/0804 , H01L29/66272
摘要： An emitter window for a bipolar junction transistor includes a first emitter window layer adjacent to and in contact with a base region, a second emitter window layer adjacent to and in contact with the first layer and a third emitter window layer adjacent to and in contact with the second layer.
摘要翻译：用于双极结型晶体管的发射极窗口包括与基极区域相邻并与其接触的第一发射极窗口层，与第一层相邻并与其接触的第二发射极窗口层和与第一发射极层相邻并与之接触的第三发射极窗口层第二层。

2. 发明申请

US20060270165A1 Multi-layered spacer for lightly-doped drain MOSFETS 审中-公开
标题翻译：用于轻掺杂漏极MOSFET的多层间隔物
公开(公告)号：US20060270165A1
公开(公告)日：2006-11-30
申请号：US11436879
申请日：2006-05-18
申请人： Kyeonglan Rho , Noel Hoilien , Daniel Fertig , Steven Kosier
发明人： Kyeonglan Rho , Noel Hoilien , Daniel Fertig , Steven Kosier
IPC分类号： H01L21/336 , H01L29/76
CPC分类号： H01L22/26 , H01L29/66272 , H01L29/6656 , H01L31/02161
摘要： A spacer for a lightly-doped drain MOSFET includes a first spacer layer adjacent to and in contact with a gate region and a lightly-doped region, a second spacer layer adjacent to and in contact with the first layer and a third spacer layer adjacent to and in contact with the second layer.
摘要翻译：用于轻掺杂漏极MOSFET的间隔物包括与栅极区域和轻掺杂区域相邻并与其接触的第一间隔层，与第一层相邻并与第一层接触的第二间隔层和与第一间隔层相邻的第三间隔层并与第二层接触。

3. 发明申请

US20110147865A1 INTEGRATED HYBRID HALL EFFECT TRANSDUCER 有权
标题翻译：集成混合霍尔效应传感器
公开(公告)号：US20110147865A1
公开(公告)日：2011-06-23
申请号：US12642338
申请日：2009-12-18
申请人： David Erie , Noel Hoilien , Steven Kosier
发明人： David Erie , Noel Hoilien , Steven Kosier
IPC分类号： H01L43/06 , H01L43/14
CPC分类号： H01L43/065 , H01L43/14
摘要： A Hall effect transducer in a semiconductor wafer comprises a first layer of semiconducting material, a second layer of semiconducting material, and a contact structure configured to provide a path for electrical current to pass through the second layer. The second layer has higher electron hole mobility than the first layer, and is epitaxially grown atop the first layer.
摘要翻译：半导体晶片中的霍尔效应传感器包括第一层半导体材料，第二层半导体材料和接触结构，其被配置为提供用于电流通过第二层的路径。第二层比第一层具有更高的电子空穴迁移率，并且在第一层顶部外延生长。

4. 发明授权

US08736003B2 Integrated hybrid hall effect transducer 有权
标题翻译：综合混合霍尔效应传感器
公开(公告)号：US08736003B2
公开(公告)日：2014-05-27
申请号：US12642338
申请日：2009-12-18
申请人： David Erie , Noel Hoilien , Steven Kosier
发明人： David Erie , Noel Hoilien , Steven Kosier
IPC分类号： H01L29/82
CPC分类号： H01L43/065 , H01L43/14
摘要： A Hall effect transducer in a semiconductor wafer comprises a first layer of semiconducting material, a second layer of semiconducting material, and a contact structure configured to provide a path for electrical current to pass through the second layer. The second layer has higher electron hole mobility than the first layer, and is epitaxially grown atop the first layer.
摘要翻译：半导体晶片中的霍尔效应传感器包括第一层半导体材料，第二层半导体材料和接触结构，其被配置为提供用于电流通过第二层的路径。第二层比第一层具有更高的电子空穴迁移率，并且在第一层顶部外延生长。

5. 发明授权

US08461661B2 Locos nitride capping of deep trench polysilicon fill 有权
标题翻译：深沟槽多晶硅填料的氮化物覆盖
公开(公告)号：US08461661B2
公开(公告)日：2013-06-11
申请号：US12418819
申请日：2009-04-06
申请人： Noel Hoilien
发明人： Noel Hoilien
IPC分类号： H01L21/70
CPC分类号： H01L21/763 , H01L21/76235
摘要： A polysilicon-filled isolation trench in a substrate is effective to isolate adjacent semiconductor devices from one another. A silicon nitride cap is provided to protect the polysilicon in the isolation trench from subsequent field oxidation. The cap has lateral boundaries that extend between the side boundaries of the polysilicon and the sidewalls of the trench. Subsequent field oxide regions formed adjacent to the trench establish a gap dimension from the substrate to a top surface of the field oxide regions adjacent to the polysilicon side boundaries that is no less than half of the field oxide thickness.
摘要翻译：衬底中的多晶硅填充隔离沟槽有效地隔离相邻的半导体器件。提供氮化硅盖以保护隔离沟槽中的多晶硅免于随后的场氧化。盖具有在多晶硅的侧边界和沟槽的侧壁之间延伸的横向边界。随后形成的与沟槽相邻形成的场氧化物区域形成从衬底到与多晶硅边界相邻的场氧化物区域的顶表面的间隙尺寸，其不小于场氧化物厚度的一半。

6. 发明申请

US20100252905A1 LOCOS NITRIDE CAPPING OF DEEP TRENCH POLYSILICON FILL 有权
标题翻译：深层渗透聚硅氧烷膜的LOCOS氮化物填充
公开(公告)号：US20100252905A1
公开(公告)日：2010-10-07
申请号：US12418819
申请日：2009-04-06
申请人： Noel Hoilien
发明人： Noel Hoilien
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L21/763 , H01L21/76235
摘要： A polysilicon-filled isolation trench in a substrate is effective to isolate adjacent semiconductor devices from one another. A silicon nitride cap is provided to protect the polysilicon in the isolation trench from subsequent field oxidation. The cap has lateral boundaries that extend between the side boundaries of the polysilicon and the sidewalls of the trench. Subsequent field oxide regions formed adjacent to the trench establish a gap dimension from the substrate to a top surface of the field oxide regions adjacent to the polysilicon side boundaries that is no less than half of the field oxide thickness.
摘要翻译：衬底中的多晶硅填充隔离沟槽有效地隔离相邻的半导体器件。提供氮化硅盖以保护隔离沟槽中的多晶硅免于随后的场氧化。盖具有在多晶硅的侧边界和沟槽的侧壁之间延伸的横向边界。随后形成的与沟槽相邻形成的场氧化物区域形成从衬底到与多晶硅边界相邻的场氧化物区域的顶表面的间隙尺寸，其不小于场氧化物厚度的一半。

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