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1. 发明授权

US5788509A Audio connector card for baby-at motherboard in a personal computer/server 失效
标题翻译：用于婴儿的音频连接器卡，用于个人计算机/服务器中的主板
公开(公告)号：US5788509A
公开(公告)日：1998-08-04
申请号：US745491
申请日：1996-11-12
申请人： Kirk Byers , Jerald N. Hall , Ravi Nagaraj , Peter Ward
发明人： Kirk Byers , Jerald N. Hall , Ravi Nagaraj , Peter Ward
IPC分类号： G06F1/18 , G06F13/40 , H01R12/50 , H01R13/719 , H05K1/02 , H05K1/14 , H01R9/09
CPC分类号： G06F1/185 , G06F1/184 , G06F1/186 , G06F13/409 , H05K1/0231 , H01R12/722 , H01R13/719 , H05K1/0215 , H05K1/0219 , H05K1/14 , H05K2201/0715 , H05K2201/10189 , H05K2201/10522
摘要： A computer having a motherboard housed in a chassis having a bottom panel and a rear panel perpendicular to the bottom panel. The rear panel has a cutout therein. The motherboard is secured to the chassis in parallel with the bottom panel. The motherboard has a socket and the audio card is mounted in the socket perpendicular to the motherboard. The audio card has connectors, such as audio line-in, line-out, microphone, speaker power and game port, mounted perpendicular to the audio card such that the connectors are aligned with the cutout in the rear panel. The audio card is grounded to the chassis with an electromagnetic interference (EMI) gasket contoured to the cutout.
摘要翻译：具有容纳在具有底板的底盘中的母板的计算机和垂直于底板的后面板。后面板上有一个切口。主板与底板平行地固定在底盘上。主板有一个插座，音频卡安装在垂直于主板的插槽中。音频卡具有垂直于音频卡安装的连接器，例如音频线路输入，线路输出，麦克风，扬声器电源和游戏端口，使得连接器与后面板中的切口对齐。音频卡通过电磁干扰（EMI）垫片接地到机箱，并将其封闭。

2. 发明授权

US06256731B1 Method and apparatus for setting the operating parameters of a computer system 有权
标题翻译：用于设置计算机系统的操作参数的方法和装置
公开(公告)号：US06256731B1
公开(公告)日：2001-07-03
申请号：US09440150
申请日：1999-11-15
申请人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
发明人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
IPC分类号： G06F900
CPC分类号： G06F9/4401 , G06F11/1433 , G06F13/10 , G06F13/4068
摘要： An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio. The bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.
摘要翻译：一种装置包括配置选择器，其被选择性地配置为表示该设备的多种操作模式中的一种，包括配置模式。该装置还包括可编程多路复用器，处理器，总线和存储介质，其中存储有配置为以多种操作模式中的任一种操作的基本输入/输出系统（BIOS），其包括配置模式，其中BIOS 便于用户编程设备的多个操作参数。响应于配置选择器，可编程多路复用器断言当配置选择器配置为表示配置操作模式时，可以用于形成设备的多个处理器和总线公共的默认总线/内核比。耦合到存储介质和可编程多路复用器的处理器以与断言的总线/内核比率一致的速度操作以执行BIOS。耦合到可编程多路复用器，处理器和存储介质的总线，以与断言的总线/内核比率一致的速度来操作以向处理器（包括BIOS）提供指令和数据。

3. 发明授权

US6101319A Method and apparatus for the automatic configuration of strapping options on a circuit board assembly 失效
公开(公告)号：US6101319A
公开(公告)日：2000-08-08
申请号：US778308
申请日：1997-01-02
申请人： Jerald N. Hall
发明人： Jerald N. Hall
IPC分类号： G06F11/00 , G06F11/22 , G01R31/28 , G11C29/00
CPC分类号： G06F11/2289 , G06F11/006
摘要： A tenant processor module is shown comprising a processor core, a plurality of strapping devices, and an input bus. The plurality of strapping devices are configured to indicate configuration information to a receiving circuit board assembly coupled to the processor module. The input bus, coupled to the processor core, receives the configuration information back from the circuit board assembly and provides them to the processor core at a first time. At a second time, the input bus receives operational data from the circuit board assembly and provides them to the processor core.

4. 发明授权

US5968140A System for configuring a device where stored configuration information is asserted at a first time and external operational data is asserted at a second time 失效
标题翻译：用于配置设备的系统，其中存储的配置信息在第一时间被断言，并且外部操作数据在第二时间被断言
公开(公告)号：US5968140A
公开(公告)日：1999-10-19
申请号：US778304
申请日：1997-01-02
申请人： Jerald N. Hall
发明人： Jerald N. Hall
IPC分类号： G06F9/445 , G06F11/14 , G06F13/10 , G06F13/40 , G06F13/12
CPC分类号： G06F9/4401 , G06F11/1433 , G06F13/10 , G06F13/4068
摘要： A programmable configuration selector is provided to an apparatus having at least one configurable device. The programmable configuration selector comprises a non-volatile memory having at least one storage register for storing configuration information corresponding to the at least one configurable device, and a multiplexer driver. The multiplexer driver comprises at least one output port coupled to the at least one configurable device, for asserting configuration information, received from the non-volatile memory, on the at least one output port to configure the at least one configurable device at a first time, and for asserting operational data, received from a data bus, on the at least one output port to the at least one configurable device at a second time.
摘要翻译：可编程配置选择器被提供给具有至少一个可配置装置的装置。可编程配置选择器包括具有至少一个用于存储与至少一个可配置设备相对应的配置信息的至少一个存储寄存器的非易失性存储器和多路复用器驱动器。所述多路复用器驱动器包括耦合到所述至少一个可配置设备的至少一个输出端口，用于断言在所述至少一个输出端口上从所述非易失性存储器接收的配置信息，以在第一时间配置所述至少一个可配置设备并且在第二时间将从数据总线接收的操作数据断言在至少一个输出端口上至少一个可配置设备。

5. 发明授权

US06434632B1 Method and apparatus for the automatic configuration of strapping options on a circuit board assembly 失效
标题翻译：用于在电路板组件上自动配置捆扎选项的方法和装置
公开(公告)号：US06434632B1
公开(公告)日：2002-08-13
申请号：US09439945
申请日：1999-11-12
申请人： Jerald N. Hall
发明人： Jerald N. Hall
IPC分类号： G06F1314
CPC分类号： G06F11/2289 , G06F11/006
摘要： A tenant processor module is shown comprising a processor core, a plurality of strapping devices, and an input bus. The plurality of strapping devices are configured to indicate configuration information to a receiving circuit board assembly coupled to the processor module. The input bus, coupled to the processor core, receives the configuration information back from the circuit board assembly and provides them to the processor core at a first time. At a second time, the input bus receives operational data from the circuit board assembly and provides them to the processor core.
摘要翻译：显示的租户处理器模块包括处理器核心，多个捆扎设备和输入总线。多个捆扎装置被配置为向耦合到处理器模块的接收电路板组件指示配置信息。耦合到处理器核心的输入总线从电路板组件接收配置信息，并在第一时间将其提供给处理器内核。第二次，输入总线从电路板组件接收操作数据并将其提供给处理器核心。

6. 发明授权

US6047373A Method and apparatus for setting the operating parameters of a computer system 失效
标题翻译：用于设置计算机系统的操作参数的方法和装置
公开(公告)号：US6047373A
公开(公告)日：2000-04-04
申请号：US940636
申请日：1997-09-30
申请人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
发明人： Jerald N. Hall , Orville H. Christeson , Mike Kinion , Sean R. Babcock , Frank L. Wildgrube , Frank E. LeClerg , John Yuratovac
IPC分类号： G06F9/445 , G06F11/14 , G06F13/10 , G06F13/40 , G06F9/00 , G06F9/44
CPC分类号： G06F9/4401 , G06F11/1433 , G06F13/10 , G06F13/4068
摘要： An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio. The bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.
摘要翻译：一种装置包括配置选择器，其被选择性地配置为表示该设备的多种操作模式中的一种，包括配置模式。该装置还包括可编程多路复用器，处理器，总线和存储介质，其中存储有配置为以多种操作模式中的任一种操作的基本输入/输出系统（BIOS），包括其中BIOS 便于用户编程设备的多个操作参数。响应于配置选择器，可编程多路复用器断言当配置选择器配置为表示配置操作模式时，可以用于形成设备的多个处理器和总线公共的默认总线/内核比。耦合到存储介质和可编程多路复用器的处理器以与断言的总线/内核比率一致的速度操作以执行BIOS。耦合到可编程多路复用器，处理器和存储介质的总线，以与断言的总线/内核比率一致的速度来操作以向处理器（包括BIOS）提供指令和数据。

7. 发明授权

US6020751A Method and apparatus for stress testing of a circuit board assembly 失效
标题翻译：电路板组件的应力测试方法和装置
公开(公告)号：US6020751A
公开(公告)日：2000-02-01
申请号：US778291
申请日：1997-01-02
申请人： Thomas A. Rampone , Jerald N. Hall
发明人： Thomas A. Rampone , Jerald N. Hall
IPC分类号： G06F11/24 , G01R31/26
CPC分类号： G06F11/24
摘要： A method and apparatus for testing a circuit board is disclosed. An apparatus having at least one clock source for providing a circuit board with a clock signal at a dynamically selected frequency, a storage medium storing programming instructions to control the clock source(s) to provide the clock signal at the dynamically selected frequency including a frequency that exceeds the specified operating range of frequencies for the circuit board, and for implementing parametric testing of the circuit board, and an execution unit coupled to the clock source and to the storage medium for executing the programming instructions. The programming instructions for implementing the parametric testing of the circuit board include instructions for testing the circuit board while the circuit board is supplied with the clock signal at the frequency that exceeds the operating frequency of the circuit board, thereby stressing the circuit board. The programming instructions cause the one or more clock sources to gradually increase the dynamically selected clock signal frequency to the frequency that exceeds the operating frequency of the circuit board.
摘要翻译：公开了一种用于测试电路板的方法和装置。一种具有至少一个时钟源的装置，用于向电路板提供动态选择的频率的时钟信号;存储编程指令的存储介质，用于控制时钟源以提供动态选择的频率的时钟信号，包括频率超过电路板的规定的工作频率范围，以及用于实现电路板的参数测试，以及耦合到时钟源和执行编程指令的存储介质的执行单元。用于实现电路板的参数测试的编程指令包括用于测试电路板的指令，同时以超过电路板工作频率的频率向电路板提供时钟信号，从而强调电路板。编程指令使一个或多个时钟源逐渐将动态选择的时钟信号频率增加到超过电路板工作频率的频率。

8. 发明授权

US5802074A Method and apparatus for the non-invasive testing of printed circuit board assemblies 失效
标题翻译：用于印刷电路板组件的非侵入性测试的方法和装置
公开(公告)号：US5802074A
公开(公告)日：1998-09-01
申请号：US715857
申请日：1996-09-19
申请人： Jerald N. Hall
发明人： Jerald N. Hall
IPC分类号： G06F11/22 , H05K1/00
CPC分类号： G06F11/2289
摘要： A method and apparatus for the non-invasive testing of printed circuit board assemblies is described herein. In a first embodiment, an apparatus for testing circuit board assemblies includes a plurality of configuration selectors, a first plurality of ports, a first plurality of traces corresponding to the plurality of configuration selectors and coupled between the configuration selectors and the ports, and a second plurality of traces coupled to the first plurality of traces. In operation, the first plurality of ports place electrical signals of a first state on the first plurality of traces at a first time, and a second state at a second time. While each of the electrical signals are applied to the configuration selector via the first plurality of traces, the second plurality of traces receives associated output from the corresponding plurality of configuration selectors at the first time and the second time, wherein misconfigured or malfunctioning ones of the plurality of configuration selectors are identified.
摘要翻译：本文描述了用于印刷电路板组件的非侵入性测试的方法和装置。在第一实施例中，用于测试电路板组件的装置包括多个配置选择器，第一多个端口，对应于多个配置选择器并耦合在配置选择器和端口之间的第一多个轨迹，以及第二耦合到第一多个迹线的多个迹线。在操作中，第一多个端口在第一时间将第一状态的电信号放置在第一多个迹线上，并且在第二时间将第二状态置于第二状态。虽然每个电信号经由第一多个迹线被施加到配置选择器，但是第二多个迹线在第一时间和第二时间从相应的多个配置选择器接收相关联的输出，其中错误配置或故障的识别多个配置选择器。

9. 发明授权

US5796639A Method and apparatus for verifying the installation of strapping devices on a circuit board assembly 失效
标题翻译：用于验证电路板组件上的捆扎装置的安装的方法和装置
公开(公告)号：US5796639A
公开(公告)日：1998-08-18
申请号：US778305
申请日：1997-01-02
申请人： Jerald N. Hall
发明人： Jerald N. Hall
IPC分类号： G06F11/22 , G01R31/28
CPC分类号： G06F11/2289
摘要： An apparatus for verifying the installation of strapping devices on a circuit board assembly includes a plurality of strapping devices coupled to a plurality of configurable devices, an output port coupled to the plurality of strapping devices, and a plurality of input ports, coupled to the plurality of strapping devices with a corresponding first plurality of traces each having an associated pull-up resistor tied to a positive voltage level. The output port is adapted to output electrical signals of a first state at a first time and a second state at a second time to each of the plurality of strapping devices. The plurality of input ports receive the associated output signal from the plurality of strapping devices at each of the first time and the second time via the corresponding first plurality of traces, wherein unconfigured or malfunctioning ones of the plurality of strapping devices are identified.
摘要翻译：用于验证电路板组件上的捆扎装置的安装的装置包括耦合到多个可配置装置的多个捆扎装置，耦合到多个捆扎装置的输出端口以及耦合到多个捆扎装置的多个输入端口的捆扎装置具有相应的第一多个迹线，每个迹线具有连接到正电压电平的相关联的上拉电阻。输出端口适于将第一时间的第一状态的电信号和第二时间的第二状态的电信号输出到多个捆扎装置中的每一个。多个输入端口经由相应的第一多个迹线在第一时间和第二时间的每一个处从多个捆扎装置接收相关联的输出信号，其中识别出多个捆扎装置中的未配置或故障的捆扎装置。

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