专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5713578A Hydraulic sealing device 失效
标题翻译：液压密封装置
公开(公告)号：US5713578A
公开(公告)日：1998-02-03
申请号：US659260
申请日：1996-06-06
申请人： Kiminobu Terao , Kouji Ueda , Mayumi Takada , Kenji Amano
发明人： Kiminobu Terao , Kouji Ueda , Mayumi Takada , Kenji Amano
IPC分类号： F16J15/18 , F16J9/16 , F16J15/16 , F16J15/48 , F16J15/46
CPC分类号： F16L27/087 , F16J15/164 , F16J15/3272
摘要： One end of a seal ring retained in a seal ring groove is formed in such a manner that it is offset radially inwardly from the other end, so that oil is permitted to leak by opening an abutment joint formed by the two ends in a condition in which no hydraulic pressure is applied. If a hydraulic pressure is supplied to bring a hydraulic actuator into an engaged state, the one end of the seal ring is deformed radially outwardly by the hydraulic pressure to come into close contact with a sealing surface and to close the abutment joint, thereby preventing the oil from-leaking past the oil ring. Consequently, upon engagement of the hydraulic actuator, a sealing property or salability of the oil can be assured, and upon releasing of the engagement of the hydraulic actuator, an oil leaking property of the seal ring can be provided, leaking property of the oil can be provided, thereby enhancing the responsiveness of the hydraulic actuator.
摘要翻译：保持在密封环槽中的密封环的一端形成为从另一端向径向向内偏移的方式形成，从而通过在两端的状态下打开由两端形成的抵接接头而允许油泄漏没有施加液压。如果供给液压以使液压致动器进入接合状态，则密封环的一端由于液压而径向向外变形，以与密封面紧密接触并且闭合邻接接头，从而防止油通过油环泄漏。因此，在液压致动器接合时，能够确保油的密封性或油性，在解除液压致动器的卡合时，能够提供密封环的漏油特性，油罐的泄漏性能从而提高液压致动器的响应性。

2. 发明授权

US5941534A Hydraulic seal system 失效
标题翻译：液压密封系统
公开(公告)号：US5941534A
公开(公告)日：1999-08-24
申请号：US542082
申请日：1995-10-12
申请人： Kiminobu Terao , Kouji Ueda , Yorinori Kumagai , Takamichi Shimada , Kenji Amano , Toshio Oka , Junya Nagai
发明人： Kiminobu Terao , Kouji Ueda , Yorinori Kumagai , Takamichi Shimada , Kenji Amano , Toshio Oka , Junya Nagai
IPC分类号： F16J15/16 , F16J15/40
CPC分类号： F16J15/164
摘要： A hydraulic seal system includes a seal ring groove and a seal ring mounted in the seal ring groove. The seal ring and seal ring groove are rotatable relative to each other, and have sealing sides, respectively, which are put into pressure contact with each other by a sealing hydraulic pressure. The seal ring is made of a synthetic resin to have a fixed elasticity. The sealing side of the seal ring is formed into a convex curved surface with its radially central portion raised, so that when a hydraulic pressure is applied, the sealing side can be compressedly deformed to define a hydraulic pocket. Thus, the formation and retaining of an oil film at the pressure contact portions of the sealing sides is promoted.
摘要翻译：液压密封系统包括密封环槽和安装在密封环槽中的密封环。密封环和密封环槽相对于彼此可旋转，并且分别具有通过密封液压彼此压力接触的密封侧。密封环由合成树脂制成，具有固定的弹性。密封环的密封侧形成为凸起的曲面，其中心部分升高，使得当施加液压时，密封侧可被压缩变形以限定液压袋。因此，促进了在密封侧的压力接触部分处的油膜的形成和保持。

3. 发明授权

US07348659B2 Semiconductor device and method of manufacturing thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07348659B2
公开(公告)日：2008-03-25
申请号：US10878226
申请日：2004-06-29
申请人： Kenji Amano , Atsushi Fujisawa , Hajime Hasebe
发明人： Kenji Amano , Atsushi Fujisawa , Hajime Hasebe
IPC分类号： H01L23/495
CPC分类号： H01L23/3107 , H01L23/49548 , H01L24/48 , H01L2224/32014 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor chip is mounted on a tab, leads alternately arranged around the tab are electrically connected to electrodes of the semiconductor chip via bonding wires, and encapsulating resin encapsulates the semiconductor chip and bonding wires. The lower surfaces of the leads are exposed at the outer periphery of the back surface of the encapsulating resin to form external terminals. The lower surfaces of the leads are exposed at the back surface of the encapsulating resin located inwardly of the lower exposed surface of the leads to form external terminals. The cut surfaces of the leads are exposed at the cut surfaces of the encapsulating resin, while upper exposed surfaces of the leads are exposed from the encapsulating resin portion which is proximate to the cut surfaces thereof. Each of the upper exposed surfaces of the leads has a width smaller than the width of each of the lower exposed surfaces.
摘要翻译：半导体芯片安装在突片上，交替布置在突片周围的引线通过接合线电连接到半导体芯片的电极，封装树脂封装半导体芯片和接合线。引线的下表面在封装树脂的背面的外周露出，形成外部端子。引线的下表面在位于引线的下暴露表面内侧的封装树脂的背面处露出，以形成外部端子。引线的切割表面在封装树脂的切割表面处露出，而引线的上暴露表面从接近其切割表面的封装树脂部分露出。引线的每个上暴露表面的宽度小于每个下暴露表面的宽度。

4. 发明申请

US20060240599A1 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20060240599A1
公开(公告)日：2006-10-26
申请号：US11409014
申请日：2006-04-24
申请人： Kenji Amano , Hajime Hasebe
发明人： Kenji Amano , Hajime Hasebe
IPC分类号： H01L21/00
CPC分类号： H01L23/49582 , H01L21/4842 , H01L23/49551 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48639 , H01L2224/48664 , H01L2224/49171 , H01L2224/73265 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2224/78 , H01L2924/00012 , H01L2924/00
摘要： According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.
摘要翻译：根据制造半导体器件的方法，提供了一种引线框架，其中形成在每个悬挂引线1e上的用于电线连接的镀银镀层的片状侧端部的厚度小于在每个悬挂引线上形成的镀银的厚度铅。此后，将半导体芯片安装在突片上。在这种情况下，由于悬挂引线1e上的镀银的整个表面处于破碎状态，因此当将芯片安装到突片上时，可以防止半导体芯片与镀银的接触。因此，在芯片接合工艺中，半导体芯片可以在不接触镀银的情况下在突片上滑动，从而可以减小当安装到突片上时对半导体芯片的损害，并且因此可能防止芯片的破裂或碎裂组装半导体器件。

5. 发明授权

US07514293B2 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07514293B2
公开(公告)日：2009-04-07
申请号：US12191503
申请日：2008-08-14
申请人： Kenji Amano , Hajime Hasebe
发明人： Kenji Amano , Hajime Hasebe
IPC分类号： H01L21/00
CPC分类号： H01L23/49582 , H01L21/4842 , H01L23/49551 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48639 , H01L2224/48664 , H01L2224/49171 , H01L2224/73265 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2224/78 , H01L2924/00012 , H01L2924/00
摘要： According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.
摘要翻译：根据制造半导体器件的方法，提供引线框架，其中形成在每个悬挂引线1e上的用于电线连接的镀银镀层的片侧端部的厚度小于在每个引线上形成的镀银的厚度。此后，将半导体芯片安装在突片上。在这种情况下，由于悬挂引线1e上的镀银的整个表面处于破碎状态，因此当将芯片安装在突片上时，可以防止半导体芯片与镀银的接触。因此，在芯片接合工艺中，半导体芯片可以在不接触镀银的情况下在突片上滑动，从而可以减小当安装到突片上时对半导体芯片的损害，并且因此可能防止芯片的破裂或碎裂组装半导体器件。

6. 发明授权

US06565662B2 Vacuum processing apparatus for semiconductor process 有权
标题翻译：半导体工艺用真空处理装置
公开(公告)号：US06565662B2
公开(公告)日：2003-05-20
申请号：US09739701
申请日：2000-12-20
申请人： Kenji Amano , Yoshitsugu Tanaka
发明人： Kenji Amano , Yoshitsugu Tanaka
IPC分类号： H01L21306
CPC分类号： H01L21/67126 , H01J37/32458 , H01L21/67028 , H01L21/67069
摘要： A plasma etching apparatus includes a process container formed of a container main body and an upper casing combined with each other. A detaching device is provided to move the upper casing between a mounted position where the upper casing is put on the container main body, and a retreated position where the upper casing is removed from the container main body. The detaching device supports the upper casing to be rotatable, movable up and down, and movable in a lateral direction, relative to the container main body. The retreated position is arranged such that the upper casing does not interfere with the container main body when the upper casing is rotated there.
摘要翻译：等离子体蚀刻装置包括由容器主体和彼此组合的上壳体形成的处理容器。提供一种分离装置，用于使上壳体在上壳体被放置在容器主体上的安装位置与上壳体从容器主体移除的后退位置之间移动。分离装置支撑上壳体可旋转，上下移动，并相对于容器主体在横向上可移动。退避位置被布置成使得当上壳体在那里旋转时，上壳体不与容器主体干涉。

7. 发明授权

US08102035B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08102035B2
公开(公告)日：2012-01-24
申请号：US13084600
申请日：2011-04-12
申请人： Kenji Amano , Hajime Hasebe
发明人： Kenji Amano , Hajime Hasebe
IPC分类号： H01L23/495
CPC分类号： H01L23/49582 , H01L21/4842 , H01L23/49551 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48639 , H01L2224/48664 , H01L2224/49171 , H01L2224/73265 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2224/78 , H01L2924/00012 , H01L2924/00
摘要： According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.
摘要翻译：根据制造半导体器件的方法，提供引线框架，其中形成在每个悬挂引线1e上的用于电线连接的镀银镀层的片侧端部的厚度小于在每个引线上形成的镀银的厚度。此后，将半导体芯片安装在突片上。在这种情况下，由于悬挂引线1e上的镀银的整个表面处于破碎状态，因此当将芯片安装在突片上时，可以防止半导体芯片与镀银的接触。因此，在芯片接合工艺中，半导体芯片可以在不接触银电镀的情况下在突片上滑动，从而可以减小当安装到突片上时对半导体芯片的损坏，并且因此可能防止芯片的破裂或碎裂组装半导体器件。

8. 发明授权

US07579674B2 Semiconductor package configuration with improved lead portion arrangement 有权
标题翻译：具有改进引线部分布置的半导体封装结构
公开(公告)号：US07579674B2
公开(公告)日：2009-08-25
申请号：US12027730
申请日：2008-02-07
申请人： Kenji Amano , Atsushi Fujisawa , Hajime Hasebe
发明人： Kenji Amano , Atsushi Fujisawa , Hajime Hasebe
IPC分类号： H01L23/495
CPC分类号： H01L23/3107 , H01L23/49548 , H01L24/48 , H01L2224/32014 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device with improved reliability is provided. The semiconductor device in a QFN package configuration has a semiconductor chip mounted on a tab, leads which are alternately arranged around the tab and electrically connected to the electrodes of the semiconductor chip via bonding wires, and an encapsulating resin portion for encapsulating therein the semiconductor chip and the bonding wires. The lower exposed surfaces of the leads are exposed at the outer peripheral portion of the back surface of the encapsulating resin portion to form external terminals. The lower exposed surfaces of the leads are exposed at the portion of the back surface of the encapsulating resin portion which is located inwardly of the lower exposed surface of the leads to also form external terminals. The cut surfaces of the leads are exposed at the cut surfaces of the encapsulating resin portion, while the upper exposed surfaces of the leads are exposed from the portion of the encapsulating resin portion which is proximate to the cut surfaces thereof. Each of the upper exposed surfaces of the leads has a width smaller than the width of each of the lower exposed surfaces thereof.
摘要翻译：提供了具有可靠性提高的半导体器件。 QFN封装结构中的半导体器件具有安装在突片上的半导体芯片，引线交替地布置在突片周围并通过接合线电连接到半导体芯片的电极，并且封装树脂部分用于封装半导体芯片和接合线。引线的下暴露表面在封装树脂部分的后表面的外周部分露出以形成外部端子。引线的下暴露表面暴露在封装树脂部分的背面的位于引线下暴露表面内部的部分处，并形成外部端子。引线的切割表面在封装树脂部分的切割表面处露出，而引线的上暴露表面从密封树脂部分的接近其切割表面的部分露出。引线的每个上暴露表面的宽度小于其下暴露表面的宽度。

9. 发明申请

US20050029640A1 Semiconductor device and method of manufacturing thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050029640A1
公开(公告)日：2005-02-10
申请号：US10878226
申请日：2004-06-29
申请人： Kenji Amano , Atsushi Fujisawa , Hajime Hasebe
发明人： Kenji Amano , Atsushi Fujisawa , Hajime Hasebe
IPC分类号： H01L23/50 , H01L23/31 , H01L23/495 , H01L21/44 , H01L21/50 , H01L23/02
CPC分类号： H01L23/3107 , H01L23/49548 , H01L24/48 , H01L2224/32014 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor chip is mounted on a tab, leads alternately arranged around the tab are electrically connected to electrodes of the semiconductor chip via bonding wires, and encapsulating resin encapsulates the semiconductor chip and bonding wires. The lower surfaces of the leads are exposed at the outer periphery of the back surface of the encapsulating resin to form external terminals. The lower surfaces of the leads are exposed at the back surface of the encapsulating resin located inwardly of the lower exposed surface of the leads to form external terminals. The cut surfaces of the leads are exposed at the cut surfaces of the encapsulating resin, while upper exposed surfaces of the leads are exposed from the encapsulating resin portion which is proximate to the cut surfaces thereof. Each of the upper exposed surfaces of the leads has a width smaller than the width of each of the lower exposed surfaces.
摘要翻译：半导体芯片安装在突片上，交替布置在突片周围的引线通过接合线电连接到半导体芯片的电极，封装树脂封装半导体芯片和接合线。引线的下表面在封装树脂的背面的外周露出，形成外部端子。引线的下表面在位于引线的下暴露表面内侧的封装树脂的背面处露出，以形成外部端子。引线的切割表面在封装树脂的切割表面处露出，而引线的上暴露表面从接近其切割表面的封装树脂部分露出。引线的每个上暴露表面的宽度小于每个下暴露表面的宽度。

10. 发明授权

US06387208B2 Inductive coupling plasma processing apparatus 失效
公开(公告)号：US06387208B2
公开(公告)日：2002-05-14
申请号：US09897954
申请日：2001-07-05
申请人： Tsutomu Satoyoshi , Kenji Amano
发明人： Tsutomu Satoyoshi , Kenji Amano
IPC分类号： H01L2100
CPC分类号： H01J37/32522 , H01J37/321
摘要： There is disclosed an inductive coupling plasma processing apparatus having a processing chamber for subjecting a substrate G to a plasma processing, a dielectric wall portion constituting an upper part wall portion or a side wall portion of the chamber, a high-frequency antenna, disposed on a corresponding portion of the dielectric wall portion outside the chamber, for forming an induction field in the chamber, a cover member formed of a dielectric material disposed inside the dielectric wall portion to cover the dielectric wall portion, a heater for heating the cover member, and an insulating member for insulating between the dielectric wall portion and the heater, wherein a reaction product generated by a plasma is heated at a temperature without adhering to the cover member, and heat generated by the heater is prevented from being conducted to the dielectric wall portion.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式