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    • 1. 发明申请
    • DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME
    • 显示基板,其制造方法
    • US20110147740A1
    • 2011-06-23
    • US12977853
    • 2010-12-23
    • Ki-Hun JEONGDo-Hyun KIMDong-Hoon LEEKap-Soo YOONJae-Ho CHOISung-Hoon YANGPil-Sang YUNSeung-Mi SEO
    • Ki-Hun JEONGDo-Hyun KIMDong-Hoon LEEKap-Soo YOONJae-Ho CHOISung-Hoon YANGPil-Sang YUNSeung-Mi SEO
    • H01L29/786H01L21/336
    • H01L29/7869H01L29/78606H01L29/78633
    • The present invention discloses a thin film transistor (TFT), a method for manufacturing the TFT, and a display substrate using the TFT that may prevent degradation of the characteristics of an oxide semiconductor contained in the TFT by blocking external light from entering a channel region of the oxide semiconductor. The TFT comprises an oxide semiconductor layer; a protective layer disposed on the oxide semiconductor layer and overlapping a channel region of the oxide semiconductor layer; an opaque layer disposed between the oxide semiconductor layer and the protective layer; a source electrode contacting a first side of the oxide semiconductor layer; a drain electrode contacting a second side of the oxide semiconductor layer and facing the source electrode with the channel region disposed between the drain electrode and the source electrode; a gate electrode to apply an electric field to the oxide semiconductor layer; and a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer.
    • 本发明公开了一种薄膜晶体管(TFT),TFT的制造方法以及使用该TFT的显示基板,其可以防止外部光阻挡进入沟道区域而使TFT中包含的氧化物半导体的特性劣化 的氧化物半导体。 TFT包括氧化物半导体层; 保护层,设置在所述氧化物半导体层上并与所述氧化物半导体层的沟道区域重叠; 设置在所述氧化物半导体层和所述保护层之间的不透明层; 与氧化物半导体层的第一面接触的源电极; 与所述氧化物半导体层的第二面接触且与所述源电极相对的漏电极,所述沟道区域设置在所述漏电极和所述源电极之间; 用于向氧化物半导体层施加电场的栅电极; 以及设置在栅电极和氧化物半导体层之间的栅极绝缘层。
    • 10. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD OF THE SAME
    • 薄膜晶体管阵列及其制造方法
    • US20090272980A1
    • 2009-11-05
    • US12272624
    • 2008-11-17
    • Seung-Hwan SHIMKi-Hun JEONGJoo-Han KIMSung-Hoon YANGHong-kee CHIN
    • Seung-Hwan SHIMKi-Hun JEONGJoo-Han KIMSung-Hoon YANGHong-kee CHIN
    • H01L31/036H01L21/84
    • H01L27/1288H01L27/124
    • A semiconductor including a channel, a data line including a source electrode, a drain electrode, and a pixel area definition member is formed on a gate insulating layer, and a passivation layer is deposited on the data line, the pixel area definition member, and the channel of the semiconductor. A first photosensitive film pattern including a first portion disposed at a position corresponding to the drain electrode and a second portion that is thicker than the first portion, and exposing the passivation layer at a position corresponding to the pixel area definition member, is formed on the passivation layer, the passivation layer that is exposed by using the first photosensitive film pattern as an etch mask is etched, and a second photosensitive film pattern is formed by etching the whole surface of the first photosensitive film pattern to remove the first portion. The pixel area definition member exposed by the passivation layer is etched, and the passivation layer exposed by the removal of the first portion and the semiconductor exposed by the removal of the pixel area definition member are etched. A conductor layer for a pixel electrode is formed, and the second photosensitive film pattern is removed to form the pixel electrode.
    • 包括沟道的半导体,包括源电极,漏电极和像素区域定义部件的数据线形成在栅极绝缘层上,钝化层沉积在数据线,像素区域定义部件和 半导体的通道。 第一感光膜图案包括设置在与漏电极相对应的位置处的第一部分和比第一部分更厚的第二部分,并且在与像素区域定义部件对应的位置处曝光钝化层,形成在 钝化层,蚀刻通过使用第一感光膜图案而曝光的钝化层作为蚀刻掩模,并且通过蚀刻第一感光膜图案的整个表面以除去第一部分来形成第二感光膜图案。 蚀刻由钝化层露出的像素区域定义构件,蚀刻通过去除第一部分而露出的钝化层和通过去除像素区域定义构件而暴露的半导体。 形成用于像素电极的导体层,并且去除第二感光膜图案以形成像素电极。