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1. 发明授权

US08385396B2 Waveform equalizer and method for controlling the same, as well as receiving apparatus and method for controlling the same 失效
标题翻译：波形均衡器及其控制方法，以及接收装置及其控制方法
公开(公告)号：US08385396B2
公开(公告)日：2013-02-26
申请号：US12671228
申请日：2008-08-06
申请人： Kazuhisa Funamoto , Koji Naniwada , Tien Dzung Doan
发明人： Kazuhisa Funamoto , Koji Naniwada , Tien Dzung Doan
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04B3/142 , H04L25/03038 , H04L25/0305 , H04L2025/03509 , H04L2025/03579
摘要： The present invention relates to a waveform equalizer and a method for controlling the same, as well as a receiving apparatus and a method for controlling the same whereby better receiving characteristics are provided than before.In a filter 28, registers 911 through 915 delay an input DT1; multipliers 920 through 925 multiply outputs from the registers by filter coefficients C20 through C25 respectively; and adders 931 through 935 add up outputs from the multipliers to acquire DT2. A selector 81 either outputs a timing signal at intervals of a symbol period of DT1 to drive the filter 82 as a symbol rate equalizer, or outputs the timing signal at intervals of half the symbol period to operate the filter 82 as a fractionally spaced equalizer. The present invention may be applied to waveform equalizers performing waveform equalization of the input signal.
摘要翻译：波形均衡器及其控制方法技术领域本发明涉及一种波形均衡器及其控制方法，以及一种接收设备及其控制方法，从而提供比以前更好的接收特性。在滤波器28中，寄存器911至915延迟输入DT1; 乘法器920至925分别通过滤波器系数C20至C25对来自寄存器的输出进行乘法运算; 加法器931至935将来自乘法器的输出相加以获取DT2。选择器81以DT1的符号周期的间隔输出定时信号，以驱动滤波器82作为符号速率均衡器，或以符号周期的一半的间隔输出定时信号，以将滤波器82作为分数间隔的均衡器进行操作。本发明可以应用于执行输入信号的波形均衡的波形均衡器。

2. 发明申请

US20100208787A1 WAVEFORM EQUALIZER AND METHOD FOR CONTROLLING THE SAME, AS WELL AS RECEIVING APPARATUS AND METHOD FOR CONTROLLING THE SAME 失效
标题翻译：波形均衡器及其控制方法，以及接收装置及其控制方法
公开(公告)号：US20100208787A1
公开(公告)日：2010-08-19
申请号：US12671228
申请日：2008-08-06
申请人： Kazuhisa Funamoto , Koji Naniwada , Tien Dzung Doan
发明人： Kazuhisa Funamoto , Koji Naniwada , Tien Dzung Doan
IPC分类号： H03H7/40 , H04B3/14
CPC分类号： H04B3/142 , H04L25/03038 , H04L25/0305 , H04L2025/03509 , H04L2025/03579
摘要： The present invention relates to a waveform equalizer and a method for controlling the same, as well as a receiving apparatus and a method for controlling the same whereby better receiving characteristics are provided than before.In a filter 28, registers 911 through 915 delay an input DT1; multipliers 920 through 925 multiply outputs from the registers by filter coefficients C20 through C25 respectively; and adders 931 through 935 add up outputs from the multipliers to acquire DT2. A selector 81 either outputs a timing signal at intervals of a symbol period of DT1 to drive the filter 82 as a symbol rate equalizer, or outputs the timing signal at intervals of half the symbol period to operate the filter 82 as a fractionally spaced equalizer. The present invention may be applied to waveform equalizers performing waveform equalization of the input signal.
摘要翻译：波形均衡器及其控制方法技术领域本发明涉及一种波形均衡器及其控制方法，以及一种接收设备及其控制方法，从而提供比以前更好的接收特性。在滤波器28中，寄存器911至915延迟输入DT1; 乘法器920至925分别通过滤波器系数C20至C25对来自寄存器的输出进行乘法运算; 加法器931至935将来自乘法器的输出相加以获取DT2。选择器81以DT1的符号周期的间隔输出定时信号，以驱动滤波器82作为符号速率均衡器，或以符号周期的一半的间隔输出定时信号，以将滤波器82作为分数间隔的均衡器进行操作。本发明可以应用于执行输入信号的波形均衡的波形均衡器。

3. 发明申请

US20100080330A1 RECEIVING APPARATUS, RECEIVING METHOD, AND PROGRAM 有权
标题翻译：接收设备，接收方法和程序
公开(公告)号：US20100080330A1
公开(公告)日：2010-04-01
申请号：US12567856
申请日：2009-09-28
申请人： Hidetoshi KAWAUCHI , Masayuki Hattori , Toshiyuki Miyauchi , Takashi Yokokawa , Kazuhiro Shimizu , Kazuhisa Funamoto
发明人： Hidetoshi KAWAUCHI , Masayuki Hattori , Toshiyuki Miyauchi , Takashi Yokokawa , Kazuhiro Shimizu , Kazuhisa Funamoto
IPC分类号： H04B1/10
CPC分类号： H04L27/2662 , H04L25/0232 , H04L25/03159 , H04L27/2656 , H04L27/2665
摘要： Disclosed herein is a receiving apparatus including: first to third position determination sections configured to determine the start position of an FFT interval which serves as a signal interval targeted for FFT by an FFT section; a selection section configured to select one of those start positions of the FFT interval which are determined by the first through the third position determination section; and the FFT section configured to perform FFT on the OFDM time domain signal by regarding the start position selected by the selection section as the start position of the FFT interval in order to generate the first OFDM frequency domain signal.
摘要翻译：本发明公开了一种接收装置，包括：第一至第三位置确定部分，被配置为确定FFT间隔的起始位置，其作为由FFT部分进行FFT的信号间隔; 选择部，被配置为选择由所述第一至第三位置确定部确定的所述FFT间隔的那些起始位置之一; FFT部，被配置为通过将由选择部选择出的开始位置作为FFT间隔的开始位置，对OFDM时域信号进行FFT，以生成第一OFDM频域信号。

4. 发明申请

US20050147186A1 Ofdm demodulation apparatus 审中-公开
标题翻译： Ofdm解调装置
公开(公告)号：US20050147186A1
公开(公告)日：2005-07-07
申请号：US10505794
申请日：2003-12-18
申请人： Kazuhisa Funamoto , Takahiro Okada , Tamotsu Ikeda , Atsushi Yajima , Yasunari Ikeda
发明人： Kazuhisa Funamoto , Takahiro Okada , Tamotsu Ikeda , Atsushi Yajima , Yasunari Ikeda
IPC分类号： H04J11/00 , H04L7/08 , H04L27/14 , H04L27/26
CPC分类号： H04L27/2605 , H04L27/2657 , H04L27/2662 , H04L27/2676
摘要： An OFDM demodulation (1) is provided which includes a guard correlation/peak time detection circuit (12) to generate a peak timing Np of a guard interval correlation value, and a timing synchronization circuit (13) to estimate a symbol-boundary time Nx from the peak timing Np. The timing synchronization circuit (13) calculates the symbol-boundary time Nx by filtering the peak time Np by a DLL (delay locked loop) filter (43). Further, the DLL filter (43) includes a limiter (52) to limit the range of phase-error component and an asymmetric gain circuit (53) to change the magnitude of the gain correspondingly to the polarity of the phase error to prevent the timing from being pulled out due to a fading or multipath.
摘要翻译：提供了一种OFDM解调（1），其包括：保护相关/峰值时间检测电路（12），用于产生保护间隔相关值的峰值定时Np;以及定时同步电路（13），用于估计符号边界时间Nx 从峰值时刻Np。定时同步电路（13）通过DLL（延迟锁定环）滤波器（43）对峰值时间Np进行滤波来计算符号边界时间Nx。此外，DLL滤波器（43）包括限制相位误差分量范围的限幅器（52）和非对称增益电路（53），以相应于相位误差的极性改变增益的幅度，以防止定时由于衰落或多路径而被拉出。

5. 发明授权

US08081027B2 Reception device, control method, and program 有权
标题翻译：接收设备，控制方法和程序
公开(公告)号：US08081027B2
公开(公告)日：2011-12-20
申请号：US11946351
申请日：2007-11-28
申请人： Yasuhiro Iida , Kazuhisa Funamoto
发明人： Yasuhiro Iida , Kazuhisa Funamoto
IPC分类号： H04L27/22
CPC分类号： H04L27/38 , H04L27/0014 , H04L2027/003 , H04L2027/0055 , H04L2027/0069 , H04L2027/0081 , H04L2027/0095
摘要： A reception device that receives a modulation signal being a result of digital modulation of a carrier is disclosed. The device includes: a demodulation section that demodulates the modulation signal into a demodulation signal including an I component and a Q component; a numerically controlled oscillation section that generates a signal of predetermined phase; a phase error detection section that detects a phase error between a phase of a symbol of the demodulation signal and the predetermined phase of the signal generated by the numerically controlled oscillation section; a phase rotation section that rotates the phase of the symbol of the demodulation signal in accordance with the phase error; a loop filter that filters the phase error, and controls the numerically controlled oscillation section; and a gain control section that controls a gain of the loop filter based on a modulation technique of the modulation signal.
摘要翻译：公开了接收作为载波的数字调制结果的调制信号的接收装置。该装置包括：解调部，其将调制信号解调为包括I分量和Q分量的解调信号; 产生预定相位信号的数控振荡部分; 相位误差检测部分，检测解调信号的符号的相位与由数字振荡部分产生的信号的预定相位之间的相位误差; 相位旋转部，其根据相位误差旋转解调信号的符号的相位; 环路滤波器，滤波相位误差，并控制数控振荡部分; 以及增益控制部，其基于调制信号的调制技术来控制环路滤波器的增益。

6. 发明授权

US07447277B2 Ofdm demodulation device 失效
标题翻译： Ofdm解调装置
公开(公告)号：US07447277B2
公开(公告)日：2008-11-04
申请号：US10504341
申请日：2003-12-18
申请人： Atsushi Yajima , Kazuhisa Funamoto , Yasunari Ikeda
发明人： Atsushi Yajima , Kazuhisa Funamoto , Yasunari Ikeda
IPC分类号： H04L27/00 , H04L27/10 , H03K7/06
CPC分类号： H04L27/2605 , H04L7/02 , H04L27/2662 , H04L27/2676
摘要： An OFDM receiver (1) is provided which includes a clock-frequency error calculation circuit (41) to calculate a difference in clock frequency between a clock for a received signal and an operation clock used in the receiver (1), and a guard correlation/peak detection circuit (12) to determine an autocorrelation of a guard interval and detect a peak timing of the correlation signal. The guard correlation/peak detection circuit (12) incorporates a free-running counter, and outputs a count of the free-running counter at the peak timing to the clock-frequency error calculation circuit (41). The clock-frequency error calculation circuit (41) uses a plurality of time-change rate detection circuits provided at different time intervals to calculate a time-change rate of an input count. The clock-frequency error calculation circuit (41) plots the time-change rates to generate a histogram and calculates a clock-frequency error from the histogram.
摘要翻译：提供了一种OFDM接收器（1），其包括时钟频率误差计算电路（41），用于计算接收信号的时钟和接收机（1）中使用的操作时钟之间的时钟频率差，以及保护相关 /峰值检测电路（12），以确定保护间隔的自相关性并检测相关信号的峰值定时。保护相关/峰值检测电路（12）包含自由运行计数器，并将峰值定时的自由运行计数器的计数输出到时钟频率误差计算电路（41）。时钟频率误差计算电路（41）使用以不同时间间隔设置的多个时变速率检测电路来计算输入计数的时间变化率。时钟频率误差计算电路（41）绘制时间变化率以产生直方图，并根据直方图计算时钟频率误差。

7. 发明申请

US20080136510A1 Reception Device, Control Method, and Program 有权
标题翻译：接收设备，控制方法和程序
公开(公告)号：US20080136510A1
公开(公告)日：2008-06-12
申请号：US11946351
申请日：2007-11-28
申请人： Yasuhiro IIDA , Kazuhisa Funamoto
发明人： Yasuhiro IIDA , Kazuhisa Funamoto
IPC分类号： H04L27/22
CPC分类号： H04L27/38 , H04L27/0014 , H04L2027/003 , H04L2027/0055 , H04L2027/0069 , H04L2027/0081 , H04L2027/0095
摘要： A reception device that receives a modulation signal being a result of digital modulation of a carrier is disclosed. The device includes:a demodulation section that demodulates the modulation signal into a demodulation signal including an I component and a Q component;a numerically controlled oscillation section that generates a signal of predetermined phase;a phase error detection section that detects a phase error between a phase of a symbol of the demodulation signal and the predetermined phase of the signal generated by the numerically controlled oscillation section;a phase rotation section that rotates the phase of the symbol of the demodulation signal in accordance with the phase error;a loop filter that filters the phase error, and controls the numerically controlled oscillation section; anda gain control section that controls a gain of the loop filter based on a modulation technique of the modulation signal.
摘要翻译：公开了接收作为载波的数字调制结果的调制信号的接收装置。该装置包括：解调部，其将调制信号解调为包括I分量和Q分量的解调信号; 产生预定相位信号的数控振荡部分; 相位误差检测部分，检测解调信号的符号的相位与由数字振荡部分产生的信号的预定相位之间的相位误差; 相位旋转部，其根据相位误差旋转解调信号的符号的相位; 环路滤波器，滤波相位误差，并控制数控振荡部分; 以及增益控制部，其基于调制信号的调制技术来控制环路滤波器的增益。

8. 发明申请

US20120131422A1 TRANSMITTING DEVICE, TRANSMITTING METHOD, RECEIVING DEVICE, RECEIVING METHOD, PROGRAM, AND TRANSMISSION SYSTEM 审中-公开
标题翻译：发送装置，发送方法，接收装置，接收方法，程序和传输系统
公开(公告)号：US20120131422A1
公开(公告)日：2012-05-24
申请号：US13247161
申请日：2011-09-28
申请人： Tatsuo SHINBASHI , Kazuhisa Funamoto , Hideyuki Matsumoto , Hiroshi Shiroshita , Kenichi Maruko , Tatsuya Sugioka , Naohiro Koshisaka , Shigetoshi Sasaki , Masato Tamori
发明人： Tatsuo SHINBASHI , Kazuhisa Funamoto , Hideyuki Matsumoto , Hiroshi Shiroshita , Kenichi Maruko , Tatsuya Sugioka , Naohiro Koshisaka , Shigetoshi Sasaki , Masato Tamori
IPC分类号： H03M13/03
CPC分类号： H04L1/0009 , H04L1/0025 , H04L1/0071 , H04L1/16 , H04L2001/0094
摘要： A transmitting device includes a setting unit that sets the data length of an error correcting code whose data length is variable, an error correcting code calculator that calculates the error correcting code having the data length set by the setting unit for transmission-subject data as an information word, and a transmitting unit that transmits, to a receiving device existing in the same device, coded data that is data of a codeword obtained by adding the error correcting code obtained by calculation by the error correcting code calculator to the transmission-subject data.
摘要翻译：发送装置包括：设定单元，其设定数据长度可变的纠错码的数据长度;纠错码计算器，计算由发送对象数据的设定单位设定的数据长度的纠错码为信息字，以及发送单元，向同一装置中存在的接收装置发送编码数据，该编码数据是通过将通过纠错码计算器的计算获得的纠错码与发送对象数据相加而获得的码字的数据。

9. 发明申请

US20120131412A1 TRANSMISSION APPARATUS, TRANSMISSION METHOD, RECEPTION APPARATUS, RECEPTION METHOD, PROGRAM AND TRANSMISSION SYSTEM 有权
标题翻译：传输装置，传输方法，接收装置，接收方法，程序和传输系统
公开(公告)号：US20120131412A1
公开(公告)日：2012-05-24
申请号：US13253464
申请日：2011-10-05
申请人： Tatsuo SHINBASHI , Kazuhisa Funamoto , Hideyuki Matsumoto , Hiroshi Shiroshita , Kenichi Maruko , Tatsuya Sugioka , Naohiro Koshisaka
发明人： Tatsuo SHINBASHI , Kazuhisa Funamoto , Hideyuki Matsumoto , Hiroshi Shiroshita , Kenichi Maruko , Tatsuya Sugioka , Naohiro Koshisaka
IPC分类号： H03M13/09
CPC分类号： H04L1/0057 , H04L25/14 , H04L2001/0096
摘要： Disclosed herein is a transmission apparatus, including: an error correction code calculation section adapted to calculate an error correction code from data of a transmission object as an information word; a division section adapted to allocate coded data which configure a codeword obtained by adding the error correction code determined by the calculation by the error correction code calculation section to the data of the transmission object for each predetermined number of units to a plurality of transmission lines; and a plurality of transmission sections provided corresponding to the plural transmission lines and adapted to transmit the coded data allocated by the division section to a reception apparatus through the transmission lines.
摘要翻译：这里公开了一种传输装置，包括：纠错码计算部分，适于从作为信息字的传输对象的数据计算纠错码; 分配部分，适于分配编码数据，所述编码数据配置通过将由纠错码计算部分的计算确定的纠错码与每个预定数量的单位的传输对象的数据相加而获得的代码字; 以及与所述多个传输线对应地设置的多个发送部，并且用于通过所述传输线将由所述分割部分配的编码数据发送到接收装置。

10. 发明申请

US20120120289A1 IMAGE OUTPUTTING APPARATUS, IMAGE OUTPUTTING METHOD, IMAGE PROCESSING APPARATUS, IMAGE PROCESSING METHOD, PROGRAM, DATA STRUCTURE AND IMAGING APPARATUS 有权
标题翻译：图像输出装置，图像输出方法，图像处理装置，图像处理方法，程序，数据结构和成像装置
公开(公告)号：US20120120289A1
公开(公告)日：2012-05-17
申请号：US13242144
申请日：2011-09-23
申请人： Tatsuya SUGIOKA , Hiroshi Shiroshita , Miho Ozawa , Hiroki Kihara , Kenichi Maruko , Tatsuo Shinbashi , Kazuhisa Funamoto , Hideyuki Matsumoto , Takayuki Toyama , Hayato Wakabayashi , Naohiro Koshisaka , Shigetoshi Sasaki , Masato Tamori
发明人： Tatsuya SUGIOKA , Hiroshi Shiroshita , Miho Ozawa , Hiroki Kihara , Kenichi Maruko , Tatsuo Shinbashi , Kazuhisa Funamoto , Hideyuki Matsumoto , Takayuki Toyama , Hayato Wakabayashi , Naohiro Koshisaka , Shigetoshi Sasaki , Masato Tamori
IPC分类号： H04N5/335
CPC分类号： G06F13/385 , G06T1/0007 , G06T2210/32 , H04N1/00307 , H04N5/378 , H04N2201/0084 , Y02D10/14 , Y02D10/151
摘要： An image outputting apparatus includes a header production section for producing a header including header information formed from first and second frame information regarding whether pixel data included in a payload are of first and last lines of one frame, respectively, first line information regarding whether or not the pixel data included in the payload are valid, and second line information regarding a line number of a line formed from the pixel data included in the payload, and an error detection code for use for detection of an error of the header information. A packet production section produces a packet which includes, in the payload thereof, pixel data for one line which configure an image obtained by imaging by an imaging section and to which the header is added. An outputting section outputs the produced packet to an image processing apparatus.
摘要翻译：一种图像输出装置，包括标题制作部分，用于产生一个包含标题信息的报头，标题信息分别由第一和第二帧信息形成，关于有效载荷中包括的像素数据是否分别是一帧的第一行和最后一行，包括在有效载荷中的像素数据是有效的，以及关于从包括在有效载荷中的像素数据形成的行的行号的第二行信息，以及用于检测标题信息的错误的错误检测码。分组产生部分产生一个分组，该分组在其有效载荷中包括一行的像素数据，其构成通过成像部分成像获得的图像，并且添加该标题。输出部将所生成的分组输出到图像处理装置。

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