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1. 发明授权

US07715295B2 Optical disc reproducing apparatus for correcting asymmetric errors in data reproduced from optical discs 有权
标题翻译：用于校正从光盘再现的数据中的不对称误差的光盘再现装置
公开(公告)号：US07715295B2
公开(公告)日：2010-05-11
申请号：US11528475
申请日：2006-09-28
申请人： Jung Hyun Lee , Eing Seob Cho , Eun Jin Ryu , Jun Jin Kong
发明人： Jung Hyun Lee , Eing Seob Cho , Eun Jin Ryu , Jun Jin Kong
IPC分类号： G11B7/00
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10046 , G11B20/10055 , G11B20/10101 , G11B20/10212 , G11B20/10222 , G11B20/10296 , G11B20/10425 , G11B20/10481 , G11B20/1426 , G11B20/22 , G11B2020/1457 , G11B2020/1863 , G11B2220/2562
摘要： An optical disc reproducing apparatus includes an A/D converter; an asymmetry compensator for detecting 4T sampling signals; a phase locked loop including a frequency detector that counts and detects run-length signals from the digital signals and compensates frequency errors of the digital signals; a binary module including a Viterbi decoder, a slicer, and a minimum T compensator that compensates the digital signal with a minimum signal having a unit cycle; an equalizer; an adaptive level error detector detecting a base level of the Viterbi decoder from both an input signal into the equalizer and an output signal from the Viterbi decoder, and computing a filtering coefficient of the equalizer from the base level; and a signal quality measurer measuring a jitter or an SbER of the digital signal.
摘要翻译：一种光盘再现装置，包括A / D转换器; 用于检测4T采样信号的不对称补偿器; 锁相环包括频率检测器，对来自数字信号的游程长度信号进行计数和检测，并补偿数字信号的频率误差; 包括维特比解码器，限幅器和最小T补偿器的二进制模块，其用具有单位周期的最小信号来补偿数字信号; 均衡器自适应电平误差检测器，从输入到均衡器的输入信号和维特比解码器的输出信号中检测维特比解码器的基准电平，并从基准电平计算均衡器的滤波系数; 以及测量数字信号的抖动或SbER的信号质量测量器。

2. 发明申请

US20070206476A1 Optical disc reproducing apparatus 失效
标题翻译：光盘重放装置
公开(公告)号：US20070206476A1
公开(公告)日：2007-09-06
申请号：US11713668
申请日：2007-03-05
申请人： Eing Seob Cho , Eun Jin Ryu , Jung Hyun Lee , Jun Jin Kong
发明人： Eing Seob Cho , Eun Jin Ryu , Jung Hyun Lee , Jun Jin Kong
IPC分类号： G11B20/10
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10046 , G11B20/10333 , G11B20/10425 , G11B2220/2562
摘要： An optical disc reproducing apparatus includes an analog-to-digital (A/D) converter which converts an analog signal obtained from an optical disc to a digital signal; an asymmetry compensator which detects and corrects an offset of the digital signal; a phase locked loop (PLL) which estimates a clock of the digital signal and compensates for a frequency error; a binary module which converts the digital signal to binary data; an equalizer which equalizes a particular frequency of the digital signal; and a channel identifier which detects a reference level of the binary module, based on an input signal of the equalizer.
摘要翻译：一种光盘再现装置，包括将从光盘获得的模拟信号转换为数字信号的模数（A / D）转换器; 不对称补偿器，其检测和校正数字信号的偏移; 锁相环（PLL），其估计数字信号的时钟并补偿频率误差; 将数字信号转换为二进制数据的二进制模块; 均衡器，其均衡数字信号的特定频率; 以及基于均衡器的输入信号来检测二进制模块的参考电平的信道标识符。

3. 发明授权

US07911899B2 Optical disc reproducing apparatus using an asymmetric compensation scheme 失效
标题翻译：使用非对称补偿方案的光盘再现装置
公开(公告)号：US07911899B2
公开(公告)日：2011-03-22
申请号：US11713668
申请日：2007-03-05
申请人： Jung Hyun Lee , Eun Jin Ryu , Eing Seob Cho , Jun Jin Kong
发明人： Jung Hyun Lee , Eun Jin Ryu , Eing Seob Cho , Jun Jin Kong
IPC分类号： G11B15/52
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10046 , G11B20/10333 , G11B20/10425 , G11B2220/2562
摘要： An optical disc reproducing apparatus includes an analog-to-digital (A/D) converter which converts an analog signal obtained from an optical disc to a digital signal; an asymmetry compensator which detects and corrects an offset of the digital signal; a phase locked loop (PLL) which estimates a clock of the digital signal and compensates for a frequency error; a binary module which converts the digital signal to binary data; an equalizer which equalizes a particular frequency of the digital signal; and a channel identifier which detects a reference level of the binary module, based on an input signal of the equalizer.
摘要翻译：一种光盘再现装置，包括将从光盘获得的模拟信号转换为数字信号的模数（A / D）转换器; 不对称补偿器，其检测和校正数字信号的偏移; 锁相环（PLL），其估计数字信号的时钟并补偿频率误差; 将数字信号转换为二进制数据的二进制模块; 均衡器，其均衡数字信号的特定频率; 以及基于均衡器的输入信号来检测二进制模块的参考电平的信道标识符。

4. 发明申请

US20070195675A1 Optical disc reproducing apparatus 有权
标题翻译：光盘重放装置
公开(公告)号：US20070195675A1
公开(公告)日：2007-08-23
申请号：US11528475
申请日：2006-09-28
申请人： Jung Hyun Lee , Eing Seob Cho , Eun Jin Ryu , Jun Jin Kong
发明人： Jung Hyun Lee , Eing Seob Cho , Eun Jin Ryu , Jun Jin Kong
IPC分类号： G11B20/10
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10046 , G11B20/10055 , G11B20/10101 , G11B20/10212 , G11B20/10222 , G11B20/10296 , G11B20/10425 , G11B20/10481 , G11B20/1426 , G11B20/22 , G11B2020/1457 , G11B2020/1863 , G11B2220/2562
摘要： An optical disc reproducing apparatus includes an A/D converter; an asymmetry compensator for detecting 4T sampling signals; a phase locked loop including a frequency detector that counts and detects run-length signals from the digital signals and compensates frequency errors of the digital signals; a binary module including a Viterbi decoder, a slicer, and a minimum T compensator that compensates the digital signal with a minimum signal having a unit cycle; an equalizer; an adaptive level error detector detecting a base level of the Viterbi decoder from both an input signal into the equalizer and an output signal from the Viterbi decoder, and computing a filtering coefficient of the equalizer from the base level; and a signal quality measurer measuring a jitter or an SbER of the digital signal.
摘要翻译：一种光盘再现装置，包括A / D转换器; 用于检测4T采样信号的不对称补偿器; 锁相环包括频率检测器，对来自数字信号的游程长度信号进行计数和检测，并补偿数字信号的频率误差; 包括维特比解码器，限幅器和最小T补偿器的二进制模块，其用具有单位周期的最小信号来补偿数字信号; 均衡器自适应电平误差检测器，从输入到均衡器的输入信号和维特比解码器的输出信号中检测维特比解码器的基准电平，并从基准电平计算均衡器的滤波系数; 以及测量数字信号的抖动或SbER的信号质量测量器。

5. 发明授权

US08984036B2 Methods for operating controllers using seed tables 有权
标题翻译：使用种子表操作控制器的方法
公开(公告)号：US08984036B2
公开(公告)日：2015-03-17
申请号：US13547212
申请日：2012-07-12
申请人： Yong June Kim , Jung Soo Chung , Jun Jin Kong , Hongrak Son
发明人： Yong June Kim , Jung Soo Chung , Jun Jin Kong , Hongrak Son
IPC分类号： G06F7/58
CPC分类号： G06F7/582
摘要： A method for operating a controller may include storing a pseudo noise (PN) sequence provided from a PN sequence generator in an i-th area of a seed table and cyclically shifting the PN sequence from the i-th area to an (i+1)-th area in the table to form the table. The table may include row and column areas. A method for operating a controller may include receiving a sequence from a sequence generator, splitting the sequence into seed units, storing split sequences in a j-th area of the seed table, and forming the table including the seed units corresponding to the split sequences stored in the j-th area. A method for operating a controller may include storing a sequence provided from a sequence generator in a seed table that includes a plurality of areas and cyclically shifting the sequence in the table until a seed is formed in each area.
摘要翻译：用于操作控制器的方法可以包括将从PN序列发生器提供的伪噪声（PN）序列存储在种子表的第i个区域中，并将PN序列从第i个区域循环移位到第（i + 1个））表中的区域形成表。该表可能包括行和列区域。用于操作控制器的方法可以包括从序列发生器接收序列，将序列分解成种子单元，将分离序列存储在种子表的第j个区域中，以及形成包括与分离序列相对应的种子单元的表存储在第j个区域。用于操作控制器的方法可以包括将从序列生成器提供的序列存储在包括多个区域的种子表中，并且将表中的序列循环移位，直到在每个区域中形成种子。

6. 发明授权

US08499217B2 Memory device and error control codes decoding method 有权
公开(公告)号：US08499217B2
公开(公告)日：2013-07-30
申请号：US12153121
申请日：2008-05-14
申请人： Seung-Hwan Song , Jun Jin Kong , Jae Hong Kim , Kyoung Lae Cho , Sung Chung Park
发明人： Seung-Hwan Song , Jun Jin Kong , Jae Hong Kim , Kyoung Lae Cho , Sung Chung Park
IPC分类号： H03M13/00 , G06F11/00 , G11C29/00
CPC分类号： G06F11/141 , G06F11/1012 , G06F11/1072 , G11C11/5642 , G11C16/10 , G11C29/00
摘要： Memory devices and/or error control codes (ECC) decoding methods may be provided. A memory device may include a memory cell array, and a decoder to perform hard decision decoding of first data read from the memory cell array by a first read scheme, and to generate output data and error information of the output data. The memory device may also include and a control unit to determine an error rate of the output data based on the error information, and to determine whether to transmit an additional read command for soft decision decoding to the memory cell array based on the error rate. An ECC decoding time may be reduced through such a memory device.

7. 发明授权

US08239747B2 Nonvolatile memory devices that utilize error correction estimates to increase reliability of error detection and correction operations 有权
标题翻译：利用误差校正估计的非易失性存储器件增加错误检测和校正操作的可靠性
公开(公告)号：US08239747B2
公开(公告)日：2012-08-07
申请号：US12216744
申请日：2008-07-10
申请人： Kyoung Lae Cho , Jae Hong Kim , Yoon Dong Park , Jun Jin Kong , Dong Hyuk Chae
发明人： Kyoung Lae Cho , Jae Hong Kim , Yoon Dong Park , Jun Jin Kong , Dong Hyuk Chae
IPC分类号： G06F11/00
CPC分类号： G06F11/1072 , H03M13/09 , H03M13/15 , H03M13/1515 , H03M13/152
摘要： Example embodiments may provide a memory device and memory data reading method. The memory device according to example embodiments may include a multi-bit cell array, an error detector which may read a first data page from a memory page in the multi-bit cell array and may detect an error-bit of the first data page, and an estimator which may identify a multi-bit cell where the error-bit is stored and may estimate data stored in the identified multi-bit cell among data of a second data page. Therefore, the memory device and memory data reading method may have an effect of reducing an error when reading data stored in the multi-bit cell and monitoring a state of the multi-bit cell without additional overhead.
摘要翻译：示例性实施例可以提供存储器件和存储器数据读取方法。根据示例实施例的存储器件可以包括多位单元阵列，错误检测器，其可以从多位单元阵列中的存储器页读取第一数据页，并且可以检测第一数据页的错误位，以及估计器，其可以识别存储错误位的多位单元，并且可以估计存储在所识别的多位单元中的数据在第二数据页的数据中。因此，存储器件和存储器数据读取方法可以具有当读取存储在多位单元中的数据并且监视多位单元的状态而没有额外开销时减小误差的效果。

8. 发明授权

US08230157B2 Memory device and method of multi-bit programming 失效
标题翻译：多位编程的存储器件和方法
公开(公告)号：US08230157B2
公开(公告)日：2012-07-24
申请号：US12155647
申请日：2008-06-06
申请人： Jaehong Kim , Kyoung Lae Cho , Jun Jin Kong , Heeseok Eun , Seung-Hwan Song
发明人： Jaehong Kim , Kyoung Lae Cho , Jun Jin Kong , Heeseok Eun , Seung-Hwan Song
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F11/00 , G06F11/10 , H03M13/00 , G11C29/00
CPC分类号： G11C11/5628 , G11C11/5671 , G11C29/00
摘要： Memory devices and multi-bit programming methods are provided. A memory device may include a plurality of memory units; a data separator that separates data into a plurality of groups; a selector that rotates each of the plurality of groups and transmits each of the groups to at least one of the plurality of memory units. The plurality of memory units may include page buffers that may program the transmitted group in a plurality of multi-bit cell arrays using a different order of a page programming operation. Through this, evenly reliable data pages may be generated.
摘要翻译：提供了存储器件和多位编程方法。存储器件可以包括多个存储器单元; 数据分离器，将数据分离成多个组; 选择器，其使所述多个组中的每一个旋转，并将所述组中的每一个发送到所述多个存储器单元中的至少一个。多个存储器单元可以包括可以使用页面编程操作的不同顺序对多个多位单元阵列中的发送组进行编程的页缓冲器。通过此，可能会生成均匀可靠的数据页。

9. 发明授权

US08179718B2 Memory device and memory programming method 有权
标题翻译：存储器和存储器编程方法
公开(公告)号：US08179718B2
公开(公告)日：2012-05-15
申请号：US12318560
申请日：2008-12-31
申请人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Yong June Kim
发明人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Yong June Kim
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C11/5628 , G11C29/00 , G11C2211/5621
摘要： Provided are memory devices and memory programming methods. A memory device may include: a multi-level cell array that includes a plurality of multi-level cells; a programming unit that programs a first data page in the plurality of multi-level cells and programs a second data page in a multi-level cell from among the plurality of multi-level cells in which the first data page is programmed; an error analysis unit that analyzes read error information corresponding to the first data page based on a read voltage level to determine whether to correct a read error based on the analyzed read error information; and a controller that adjusts the read voltage level of the first data page depending on the determination result. Through this, it is possible to reduce an error occurrence when reading and/or programming a data page.
摘要翻译：提供的是存储器件和存储器编程方法。存储器件可以包括：多级单元阵列，其包括多个多电平单元; 编程单元，其对所述多个多电平单元中的第一数据页进行编程，并从所述第一数据页被编程的所述多个多电平单元中编程多电平单元中的第二数据页; 误差分析单元，其基于读取电压电平分析与所述第一数据页相对应的读取错误信息，以基于所分析的读取错误信息来确定是否校正读取错误; 以及控制器，其根据确定结果调整第一数据页的读取电压电平。通过这种方式，可以在读取和/或编程数据页时减少错误发生。

10. 发明授权

US08122329B2 Methods of operating memory devices using error correction and rereading techniques 有权
标题翻译：使用纠错和重新读取技术来操作存储器件的方法
公开(公告)号：US08122329B2
公开(公告)日：2012-02-21
申请号：US12929161
申请日：2011-01-05
申请人： Jun Jin Kong , Sung Chung Park , Dongku Kang , Dong Hyuk Chae , Seung Jae Lee , Nam Phil Jo , Seung-Hwan Song
发明人： Jun Jin Kong , Sung Chung Park , Dongku Kang , Dong Hyuk Chae , Seung Jae Lee , Nam Phil Jo , Seung-Hwan Song
IPC分类号： H03M13/00 , G11C29/00
CPC分类号： G11C29/42 , G06F11/1068 , G11C11/5628 , G11C29/028 , G11C2029/0409 , G11C2029/0411
摘要： Various read level control apparatuses and methods are provided. In various embodiments, the read level control apparatuses may include an error control code (ECC) decoding unit for ECC decoding data read from a storage unit, and a monitoring unit for monitoring a bit error rate (BER) based on the ECC decoded data and the read data. The apparatus may additionally include an error determination unit for determining an error rate of the read data based on the monitored BER, and a level control unit for controlling a read level of the storage unit based on the error rate.
摘要翻译：提供各种读取级别控制装置和方法。在各种实施例中，读取级别控制装置可以包括用于对从存储单元读取的数据进行ECC解码的错误控制代码（ECC）解码单元和用于基于ECC解码数据监视误码率（BER）的监视单元，以及读数据。该装置还可以包括用于基于所监视的BER来确定读取数据的错误率的错误确定单元，以及用于基于错误率来控制存储单元的读取电平的电平控制单元。

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