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1. 发明申请

US20090289174A1 PHOTOELECTRIC CONVERSION DEVICE, DRIVING METHOD THEREOF, AND ELECTRONIC DEVICE PROVIDED WITH THE SAME 有权
标题翻译：光电转换装置及其驱动方法及其提供的电子装置
公开(公告)号：US20090289174A1
公开(公告)日：2009-11-26
申请号：US12467001
申请日：2009-05-15
申请人： Jun KOYAMA , Yoshifumi TANADA , Hideaki SHISHIDO , Seiko AMANO , Makoto YANAGISAWA
发明人： Jun KOYAMA , Yoshifumi TANADA , Hideaki SHISHIDO , Seiko AMANO , Makoto YANAGISAWA
IPC分类号： H03K17/78
CPC分类号： H04N5/37455 , G01J1/4204 , G01J1/46
摘要： Objects are to accumulate electric charge in a capacitor so that light intensity can be detected even when the amount of incident light is small, and to operate a photoelectric conversion device without increasing the number of elements such as a constant current source or a switch. The photoelectric conversion device includes a photoelectric conversion circuit, a capacitor, and a comparator for comparing a potential of one electrode of the capacitor with a second potential. The photoelectric conversion circuit includes a photoelectric conversion element and an amplifier circuit for amplifying an output current from the photoelectric conversion element In the capacitor, a first potential is supplied through a first switch, and charging or discharging is performed through a second switch in accordance with the current amplified by the amplifier circuit.
摘要翻译：目的是在电容器中蓄积电荷，使得即使入射光量较小也能够检测光强度，并且在不增加诸如恒流源或开关的元件数量的情况下操作光电转换装置。光电转换装置包括光电转换电路，电容器和用于将电容器的一个电极的电位与第二电位进行比较的比较器。光电转换电路包括光电转换元件和用于放大来自电容器中的光电转换元件的输出电流的放大电路，通过第一开关提供第一电位，并且通过第二开关执行充电或放电电流由放大电路放大。

2. 发明申请

US20090324244A1 PHOTOMETRIC DEVICE 有权
标题翻译：光学设备
公开(公告)号：US20090324244A1
公开(公告)日：2009-12-31
申请号：US12487287
申请日：2009-06-18
申请人： Jun KOYAMA , Seiko AMANO
发明人： Jun KOYAMA , Seiko AMANO
IPC分类号： H04B10/00
CPC分类号： G01J1/44 , G01J2001/4426 , H03F3/08
摘要： A photometric device with a wide dynamic range. The photometric device includes a constant current generation circuit, a fixed clock signal generation circuit which generates a fixed clock signal having a fixed frequency, a photoelectric conversion element, a variable clock signal generation circuit and a digital signal generation circuit. The fixed clock signal generation circuit generates a fixed clock signal that oscillates at a fixed frequency, from constant current The variable clock signal generation circuit generates a variable clock signal that oscillates at a frequency proportional to the amount of photocurrent, from photocurrent generated in the photoelectric conversion element. The digital signal generation circuit sets a measurement period using the fixed clock signal, counts the number of pulses of the variable clock signal that oscillates for the measurement period, and outputs a digital signal including the count value as data.
摘要翻译：具有宽动态范围的光度测量装置。测光装置包括恒流产生电路，产生具有固定频率的固定时钟信号的固定时钟信号产生电路，光电转换元件，可变时钟信号产生电路和数字信号产生电路。固定时钟信号产生电路从恒定电流产生以固定频率振荡的固定时钟信号。可变时钟信号发生电路产生以与光电流量成比例的频率振荡的可变时钟信号，光电流产生的光电流转换元素。数字信号发生电路使用固定时钟信号设置测量周期，对在测量周期中振荡的可变时钟信号的脉冲数进行计数，并将包括计数值的数字信号作为数据输出。

3. 发明申请

US20070090385A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20070090385A1
公开(公告)日：2007-04-26
申请号：US11548024
申请日：2006-10-10
申请人： Ryota FUKUMOTO , Mitsuaki OSAME , Hiroyuki MIYAKE , Yoshifumi TANADA , Seiko AMANO
发明人： Ryota FUKUMOTO , Mitsuaki OSAME , Hiroyuki MIYAKE , Yoshifumi TANADA , Seiko AMANO
IPC分类号： H01L33/00
CPC分类号： G09G3/20 , G02F1/1345 , G09G3/3225 , G09G2300/0426 , G09G2310/0275 , G09G2330/02 , H01L27/12
摘要： The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied to a logic portion and a buffer portion, by a method in which separate FPC terminals are used for the logic portion and the buffer portion, or by a method in which the FPC terminal is shared but a power line is branched for the logic portion and the buffer portion at a point close to the FPC terminal, a problem that the logic portion is affected by noise generated by a voltage drop of the power line due to instantaneous high-current consumption in the buffer portion can be prevented.
摘要翻译：本发明提供一种半导体器件，其中电源线由于由缓冲器部分中的瞬时大电流消耗引起的电压降而不受噪声影响，并且不可能使逻辑部分发生故障。在将逻辑部分和缓冲部分使用单独的FPC终端的方法或通过共享FPC终端的方法而将逻辑部分和缓冲部分提供相同的电位的情况下，电源线在逻辑部分和缓冲部分分配在靠近FPC终端的点处，由于缓冲器中的瞬时大电流消耗，逻辑部分受到电力线的电压降产生的噪声的影响可以防止部分。

4. 发明申请

US20130001608A1 LIGHT EMITTING DEVICE 有权
标题翻译：发光装置
公开(公告)号：US20130001608A1
公开(公告)日：2013-01-03
申请号：US13612249
申请日：2012-09-12
申请人： Seiko AMANO
发明人： Seiko AMANO
IPC分类号： H01L33/08
CPC分类号： H01L27/3276 , H01L27/1214 , H01L27/1244 , H01L27/3262 , H01L51/5246 , H01L51/5253 , H01L2251/5338 , H05B33/04
摘要： It is an object of the present invention to prevent an insulating film from peeling in a section where the insulating film is adjacent to a sealing region. Over a first substrate 104, a pixel portion 100 provided with a light emitting element, a source driver 101, a gate driver 102, and a sealing region 103 are provided. A light emitting element is sealed between the first substrate 104 and a second substrate 110 by a sealant 108. An insulating film 107 serves as a partition wall of the light emitting element. An end portion of the insulating film 107 which is adjacent to the sealing region 103 does not overlap with a step formed by a side surface and an upper surface of a conductive film 106 which serves as a wiring.
摘要翻译：本发明的目的是防止绝缘膜在绝缘膜与密封区域相邻的部分中剥离。在第一基板104上设置有设置有发光元件的像素部分100，源极驱动器101，栅极驱动器102和密封区域103。发光元件通过密封剂108密封在第一基板104和第二基板110之间。绝缘膜107用作发光元件的分隔壁。与密封区域103相邻的绝缘膜107的端部与由用作布线的导电膜106的侧面和上表面形成的台阶不重叠。

5. 发明申请

US20100035661A1 PHOTOELECTRIC CONVERSION DEVICE AND ELECTRONIC DEVICE HAVING THE SAME 有权
标题翻译：光电转换装置和具有该光电转换装置的电子装置
公开(公告)号：US20100035661A1
公开(公告)日：2010-02-11
申请号：US12512280
申请日：2009-07-30
申请人： Seiko AMANO , Hiroyuki MIYAKE
发明人： Seiko AMANO , Hiroyuki MIYAKE
IPC分类号： H04M1/00 , H03K4/94
CPC分类号： H03K4/06
摘要： To output a digital signal corresponding to illuminance without being adversely affected by circuit delay. A photoelectric conversion device includes a photoelectric conversion element; a ramp-wave output circuit; a first comparator for comparing the ramp-wave signal and a first potential; a second comparator for comparing the ramp-wave signal and a second potential; a flip-flop circuit for generating a clock signal whose frequency is changed in accordance with the amount of photocurrent; a circuit for calculating a negative OR of the output signal of the first comparator and the output signal of the second comparator; a counter circuit for counting the pulse number of the clock signal; and a pulse output circuit for generating a period during which the pulse number is counted in the counter circuit. The pulse output circuit includes a switch for stopping the generation of the period during which the pulse number is counted.
摘要翻译：输出对应于照度的数字信号，而不受电路延迟的不利影响。光电转换装置包括光电转换元件; 斜坡输出电路; 第一比较器，用于比较斜坡波信号和第一电位; 第二比较器，用于比较斜坡波信号和第二电位; 用于产生频率根据光电流量而变化的时钟信号的触发器电路; 用于计算第一比较器的输出信号和第二比较器的输出信号的负OR的电路; 用于对时钟信号的脉冲数进行计数的计数器电路; 以及用于产生在计数器电路中对脉冲数进行计数的周期的脉冲输出电路。脉冲输出电路包括用于停止脉冲数被计数的周期的产生的开关。

6. 发明申请

US20110122121A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110122121A1
公开(公告)日：2011-05-26
申请号：US13017065
申请日：2011-01-31
申请人： Ryota Fukumoto , Mitsuaki Osame , Hiroyuki Miyake , Yoshifumi Tanada , Seiko AMANO
发明人： Ryota Fukumoto , Mitsuaki Osame , Hiroyuki Miyake , Yoshifumi Tanada , Seiko AMANO
IPC分类号： G09G5/00 , H01L25/00
CPC分类号： G09G3/20 , G02F1/1345 , G09G3/3225 , G09G2300/0426 , G09G2310/0275 , G09G2330/02 , H01L27/12
摘要： The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied to a logic portion and a buffer portion, by a method in which separate FPC terminals are used for the logic portion and the buffer portion, or by a method in which the FPC terminal is shared but a power line is branched for the logic portion and the buffer portion at a point close to the FPC terminal, a problem that the logic portion is affected by noise generated by a voltage drop of the power line due to instantaneous high-current consumption in the buffer portion can be prevented.
摘要翻译：本发明提供一种半导体器件，其中电源线由于由缓冲器部分中的瞬时大电流消耗引起的电压降而不受噪声影响，并且不可能使逻辑部分发生故障。在将逻辑部分和缓冲部分使用单独的FPC终端的方法或通过共享FPC终端的方法而将逻辑部分和缓冲部分提供相同的电位的情况下，电源线在逻辑部分和缓冲部分分配在靠近FPC终端的点处，由于缓冲器中的瞬时大电流消耗，逻辑部分受到电力线的电压降产生的噪声的影响可以防止部分。

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