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    • 2. 发明授权
    • Wafer polishing slurry and chemical mechanical polishing (CMP) method using the same
    • 晶圆抛光浆和化学机械抛光(CMP)方法使用相同
    • US06514862B2
    • 2003-02-04
    • US09977239
    • 2001-10-16
    • Jae-dong LeeJong-won LeeBo-un YoonSang-rok Hah
    • Jae-dong LeeJong-won LeeBo-un YoonSang-rok Hah
    • H01L21302
    • C09G1/02H01L21/31053
    • A chemical mechanical polishing slurry includes an additive of a quaternary ammonium compound having a form of {N—(R1R2R3R4)}+X−, in which R1, R2, R3, and R4 are radicals, and X− is an anion derivative including halogen elements. Preferably, the quaternary ammonium compound is one of [(CH3)3NCH2CH2OH]Cl, [(CH3)3NCH2CH2OH]l, [(CH3)3NCH2CH2OH]Br, [(CH3)3NCH2CH2OH]CO3, and mixtures thereof. The slurry may further include a pH control agent formed of a base such as KOH, NH4OH, and (CH3)4NOH, and an acid such as HCl, H2SO4, H3PO4, and HNO3. Also, the pH control agent can include [(CH3)3NCH2CH2OH]OH. The slurry may further include a surfactant such as cetyldimethyl ammonium bromide, cetyldimethyl ammonium bromide, polyethylene oxide, polyethylene alcohol or polyethylene glycol.
    • 化学机械抛光浆料包括具有{N-(R1R2R3R4)} + X-形式的季铵化合物的添加剂,其中R 1,R 2,R 3和R 4是自由基,X是包含卤素的阴离子衍生物 元素。 优选地,季铵化合物是[(CH 3)3 NHCH 2 CH 2 OH] Cl,[(CH 3)3 NHCH 2 CH 2 OH] 1,[(CH 3)3 NHCH 2 CH 2 OH] Br,[(CH 3)3 NHCH 2 CH 2 OH] CO 3及其混合物之一。 该浆料还可以包括由碱如KOH,NH 4 OH和(CH 3)4 NOH形成的pH控制剂,以及酸如HCl,H 2 SO 4,H 3 PO 4和HNO 3。 此外,pH控制剂可以包括[(CH 3)3 NHCH 2 OH] OH。 浆料还可以包括表面活性剂如十六烷基二甲基溴化铵,鲸蜡基二甲基溴化铵,聚环氧乙烷,聚乙烯醇或聚乙二醇。
    • 4. 发明授权
    • Method of forming metal interconnection using plating and semiconductor device manufactured by the method
    • 使用该方法制造的使用电镀和半导体器件形成金属互连的方法
    • US06610596B1
    • 2003-08-26
    • US09662120
    • 2000-09-14
    • Jong-won LeeBo-un YoonKun-tack LeeSang-rok Hah
    • Jong-won LeeBo-un YoonKun-tack LeeSang-rok Hah
    • H01L2144
    • H01L21/7684H01L21/76879
    • A method is provided for forming a metal interconnection using a plating process, which can improve the throughput and reliability of semiconductor devices by decreasing the required polishing in a chemical mechanical polishing process. A semiconductor device manufactured by this method is also provided. In the method of forming a metal interconnection, a recess region is formed in a portion of an insulation layer formed over a substrate, i.e., where a metal interconnection layer will be formed. A diffusion prevention layer is formed over the substrate, the insulation layer, and the recess region. Then, a metal seed layer is formed over the diffusion prevention layer only in the recess region using a chemical mechanical polishing process or an etch back process. A conductive plating layer is then formed on the metal seed layer only in the recess region. Thereafter, surface polarization is performed to form a metal interconnection layer in the recess region. The plating layer may be formed after forming the seed layer only in the bottom portion of the recess region.
    • 提供了一种使用电镀工艺形成金属互连的方法,其可以通过减少化学机械抛光工艺中所需的抛光来提高半导体器件的生产能力和可靠性。 还提供了通过该方法制造的半导体器件。 在形成金属互连的方法中,在形成在基板上的绝缘层的一部分中,即将形成金属互连层的区域中形成凹陷区域。 在基板,绝缘层和凹部区域上形成扩散防止层。 然后,使用化学机械抛光工艺或回蚀工艺,仅在凹陷区域中在扩散防止层上形成金属种子层。 然后在金属种子层上仅在凹陷区域中形成导电镀层。 此后,进行表面极化以在凹部区域中形成金属互连层。 可以在仅在凹部的底部形成种子层之后形成镀层。
    • 10. 发明授权
    • Method of fabricating semiconductor device
    • 制造半导体器件的方法
    • US07846801B2
    • 2010-12-07
    • US11833050
    • 2007-08-02
    • Sung-jun KimSeong-kyu YunChang-ki HongBo-un YoonJong-won LeeHo-young Kim
    • Sung-jun KimSeong-kyu YunChang-ki HongBo-un YoonJong-won LeeHo-young Kim
    • H01L21/336
    • H01L29/66795H01L29/7851
    • Disclosed is a method of fabricating a semiconductor device including a multi-gate transistor. The method of fabricating a semiconductor device includes providing a semiconductor device having a number of active patterns which extend in a first direction, are separated by an isolation layer, and covered with a first insulating layer; forming a first groove by etching the isolation layer located between the active patterns adjacent to each other in the first direction; burying the first groove with a passivation layer; forming a second groove exposing at least a portion of both sides of the active patterns by etching the isolation layer located between the active patterns in a second direction intersecting the first direction; removing the passivation layer in the first groove; and forming a gate line filling at least a portion of the second groove and extending in the second direction.
    • 公开了一种制造包括多栅极晶体管的半导体器件的方法。 制造半导体器件的方法包括提供具有多个沿第一方向延伸的活性图案的半导体器件,被隔离层隔开并被第一绝缘层覆盖; 通过在第一方向上蚀刻位于彼此相邻的有源图案之间的隔离层来形成第一凹槽; 用钝化层掩埋第一槽; 通过在与所述第一方向相交的第二方向上蚀刻位于所述有源图案之间的所述隔离层来形成暴露所述有源图案的两侧的至少一部分的第二凹槽; 去除第一凹槽中的钝化层; 以及形成填充所述第二凹槽的至少一部分并沿所述第二方向延伸的栅极线。