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1. 发明授权

US06391710B1 Methods of forming capacitors 有权
标题翻译：形成电容器的方法
公开(公告)号：US06391710B1
公开(公告)日：2002-05-21
申请号：US09602832
申请日：2000-06-23
申请人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
发明人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
IPC分类号： H01L218242
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/3146 , Y10S438/924 , Y10S438/97
摘要： In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and c) etching the second material at a faster rate than the first material. In another aspect, the invention includes a capacitor forming method, comprising: a) forming a wordline over a substrate; b) defining a node proximate the wordline; c.) forming an etch stop layer over the wordline, the etch stop layer comprising carbon; d) forming an insulative layer over the etch stop layer; e) etching through the insulative layer to the etch stop layer to form an opening through the insulative layer; and e) forming a capacitor construction comprising a storage node, dielectric layer and second electrode, at least a portion of the capacitor construction being within the opening. In yet another aspect, the invention includes a semiconductive material assembly, comprising: a) a semiconductive substrate; and b) a layer over the semiconductive substrate, the layer comprising silicon, nitrogen and carbon.
摘要翻译：一方面，本发明包括蚀刻工艺，其包括：a）在衬底上提供第一材料，所述第一材料包含约2％至约20％的碳（重量）; b）在第一材料上提供第二材料; 以及c）以比所述第一材料更快的速率蚀刻所述第二材料。另一方面，本发明包括电容器形成方法，包括：a）在衬底上形成字线; b）定义靠近字线的节点; c）在所述字线上形成蚀刻停止层，所述蚀刻停止层包含碳; d）在所述蚀刻停止层上形成绝缘层; e）通过绝缘层蚀刻到蚀刻停止层以形成穿过绝缘层的开口; 以及e）形成包括存储节点，电介质层和第二电极的电容器结构，所述电容器结构的至少一部分在所述开口内。在另一方面，本发明包括半导体材料组件，其包括：a）半导体衬底; 以及b）半导体衬底上的层，该层包含硅，氮和碳。

2. 发明授权

US07115926B1 Capacitor constructions, DRAM constructions, and semiconductive material assemblies 有权
标题翻译：电容器结构，DRAM结构和半导体材料组件
公开(公告)号：US07115926B1
公开(公告)日：2006-10-03
申请号：US09603147
申请日：2000-06-23
申请人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
发明人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
IPC分类号： H01L27/108
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/3146 , Y10S438/924 , Y10S438/97
摘要： In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and c) etching the second material at a faster rate than the first material. In another aspect, the invention includes a capacitor forming method, comprising: a) forming a wordline over a substrate; b) defining a node proximate the wordline; c) forming an etch stop layer over the wordline, the etch stop layer comprising carbon; d) forming an insulative layer over the etch stop layer; e) etching through the insulative layer to the etch stop layer to form an opening through the insulative layer; and e) forming a capacitor construction comprising a storage node, dielectric layer and second electrode, at least a portion of the capacitor construction being within the opening. In yet another aspect, the invention includes a semiconductive material assembly, comprising: a) a semiconductive substrate; and b) a layer over the semiconductive substrate, the layer comprising silicon, nitrogen and carbon.
摘要翻译：一方面，本发明包括蚀刻工艺，其包括：a）在衬底上提供第一材料，所述第一材料包含约2％至约20％的碳（重量）; b）在第一材料上提供第二材料; 以及c）以比所述第一材料更快的速率蚀刻所述第二材料。另一方面，本发明包括电容器形成方法，包括：a）在衬底上形成字线; b）定义靠近字线的节点; c）在所述字线上形成蚀刻停止层，所述蚀刻停止层包含碳; d）在所述蚀刻停止层上形成绝缘层; e）通过绝缘层蚀刻到蚀刻停止层以形成穿过绝缘层的开口; 以及e）形成包括存储节点，电介质层和第二电极的电容器结构，所述电容器结构的至少一部分在所述开口内。在另一方面，本发明包括半导体材料组件，其包括：a）半导体衬底; 以及b）半导体衬底上的层，该层包含硅，氮和碳。

3. 发明授权

US06251802B1 Methods of forming carbon-containing layers 有权
标题翻译：形成含碳层的方法
公开(公告)号：US06251802B1
公开(公告)日：2001-06-26
申请号：US09175051
申请日：1998-10-19
申请人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
发明人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
IPC分类号： H01L2131
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/3146 , Y10S438/924 , Y10S438/97
摘要： In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and c) etching the second material at a faster rate than the first material. In another aspect, the invention includes a capacitor forming method, comprising: a) forming a wordline over a substrate; b) defining a node proximate the wordline; c) forming an etch stop layer over the wordline, the etch stop layer comprising carbon; d) forming an insulative layer over the etch stop layer; e) etching through the insulative layer to the etch stop layer to form an opening through the insulative layer; and e) forming a capacitor construction comprising a storage node, dielectric layer and second electrode, at least a portion of the capacitor construction being within the opening. In yet another aspect, the invention includes a semiconductive material assembly, comprising: a) a semiconductive substrate; and b) a layer over the semiconductive substrate, the layer comprising silicon, nitrogen and carbon.
摘要翻译：一方面，本发明包括蚀刻工艺，其包括：a）在衬底上提供第一材料，所述第一材料包含约2％至约20％的碳（重量）; b）在第一材料上提供第二材料; 以及c）以比所述第一材料更快的速率蚀刻所述第二材料。另一方面，本发明包括电容器形成方法，包括：a）在衬底上形成字线; b）定义靠近字线的节点; c）在所述字线上形成蚀刻停止层，所述蚀刻停止层包含碳; d）在所述蚀刻停止层上形成绝缘层; e）通过绝缘层蚀刻到蚀刻停止层以形成穿过绝缘层的开口; 以及e）形成包括存储节点，电介质层和第二电极的电容器结构，所述电容器结构的至少一部分在所述开口内。在另一方面，本发明包括半导体材料组件，其包括：a）半导体衬底; 以及b）半导体衬底上的层，该层包含硅，氮和碳。

4. 发明授权

US07358587B2 Semiconductor structures 有权
标题翻译：半导体结构
公开(公告)号：US07358587B2
公开(公告)日：2008-04-15
申请号：US11115833
申请日：2005-04-25
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21/76
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.
摘要翻译：在一个方面，本发明包括在开口内形成材料的方法，包括：a）在衬底上形成蚀刻停止层，所述蚀刻停止层具有穿过其中的开口以暴露下面的衬底的一部分，包括在所述开口的周边的上角，所述上角具有第一锐度锐角的角角; b）将角角的锐度降低到第二程度; c）在降低锐度之后，在开口内和蚀刻停止层上方形成材料层; 以及d）使用材料相对于蚀刻停止层选择性的方法对材料进行平面化，以将材料从蚀刻停止层上方移除，同时将材料留在开口内。

5. 发明授权

US06420268B2 Methods of forming materials within openings, and methods of forming isolation regions 有权
公开(公告)号：US06420268B2
公开(公告)日：2002-07-16
申请号：US09910340
申请日：2001-07-20
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21302
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.

6. 发明授权

US06884725B2 Methods of forming materials within openings, and methods of forming isolation regions 有权
标题翻译：在开口内形成材料的方法，以及形成隔离区域的方法
公开(公告)号：US06884725B2
公开(公告)日：2005-04-26
申请号：US10145562
申请日：2002-05-14
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21/3105 , H01L21/76 , H01L21/762 , H01L21/461
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.
摘要翻译：在一个方面，本发明包括在开口内形成材料的方法，包括：a）在衬底上形成蚀刻停止层，所述蚀刻停止层具有穿过其中的开口以暴露下面的衬底的一部分，以及包括在所述开口的周边的上角，所述上角具有第一锐度锐角的角角; b）将角角的锐度降低到第二程度; c）在降低锐度之后，在开口内和蚀刻停止层上方形成材料层; 以及d）使用材料相对于蚀刻停止层选择性的方法对材料进行平面化，以将材料从蚀刻停止层上方移除，同时将材料留在开口内。

7. 发明授权

US06274498B1 Methods of forming materials within openings, and method of forming isolation regions 有权
标题翻译：在开口内形成材料的方法，以及形成隔离区域的方法
公开(公告)号：US06274498B1
公开(公告)日：2001-08-14
申请号：US09146730
申请日：1998-09-03
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21461
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.
摘要翻译：在一个方面，本发明包括在开口内形成材料的方法，包括：a）在衬底上形成蚀刻停止层，所述蚀刻停止层具有穿过其中的开口以暴露下面的衬底的一部分，包括在所述开口的周边的上角，所述上角具有第一锐度锐角的角角; b）将角角的锐度降低到第二程度; c）在降低锐度之后，在开口内和蚀刻停止层上方形成材料层; 以及d）使用材料相对于蚀刻停止层选择性的方法对材料进行平面化，以将材料从蚀刻停止层上方移除，同时将材料留在开口内。

8. 发明授权

US07936955B2 Waveguide for thermo optic device 有权
标题翻译：波导用于光电装置
公开(公告)号：US07936955B2
公开(公告)日：2011-05-03
申请号：US12780601
申请日：2010-05-14
申请人： Guy T. Blalock , Howard E. Rhodes , Vishnu K. Agarwal , Gurtej Singh Sandhu , James S. Foresi , Jean-Francois Viens , Dale G. Fried
发明人： Guy T. Blalock , Howard E. Rhodes , Vishnu K. Agarwal , Gurtej Singh Sandhu , James S. Foresi , Jean-Francois Viens , Dale G. Fried
IPC分类号： G02B6/26
CPC分类号： G02F1/025 , G02B6/125 , G02B6/136 , G02B2006/12107 , G02B2006/12164 , G02F1/0147 , G02F2203/15
摘要： A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.
摘要翻译：波导和谐振器形成在热光器件的下包层上，每个具有基本上相等的形成高度。此后，波导的形成高度被衰减。以这种方式，波导和谐振器在波导和谐振器前面或彼此面对的区域（与现有技术相比）中的波导和谐振器之间的纵横比，从而恢复波导和光栅之间的同步性并允许更高的带宽配置要使用的。在形成谐振器和波导之后，通过光掩模和蚀刻波导来实现波导衰减。在一个实施例中，在沉积上部包层之后进行光掩模和蚀刻。另一方面，它是在沉积之前进行的。还教导了具有这些波导的热光器件，热光封装和光纤系统。

9. 发明授权

US07582562B2 Atomic layer deposition methods 有权
标题翻译：原子层沉积法
公开(公告)号：US07582562B2
公开(公告)日：2009-09-01
申请号：US11244859
申请日：2005-10-06
申请人： Guy T. Blalock
发明人： Guy T. Blalock
IPC分类号： H01L21/44
CPC分类号： H01L21/28562 , C23C16/14 , C23C16/34 , C23C16/45527 , C23C16/45538 , C23C16/50
摘要： An atomic layer deposition method includes providing a semiconductor substrate within a deposition chamber. A first metal halide-comprising precursor gas is flowed to the substrate within the chamber effective to form a first monolayer on the substrate. The first monolayer comprises metal and halogen of the metal halide. While flowing the first metal halide-comprising precursor gas to the substrate, H2 is flowed to the substrate within the chamber. A second precursor gas is flowed to the first monolayer effective to react with the first monolayer and form a second monolayer on the substrate. The second monolayer comprises the metal. At least some of the flowing of the first metal halide-comprising precursor gas, at least some of the flowing of the H2, and at least some of the flowing of the second precursor gas are repeated effective to form a layer of material comprising the metal on the substrate.
摘要翻译：原子层沉积方法包括在沉积室内提供半导体衬底。第一含金属卤化物的前体气体流入室内的衬底，有效地在衬底上形成第一单层。第一单层包括金属卤化物的金属和卤素。在将第一含金属卤化物的前体气体流动到衬底的同时，H 2流到腔室内的衬底。第二前体气体流向第一单层，有效地与第一单层反应并在基底上形成第二单层。第二单层包含金属。第一含金属卤化物的前体气体的至少一些流动，H 2的至少一些流动以及第二前体气体的至少一些流动被重复有效地形成包含金属的材料层在基板上。

10. 再颁专利

USRE40790E1 Method for making electrical contact with an active area through sub-micron contact openings and a semiconductor device 有权
标题翻译：通过亚微米接触开口与有源区域电接触的方法和半导体器件
公开(公告)号：USRE40790E1
公开(公告)日：2009-06-23
申请号：US09488099
申请日：2000-01-18
申请人： Charles H. Dennison , Guy T. Blalock
发明人： Charles H. Dennison , Guy T. Blalock
IPC分类号： H01L21/44 , H01L21/48
CPC分类号： H01L21/76897 , H01L23/485 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A semiconducting processing method for making electrical contacts with an active area in sub-micron geometries includes: (a) providing a pair of conductive runners on a semiconductor wafer; (b) providing insulative spacers on the sides of the conductive runners wherein adjacent spacers are spaced a selected distance apart at a selected location on the wafer; (c) providing an active area between the conductive runners at the selected location; (d) providing an oxide layer over the active area and conductive runners; (e) providing a planarized nitride layer atop the oxide layer; (f) patterning and etching the nitride layer selectively relative to the oxide layer to define a first contact opening therethrough, wherein the first contact opening has an aperture width at the nitride layer upper surface which is greater than the selected distance between the insulative spacers; (g) etching the oxide layer within the first contact opening to expose the active area; (h) providing a polysilicon plug within the first contact opening over the exposed active areas; (i) providing an insulating layer over the nitride layer and the polysilicon plug; (j) patterning and etching the insulating layer to form a second contact opening to and exposing the polysilicon plug; and (k) providing a conductive layer over the insulating layer and into the second opening to electrically contact the polysilicon plug. A semiconductor device having buried landing plugs of approximately uniform height across the wafer is also described.
摘要翻译：用于与亚微米几何形状的有源区进行电接触的半导体处理方法包括：（a）在半导体晶片上提供一对导电流道; （b）在导电流道的侧面上设置绝缘间隔物，其中相邻的间隔物在晶片上的选定位置间隔一段距离; （c）在所选位置的导电流道之间提供有效区域; （d）在有源区域和导电流道上提供氧化物层; （e）在氧化物层的顶部提供平坦化的氮化物层; （f）相对于所述氧化物层选择性地图案化和蚀刻所述氮化物层以限定穿过其中的第一接触开口，其中所述第一接触开口在所述氮化物层上表面处具有大于所述绝缘间隔物之间的所选距离的孔径宽度; （g）蚀刻第一接触开口内的氧化物层以暴露有源区; （h）在所述暴露的有源区域之上的所述第一接触开口内提供多晶硅插塞; （i）在氮化物层和多晶硅插塞上方提供绝缘层; （j）图案化和蚀刻绝缘层以形成第二接触开口并暴露多晶硅插塞; 和（k）在绝缘层上提供导电层并进入第二开口以电接触多晶硅插塞。还描述了具有跨越晶片大致均匀高度的埋地层塞的半导体器件。

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