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1. 发明授权

US07206930B2 Method and apparatus for reducing strapping devices 有权
标题翻译：减少捆扎装置的方法和装置
公开(公告)号：US07206930B2
公开(公告)日：2007-04-17
申请号：US11002258
申请日：2004-12-03
申请人： Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
发明人： Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
IPC分类号： G06F9/24
CPC分类号： G06F13/4004 , G06F13/423 , G06F2213/0024
摘要： A method is provided to reduce strapping devices in a computer system having at least one configurable device, which includes the following steps. A configuration value stored in a non-volatile memory is first provided. During power-up and reset of the computer system, a processor reset signal and a bus reset signal of a high-speed peripheral bus are both asserted, wherein the high-speed peripheral bus is included in the computer system. When an operation clock of the high-speed peripheral bus reaches its working voltage and frequency, the configuration value is fetched from the non-volatile memory. The fetching step is repeated until a most significant bit (MSB) of a fetched configuration value changes from a first state to a second state. Subsequently, the configuration value fetched from the non-volatile memory is asserted to the at least one configurable device to configure the configurable device, and then the processor reset signal is deasserted, and the at least one configurable device is thereby completely configured.
摘要翻译：提供了一种减少具有至少一个可配置设备的计算机系统中的捆扎设备的方法，其包括以下步骤。首先提供存储在非易失性存储器中的配置值。在计算机系统的上电和复位期间，高速外设总线的处理器复位信号和总线复位信号都被断言，其中高速外设总线被包括在计算机系统中。当高速外设总线的工作时钟达到其工作电压和频率时，从非易失性存储器中取出配置值。取出步骤被重复，直到获取的配置值的最高有效位（MSB）从第一状态改变到第二状态。随后，从非易失性存储器取出的配置值被断言给至少一个可配置设备以配置可配置设备，然后解除处理器复位信号，并且由此完全配置至少一个可配置设备。

2. 发明授权

US06845444B2 Method and apparatus for reducing strapping devices 失效
标题翻译：减少捆扎装置的方法和装置
公开(公告)号：US06845444B2
公开(公告)日：2005-01-18
申请号：US09934574
申请日：2001-08-23
申请人： Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
发明人： Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
IPC分类号： G06F3/00 , G06F9/24 , G06F13/40 , G06F13/42
CPC分类号： G06F13/4004 , G06F13/423 , G06F2213/0024
摘要： A method is provided to reduce strapping devices in a computer system having at least one configurable device, which includes the following steps. A configuration value stored in a non-volatile memory is first provided. During power-up and reset of the computer system, a processor reset signal and a bus reset signal of a high-speed peripheral bus are both asserted, wherein the high-speed peripheral bus is included in the computer system. When an operation clock of the high-speed peripheral bus reaches its working voltage and frequency, the configuration value is fetched from the non-volatile memory. The fetching step is repeated until a most significant bit (MSB) of a fetched configuration value changes from a first state to a second state. Subsequently, the configuration value fetched from the non-volatile memory is asserted to the at least one configurable device to configure the configurable device, and then the processor reset signal is deasserted, and the at least one configurable device is thereby completely configured.
摘要翻译：提供了一种减少具有至少一个可配置设备的计算机系统中的捆扎设备的方法，其包括以下步骤。首先提供存储在非易失性存储器中的配置值。在计算机系统的上电和复位期间，高速外设总线的处理器复位信号和总线复位信号都被断言，其中高速外设总线被包括在计算机系统中。当高速外设总线的工作时钟达到其工作电压和频率时，从非易失性存储器中取出配置值。取出步骤被重复，直到获取的配置值的最高有效位（MSB）从第一状态改变到第二状态。随后，从非易失性存储器取出的配置值被断言给至少一个可配置设备以配置可配置设备，然后解除处理器复位信号，并且由此完全配置至少一个可配置设备。

3. 发明申请

US20050080938A1 Method and apparatus for reducing strapping devices 有权
公开(公告)号：US20050080938A1
公开(公告)日：2005-04-14
申请号：US11002258
申请日：2004-12-03
申请人： Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
发明人： Jen-Pin Su , Chun-Chieh Wu , Chao-Yu Chen
IPC分类号： G06F3/00 , G06F9/24 , G06F13/40 , G06F13/42
CPC分类号： G06F13/4004 , G06F13/423 , G06F2213/0024
摘要： A method is provided to reduce strapping devices in a computer system having at least one configurable device, which includes the following steps. A configuration value stored in a non-volatile memory is first provided. During power-up and reset of the computer system, a processor reset signal and a bus reset signal of a high-speed peripheral bus are both asserted, wherein the high-speed peripheral bus is included in the computer system. When an operation clock of the high-speed peripheral bus reaches its working voltage and frequency, the configuration value is fetched from the non-volatile memory. The fetching step is repeated until a most significant bit (MSB) of a fetched configuration value changes from a first state to a second state. Subsequently, the configuration value fetched from the non-volatile memory is asserted to the at least one configurable device to configure the configurable device, and then the processor reset signal is deasserted, and the at least one configurable device is thereby completely configured.

4. 发明授权

US06317813B1 Method for arbitrating multiple memory access requests in a unified memory architecture via a non unified memory controller 失效
标题翻译：通过非统一存储器控制器在统一存储器架构中仲裁多个存储器访问请求的方法
公开(公告)号：US06317813B1
公开(公告)日：2001-11-13
申请号：US09314245
申请日：1999-05-18
申请人： Jen-Pin Su , Chun-Chieh Wu , Wen-Hsiang Lin , Tsan-hui Chen
发明人： Jen-Pin Su , Chun-Chieh Wu , Wen-Hsiang Lin , Tsan-hui Chen
IPC分类号： G06F1200
CPC分类号： G06F13/18
摘要： In a memory controller system, a method for granting a system memory by a memory request arbitrator to a request among a plurality of pending memory access requests is provided. The plurality of the memory access requests includes Rfrsh_Hreq, Crt_Hreq, Group AB, Crt_Lreq and Rfrsh_Lreq and are respectively asserted by a host control circuitry and/or a graphical control circuitry which are implemented and integrated on a single monolithic semiconductor chip. The host control circuitry and the graphical control circuitry shares the system memory and the memory request arbitrator includes a refresh queue and the graphics control circuitry includes a CRT FIFO. The method prioritizes the plurality of the memory access requests in order of Rfrsh_Hreq>Crt_Hreq>Group AB>Crt_Lreq>Rfrsh_Lreq. The Rfsh_Hreq is memory refresh request signal of first type whenever the refresh queue being full, the Crt_Hreq is memory access signal of a first type for fueling the CRT FIFO with display data, the Group AB are memory access request signals of a second type output either from the graphical control circuitry or the host control circuitry, the Crt_Lreq is memory access signal of a third type for fueling the CRT FIFO with display data, the Rfrsh_Lreq is memory refresh request signal of second type whenever the refresh queue being non-empty.
摘要翻译：在存储器控制器系统中，提供了一种通过存储器请求仲裁器将系统存储器授予多个未决存储器访问请求中的请求的方法。多个存储器访问请求包括Rfrsh_Hreq，Crt_Hreq，组AB，Crt_Lreq和Rfrsh_Lreq，并且分别由实现并集成在单个单片半导体芯片上的主机控制电路和/或图形控制电路断言。主机控制电路和图形控制电路共享系统存储器，并且存储器请求仲裁器包括刷新队列，并且图形控制电路包括CRT FIFO。该方法按照Rfrsh_Hreq> Crt_Hreq> Group AB> Crt_Lreq> Rfrsh_Lreq的顺序对多个存储器访问请求进行优先级排序。 Rfsh_Hreq是刷新队列满时的第一种类型的存储器刷新请求信号，Crt_Hreq是用于向显示数据供给CRT FIFO的第一种存储器访问信号，组AB是第二类型输出的存储器访问请求信号从图形控制电路或主机控制电路，Crt_Lreq是用于向CRT FIFO加载显示数据的第三种存储器访问信号，每当刷新队列不为空时，Rfrsh_Lreq是第二类型的存储器刷新请求信号。

5. 发明授权

US06424189B1 Apparatus and system for multi-stage event synchronization 失效
标题翻译：多级事件同步的装置和系统
公开(公告)号：US06424189B1
公开(公告)日：2002-07-23
申请号：US09687418
申请日：2000-10-13
申请人： Jen-Pin Su , Tsan-Hui Chen , Wen-Hsiang Lin , Chun-Chieh Wu , Chang-Fu Lin
发明人： Jen-Pin Su , Tsan-Hui Chen , Wen-Hsiang Lin , Chun-Chieh Wu , Chang-Fu Lin
IPC分类号： H03L700
CPC分类号： G06F5/06 , H04L7/005 , H04L7/02
摘要： The present invention discloses an apparatus and system for multi-stage event synchronization, whose main object is to eliminate the drawbacks of an expensive synchronization circuit used to balance the data transmissions between an origination agent and a destination agent operating at different frequencies or clock phases as in prior art. The apparatus of the present invention organizes the slower one with multi-stage chains, each of which comprises a simple synchronization circuit and an XOR gate, for receiving the number of events transmitted from the faster one. Therefore, the slower one will not miss the data from the faster one.
摘要翻译：本发明公开了一种用于多级事件同步的装置和系统，其主要目的是消除用于平衡在不同频率或时钟相位工作的发起代理和目的代理之间的数据传输的昂贵的同步电路的缺点，如在现有技术中。本发明的装置组合了具有多级链的较慢级的链，其中每一级都包括一个简单的同步电路和一个异或门，用于接收从较快级链发送的事件数。因此，较慢的数据不会错过更快的数据。

6. 发明授权

US07436667B2 Electronic device 有权
标题翻译：电子设备
公开(公告)号：US07436667B2
公开(公告)日：2008-10-14
申请号：US11545419
申请日：2006-10-11
申请人： Chun-Chieh Wu , Hung-Chun Chu , Hsi-Feng Lin
发明人： Chun-Chieh Wu , Hung-Chun Chu , Hsi-Feng Lin
IPC分类号： H05K7/20 , F28F7/00
CPC分类号： G06F1/20 , H01L23/467 , H01L2924/0002 , H01L2924/00
摘要： An electronic device has a first circuit board, a first fan, a second circuit board, a first heat sink, and a first air ventilation duct. The first fan and the first circuit board are electrically connected together. The second circuit board is electrically connected to the first circuit board; the first heat sink is electrically connected to the second circuit board; and the first air ventilation duct is connected to the first fan and the first heat sink. The first heat sink introduce the heat generated by the electronic element on the second circuit board to the first fan for better cooling performance. Therefore, the present invention requires only the first fan and the second fan, but is able to provide high cooling efficiencies with a low noise signature.
摘要翻译：电子设备具有第一电路板，第一风扇，第二电路板，第一散热器和第一空气通风导管。第一风扇和第一电路板电连接在一起。第二电路板电连接到第一电路板; 第一散热器电连接到第二电路板; 并且第一通风管道连接到第一风扇和第一散热器。第一散热器将第二电路板上的电子元件产生的热量引入第一风扇以获得更好的冷却性能。因此，本发明仅需要第一风扇和第二风扇，但是能够以低噪声特征提供高冷却效率。

7. 发明申请

US20110062980A1 Probe device having first and second probe pins 有权
公开(公告)号：US20110062980A1
公开(公告)日：2011-03-17
申请号：US12557842
申请日：2009-09-11
申请人： Chun-Chieh Wu
发明人： Chun-Chieh Wu
IPC分类号： G01R31/02 , G01R1/067
CPC分类号： G01R3/00 , G01R1/07314 , G01R1/0735
摘要： A probe device includes a probe body having a plurality of first holes extending through a first face thereof and a plurality of second holes aligned with the first holes and extending through an opposite second face thereof, a plurality of spaced-apart first probe pins inserted fittingly and removably into respective first holes and each including a first contact portion extending out of the first face, and a first connecting portion extending into the respective first hole, and a plurality of spaced-apart second probe pins inserted fittingly and removably into respective second holes and each including a second contact portion extending out of the second face, and a second connecting portion extending into the respective second hole and having an insert space. The first connecting portion is inserted fittingly and removably into the insert space, and mates with the second connecting portion.

8. 发明授权

US07577783B2 Portable data storage device and method of dynamic memory management therefor 有权
标题翻译：便携式数据存储设备及其动态内存管理方法
公开(公告)号：US07577783B2
公开(公告)日：2009-08-18
申请号：US11381403
申请日：2006-05-03
申请人： Chang-Wei Hsu , Chun-Chieh Wu
发明人： Chang-Wei Hsu , Chun-Chieh Wu
IPC分类号： G06F12/00
CPC分类号： G11C29/883 , G11C29/765 , G11C29/88
摘要： A portable data storage device includes a first storage unit having a data storing zone and a reserved zone for bad blocks in the first storage unit, and a second storage unit having a look-up table. The look-up table lists a number of configuration modes for the portable data storage device, each defining specific allocation sizes for the reserved zone and the data storing zone. The portable data storage device is configured to use a kth configuration mode. A method for dynamic memory management includes: i) determining a number of the bad blocks assigned to the reserved zone; ii) with reference to the look-up table, determining if this number is greater than a limit associated with the kth configuration mode; and iii) if so, reconfiguring the portable data storage device to use a (k+1)th configuration mode.
摘要翻译：便携式数据存储装置包括具有第一存储单元中的坏块的数据存储区和预留区的第一存储单元和具有查找表的第二存储单元。查找表列出了便携式数据存储设备的多个配置模式，每个配置模式定义了保留区域和数据存储区域的特定分配大小。便携式数据存储装置被配置为使用第k种配置模式。一种用于动态存储器管理的方法包括：i）确定分配给保留区的坏块的数量; ii）参考查找表，确定该数量是否大于与第k个配置模式相关联的限制; 以及iii）如果是，则将便携式数据存储装置重新配置为使用第（k + 1）配置模式。

9. 发明申请

US20070268670A1 Electronic device 审中-公开
标题翻译：电子设备
公开(公告)号：US20070268670A1
公开(公告)日：2007-11-22
申请号：US11798437
申请日：2007-05-14
申请人： Hung-Chun Chu , Chun-Chieh Wu
发明人： Hung-Chun Chu , Chun-Chieh Wu
IPC分类号： H05K7/20
CPC分类号： H01L23/427 , F28D15/0266 , F28F1/32 , H01L2924/0002 , H01L2924/00
摘要： An electronic device with a heat dissipation device is described. A printed circuit board has a first electronic component and a second electronic component thereon. The first dissipation device is attached to the first electronic component. The second dissipation device is attached to the second electronic component. At least one heat pipe includes a first straight section, a second straight section and a bent section between the former two. The heat pipe penetrates the first dissipation device and the second dissipation device, wherein the second dissipation device has at least one side engraved slot for securing the heat pipe inside.
摘要翻译：描述具有散热装置的电子装置。印刷电路板在其上具有第一电子部件和第二电子部件。第一耗散装置连接到第一电子部件。第二耗散装置附接到第二电子部件。至少一个热管包括第一直线部分，第二直线部分和前两者之间的弯曲部分。热管穿透第一耗散装置和第二耗散装置，其中第二耗散装置具有用于将热管固定在其中的至少一个侧面刻槽。

10. 发明申请

US20060250720A1 PORTABLE DATA STORAGE DEVICE AND METHOD OF DYNAMIC MEMORY MANAGEMENT THEREFOR 有权
标题翻译：便携式数据存储设备及其动态存储器管理方法
公开(公告)号：US20060250720A1
公开(公告)日：2006-11-09
申请号：US11381403
申请日：2006-05-03
申请人： Chang-Wei Hsu , Chun-Chieh Wu
发明人： Chang-Wei Hsu , Chun-Chieh Wu
IPC分类号： G11B5/09
CPC分类号： G11C29/883 , G11C29/765 , G11C29/88
摘要： A portable data storage device includes a first storage unit having a data storing zone and a reserved zone for bad blocks in the first storage unit, and a second storage unit having a look-up table. The look-up table lists a number of configuration modes for the portable data storage device, each defining specific allocation sizes for the reserved zone and the data storing zone. The portable data storage device is configured to use a kth configuration mode. A method for dynamic memory management includes: i) determining a number of the bad blocks assigned to the reserved zone; ii) with reference to the look-up table, determining if this number is greater than a limit associated with the kth configuration mode; and iii) if so, reconfiguring the portable data storage device to use a (k+1)th configuration mode.
摘要翻译：便携式数据存储装置包括具有第一存储单元中的坏块的数据存储区和预留区的第一存储单元和具有查找表的第二存储单元。查找表列出了便携式数据存储设备的多个配置模式，每个配置模式定义了保留区域和数据存储区域的特定分配大小。便携式数据存储装置被配置为使用第k种配置模式。一种用于动态存储器管理的方法包括：i）确定分配给保留区的坏块的数量; ii）参考查找表，确定该数量是否大于与第k个配置模式相关联的限制; 以及iii）如果是，则将便携式数据存储装置重新配置为使用第（k + 1）配置模式。

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