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    • 1. 发明授权
    • CMOS image sensor devices
    • CMOS图像传感器设备
    • US07423306B2
    • 2008-09-09
    • US11527464
    • 2006-09-27
    • J. C. LiuTzu-Hsuan HsuChien-Hsien TsengDun-Nian YaungShou-Gwo Wuu
    • J. C. LiuTzu-Hsuan HsuChien-Hsien TsengDun-Nian YaungShou-Gwo Wuu
    • H01L21/00
    • H01L27/1463H01L27/14609H01L27/14627H01L27/14632H01L27/14645
    • A pixel comprises a substrate comprising a first well region formed in a top portion of the substrate, having a first conductivity type. A plurality of shallow trench isolation (STI) structures is formed in the first well region of the substrate, defining a pixel region over the substrate. A second well region is formed in a potion of the first well region of the pixel region, having a second conductivity type opposite to the first conductivity type. A top surface region is formed in a top portion of the second well region, having the first conductivity type. A MOS transistor formed on portions the pixel region, having a pair of source/drain regions formed in the first well region, wherein the source/drain regions are formed of the second conductivity type and one thereof electrically connects the first and well doping regions and the first well region is formed with a depth greater than that of the adjacent STI structure.
    • 像素包括基板,该基板包括形成在基板顶部的第一阱区域,具有第一导电类型。 在衬底的第一阱区域中形成多个浅沟槽隔离(STI)结构,在衬底上限定像素区域。 第二阱区形成在像素区的第一阱区的一个部分中,具有与第一导电类型相反的第二导电类型。 顶表面区域形成在具有第一导电类型的第二阱区域的顶部。 形成在像素区域的部分上的MOS晶体管,其具有形成在第一阱区域中的一对源极/漏极区域,其中源极/漏极区域由第二导电类型形成,并且其中一个电连接第一和阱掺杂区域, 第一阱区域的深度大于相邻STI结构的深度。