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    • 1. 发明授权
    • Object oriented on-chip messaging
    • 面向对象的片上消息传递
    • US06549954B1
    • 2003-04-15
    • US09378877
    • 1999-08-23
    • J. Andrew LambrechtAlfred C. HartmannGary M. Godrey
    • J. Andrew LambrechtAlfred C. HartmannGary M. Godrey
    • G06F1300
    • H04L12/42H04L29/06H04L69/08
    • A system and method that operate on data in a communication system. The system comprises a communication network for routing objects that include data and a tag and comprised of processing modules for processing the data included in the objects and routing nodes that are operable to route the objects between the processing modules. Each processing module includes a processing memory for storing objects. Each routing node includes a routing memory for storing memory objects and is operable to route objects throughout the system. The objects include stored objects stored in various ones of the respective processing memories and the respective routing memories. Each stored object further includes methods that are executable to perform operations on the data and a processing list that lists the methods to be executed on the data. Each processing node interrogates objects to examine the processing list and execute methods identified by the processing list to perform corresponding operations on the data. The method routes objects in the communication system.
    • 对通信系统中的数据进行操作的系统和方法。 该系统包括用于路由包括数据和标签的对象的通信网络,并且包括用于处理包括在对象中的数据的处理模块和可操作以在处理模块之间路由对象的路由节点。 每个处理模块包括用于存储对象的处理存储器。 每个路由节点包括用于存储存储器对象的路由存储器,并且可操作以在整个系统中路由对象。 对象包括存储在各个处理存储器和相应路由存储器中的各种存储对象。 每个存储对象还包括可执行以对数据执行操作的方法和列出要在数据上执行的方法的处理列表。 每个处理节点询问对象以检查处理列表并执行由处理列表标识的方法以对数据执行相应的操作。 该方法在通信系统中路由对象。
    • 2. 发明授权
    • Scalable mesh architecture with reconfigurable paths for an on-chip data transfer network incorporating a network configuration manager
    • 具有可重构路径的可扩展网状结构,用于集成了网络配置管理器的片上数据传输网络
    • US06275975B1
    • 2001-08-14
    • US09189762
    • 1998-11-10
    • J. Andrew LambrechtAlfred C. HartmannGary Michael Godfrey
    • J. Andrew LambrechtAlfred C. HartmannGary Michael Godfrey
    • G06F1750
    • G06F15/7825
    • A computer chip including a data transfer network which comprises a plurality of communications links for transmitting data, a plurality of communication nodes, and a plurality of modules. Each of the communication nodes is directly connected to two or more other communication nodes through respective ones of the communications links. Each communication node is operable to communicate data over the respective one of the communications links. Each module is coupled to at least one of the communication nodes, and the modules are operable to communicate with each other through the communication nodes. The communication nodes are operable to create dynamic routes for the data transferred between any two or more of the plurality of modules over the respective ones of the communications links. The communication nodes form the dynamic routes controlled by a network configuration manager.
    • 一种包括数据传输网络的计算机芯片,包括用于发送数据的多个通信链路,多个通信节点和多个模块。 每个通信节点通过相应的通信链路直接连接到两个或更多个其他通信节点。 每个通信节点可操作以在相应的一个通信链路上传送数据。 每个模块耦合到至少一个通信节点,并且模块可操作以通过通信节点彼此通信。 通信节点可操作以为通过各个通信链路的多个模块中的任意两个或多个之间传送的数据创建动态路由。 通信节点形成由网络配置管理器控制的动态路由。
    • 3. 发明授权
    • Data transfer network on a computer chip utilizing combined bus and ring
topologies
    • 使用组合总线和环形拓扑的计算机芯片上的数据传输网络
    • US6111859A
    • 2000-08-29
    • US957589
    • 1997-10-24
    • Gary M. GodfreyJ. Andrew LambrechtAlfred C. Hartmann
    • Gary M. GodfreyJ. Andrew LambrechtAlfred C. Hartmann
    • H04L12/42H04L29/06H04L2/28
    • H04L12/42H04L29/06H04L69/08
    • A computer chip includes a data transfer network. The data transfer network comprises a backbone bus, a plurality of communication ports and a plurality of devices or modules each coupled to the backbone bus. Each of the devices includes or is coupled to one or more communication ports. Some of communication ports are operable to transmit and receive data on the backbone bus. Furthermore, the communication ports are interconnected in a ring topology forming a circular bus or a semi-circular bus. A subset of the communication ports may transmit and receive data on the circular bus or semi-circular bus. For the semi-circular bus, the communication ports are not coupled to form a complete ring topology. The communication ports may be operable to communicate with each other over the backbone bus and/or the circular bus. Each of the communication ports includes backbone bus interface logic, circular bus interface logic, one or more data transfer buffers and/or control logic. The communication ports are preferably able to transfer communications between the backbone bus, the circular bus and/or the modules.
    • 计算机芯片包括数据传输网络。 数据传输网络包括骨干总线,多个通信端口以及各自耦合到骨干总线的多个设备或模块。 每个设备包括或耦合到一个或多个通信端口。 一些通信端口可用于在骨干总线上发送和接收数据。 此外,通信端口以环形拓扑互连,形成圆形总线或半圆形总线。 通信端口的子集可以在圆形总线或半圆形总线上发送和接收数据。 对于半圆形总线,通信端口不耦合以形成完整的环形拓扑。 通信端口可以可操作以通过骨干总线和/或循环总线彼此通信。 每个通信端口包括主干总线接口逻辑,循环总线接口逻辑,一个或多个数据传输缓冲器和/或控制逻辑。 通信端口优选地能够在骨干总线,圆形总线和/或模块之间传送通信。
    • 4. 发明授权
    • Dynamically configured on-chip communications paths based on statistical analysis
    • 基于统计分析的动态配置的片上通信路径
    • US06247161B1
    • 2001-06-12
    • US09145011
    • 1998-09-01
    • J. Andrew LambrechtAlfred C. HartmannGary Michael Godfrey
    • J. Andrew LambrechtAlfred C. HartmannGary Michael Godfrey
    • G06F1750
    • G06F17/5054G06F17/5077
    • A computer chip including a data transfer network which comprises a plurality of communications links for transmitting data, a plurality of communication nodes, and a plurality of modules. Each of the communication nodes is directly connected to two or more other communication nodes through respective ones of the communications links. Each communication node is operable to communicate data over the respective one of the communications links. Each module is coupled to at least one of the communication nodes, and the modules are operable to communicate with each other through the communication nodes. The communication nodes are operable to create dynamic routes for the data transferred between any two or more of the plurality of modules over the respective ones of the communications links. The communication nodes form the dynamic routes based on statistical data on previous transmissions between the modules. Each communication node may include respective configuration logic for dynamically configuring the dynamic routes, and each configuration logic may include a memory for storing the statistical data on previous transmissions that passed through the respective communications node. The data transfer network may also comprise a routing module for controlling the dynamic routes based on statistical data. The routing module couples to each communication node and monitors the configuration logic. When present and functioning, the routing module adapts the dynamic routes based on an analysis of the statistical data. The statistical data includes one or more of the following for each respective transmission: priority, source module, destination module, number of data units, elapsed transfer time or minimum required transfer time, and total number of transmissions which pass through a given communications node.
    • 一种包括数据传输网络的计算机芯片,包括用于发送数据的多个通信链路,多个通信节点和多个模块。 每个通信节点通过相应的通信链路直接连接到两个或更多个其他通信节点。 每个通信节点可操作以在相应的一个通信链路上传送数据。 每个模块耦合到至少一个通信节点,并且模块可操作以通过通信节点彼此通信。 通信节点可操作以为通过各个通信链路的多个模块中的任意两个或多个之间传送的数据创建动态路由。 通信节点基于模块之前的传输的统计数据形成动态路由。 每个通信节点可以包括用于动态地配置动态路由的相应配置逻辑,并且每个配置逻辑可以包括用于存储通过相应通信节点的先前传输的统计数据的存储器。 数据传输网络还可以包括用于基于统计数据来控制动态路由的路由模块。 路由模块耦合到每个通信节点并监视配置逻辑。 当存在和运行时,路由模块将根据统计数据的分析来调整动态路由。 统计数据包括每个相应传输的一个或多个以下内容:优先级,源模块,目的地模块,数据单元数,经过的传送时间或最小所需传输时间,以及通过给定通信节点的传输总数。
    • 5. 发明授权
    • Variable latency and bandwidth communication pathways
    • 可变延迟和带宽通信路径
    • US5935232A
    • 1999-08-10
    • US969860
    • 1997-11-14
    • J. Andrew LambrechtAlfred C. Hartmann
    • J. Andrew LambrechtAlfred C. Hartmann
    • G06F13/12G06F13/36G06F13/368G06F13/372G06F13/40H04N7/24G06F13/00
    • G06F13/124G06F13/36G06F13/368G06F13/372G06F13/4022G06F13/4027H04N21/238
    • A system and method for choosing communication pathways for data transfers on a computer chip based on desired latency and bandwidth characteristics. On a computer chip including a network of resources, those resources are allocated based upon the needs of the various components of the computer chip. Typical resources on the computer chip include a first bus with a plurality of data lines and control lines and having first bandwidth and latency characteristics, a second bus with a plurality of data lines and control lines having second bandwidth and latency characteristics, and a plurality of devices coupled to the first bus and second bus. Each device includes interface logic for accessing and performing transfers on the first and second buses. Each device is operable to select either the first or second bus depending on desired bandwidth and latency characteristics. Normally the first bandwidth is greater than the second bandwidth. Each device selects the first bus for higher speed transfers or the second bus for lower speed transfers. When the first latency is shorter than the second latency, each of the devices select the first bus for lower latency transfers and the second bus for higher latency transfers. Other characteristics which may be varies by each device according to the transmission needs of the particular device include clock rate, block size, and bus protocol depending upon desired bandwidth and latency characteristics. For highest possible bandwidth transfers, a multiple bus transfer may be requested by any device.
    • 一种用于基于期望的等待时间和带宽特性在计算机芯片上选择用于数据传输的通信路径的系统和方法。 在包括资源网络的计算机芯片上,根据计算机芯片的各个部件的需要分配这些资源。 计算机芯片上的典型资源包括具有多个数据线和控制线并具有第一带宽和等待时间特性的第一总线,具有多个数据线的第二总线和具有第二带宽和延迟特性的控制线,以及多个 耦合到第一总线和第二总线的设备。 每个设备包括用于访问和执行第一和第二总线上的传输的接口逻辑。 每个设备可操作以根据期望的带宽和延迟特性选择第一或第二总线。 通常,第一个带宽大于第二个带宽。 每个设备选择用于更高速度传输的第一个总线或用于较低速度传输的第二个总线。 当第一延迟短于第二等待时间时,每个设备选择用于较低等待时间传输的第一总线和用于较高等待时间传输的第二总线。 根据特定设备的传输需要,每个设备可能会改变的其他特性包括时钟速率,块大小和总线协议,这取决于期望的带宽和延迟特性。 对于最高可能的带宽传输,可以由任何设备请求多总线传输。
    • 7. 发明授权
    • Communication traffic circle system and method for performing packet
conversion and routing between different packet formats including an
instruction field
    • US06047002A
    • 2000-04-04
    • US227509
    • 1999-01-06
    • Alfred C. HartmannCarl K. Wakeland
    • Alfred C. HartmannCarl K. Wakeland
    • H04L12/42H04L29/06H04L12/56
    • H04L29/06H04L12/42H04L69/08
    • A communication system which includes more efficient packet conversion and routing for improved performance and simplified operation. The communication system includes one or more inputs for receiving packet data and one or more outputs for providing packet data. In one embodiment, the present invention comprises a "traffic circle" architecture for routing packet data and converting between different packet formats. In this embodiment, the system includes a data bus configured in a ring or circle. A plurality of port adapters or protocol processors are coupled to the ring data bus or communication circle. Each of the port adapters are configurable for converting between different types of communication packet formats. In the preferred embodiment, each of the port adapters are operable to convert between one or more communication packet formats to/from a generic packet format. The common generic packet format is then provided on the circular bus for circulation on the communication traffic circle between respective ones of the port adapters. In a second embodiment, the present invention comprises a cross-bar switch communication channel. This system is designed to receive a plurality of communications channels comprising packet data. The communication system comprises a plurality of protocol converters or protocol processors for converting possibly differing communication protocols or differing packet formats to/from a common generic packet format. Each of the protocol converters are coupled to a single-sided cross-bar switch to transmit/receive data to/from other protocol converters. The single-sided cross-bar switch is operable for interconnecting the multiple communications paths between arbitrary pairs of communications ports. The system preferably includes arbitration and control logic for establishing and removing connection paths within the cross-bar switch. In the preferred embodiment, the single-sided cross-bar switch is configurable for different transmission paths for added flexibility.
    • 8. 发明授权
    • Filtering training data for machine learning
    • 过滤机器学习的培训数据
    • US07690037B1
    • 2010-03-30
    • US11181221
    • 2005-07-13
    • Alfred C. Hartmann
    • Alfred C. Hartmann
    • G06F11/00
    • H04L63/1433G06F21/552H04L63/1416
    • Data center activity traces form a corpus used for machine learning. The data in the corpus are putatively normal but may be tainted with latent anomalies. There is a statistical likelihood that the corpus represents predominately legitimate activity, and this likelihood is exploited to allow for a targeted examination of only the data representing possible anomalous activity. The corpus is separated into clusters having members with like features. The clusters having the fewest members are identified, as these clusters represent potential anomalous activities. These clusters are evaluated to determine whether they represent actual anomalous activities. The data from the clusters representing actual anomalous activities are excluded from the corpus. As a result, the machine learning is more effective and the trained system provides better performance, since latent anomalies are not mistaken for normal activity.
    • 数据中心活动痕迹形成用于机器学习的语料库。 语料库中的数据是假设正常的,但可能会被潜在的异常污染。 统计学上有可能是语料主要表现为合法的活动,并且这种可能性被利用以允许仅对表示可能的异常活动的数据进行有针对性的检查。 语料库被分成具有类似特征的成员的群集。 识别具有最少成员的群集,因为这些群组代表潜在的异常活动。 对这些集群进行评估,以确定它们是否代表实际的异常活动。 来自代表实际异常活动的群集的数据从语料库中排除。 因此,机器学习更有效,训练有素的系统提供更好的性能,因为潜在的异常不会被误认为正常的活动。
    • 9. 发明授权
    • Data transfer network on a chip utilizing a mesh of rings topology
    • 数据传输网络在芯片上利用环形拓扑网格
    • US5974487A
    • 1999-10-26
    • US892074
    • 1997-07-14
    • Alfred C. Hartmann
    • Alfred C. Hartmann
    • G06F13/00
    • H04L12/4637
    • A computer chip includes a plurality of modules interconnected in an on-chip data transfer network configured in a mesh or ring of rings topology. The data transfer network includes links or buses, and switchpoints. The links or buses are configured in a ring topology as a mesh or ring of rings with each group of links of bus including a portion which is shared with a portion of another group of links or bus. The bus switchpoints are positioned at intersections of the mesh of rings. Each switchpoint is operable to route data from a source to a destination so that the modules are operable to communicate with each other through the groups of links or buses, and switchpoints. In various embodiments, the modules are coupled to the links or buses and/or the switchpoints. The various modules may be processors, memories and/or hybrids and may include, or be coupled through, a communication port coupled to one of the links or buses such that the communication port is operable to transmit and receive data on one of the links or buses. In one embodiment, the links or buses are replaced by transfer paths directly connected between various switchpoints to form collectively a mesh of rings with one or more of the transfer paths comprised in two different neighboring rings. Each switchpoint is coupled to at least three transfer paths with possibly some switchpoints coupled to four or more transfer links. The switchpoints are located at intersections of the mesh of rings.
    • 计算机芯片包括互连在片上数据传输网络中的多个模块,其以网状或环形拓扑结构配置。 数据传输网络包括链路或总线,以及交换点。 链路或总线被配置为环形网络或环形环,其中每组总线链路包括与另一组链路或总线的一部分共享的部分。 总线开关点位于环形网格的交点处。 每个切换点可操作以将数据从源路由到目的地路由,使得模块可操作以通过链路或总线组以及切换点彼此通信。 在各种实施例中,模块耦合到链路或总线和/或开关点。 各种模块可以是处理器,存储器和/或混合器,并且可以包括或耦合到耦合到链路或总线之一的通信端口,使得通信端口可操作以在链路之一上发送和接收数据, 巴士 在一个实施例中,链路或总线由直接连接在各个切换点之间的传输路径替代,以形成一组环,其中一个或多个传输路径包括在两个不同的相邻环中。 每个切换点被耦合到至少三个传输路径,可能的一些切换点耦合到四个或更多个传输链路。 开关点位于环网的交叉处。