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1. 发明申请

US20200135564A1 Preliminary Trenches Formed in Kerf Regions for Die Singulation 审中-公开
公开(公告)号：US20200135564A1
公开(公告)日：2020-04-30
申请号：US16176403
申请日：2018-10-31
申请人： Infineon Technologies AG
发明人： Markus Zundel , Stefan Mieslinger , Thomas Ostermann , Christian Westermeier , Jochen Hilsenbeck , Jens Peter Konrath , Boris Mayerhofer , Anatoly Sotnikov
IPC分类号： H01L21/78 , H01L21/04 , H01L29/16
摘要： A semiconductor wafer having a main surface and a rear surface opposite from the main surface is provided. A die singulation preparation step is performed in kerf regions of the semiconductor wafer. The kerf regions enclose a plurality of die sites. The die singulation preparation step includes forming one or more preliminary kerf trenches between at least two immediately adjacent die sites. The method further includes forming active semiconductor devices in the die sites, and singulating the semiconductor wafer in the kerf regions thereby providing a plurality of discrete semiconductor dies from the die sites. The one or more preliminary kerf trenches are unfilled during the singulating, and the singulating includes removing semiconductor material from a surface of the semiconductor wafer that is between opposite facing sidewalls of the one or more preliminary kerf trenches.

2. 发明申请

US20200066857A1 SEMICONDUCTOR DEVICE INCLUDING JUNCTION MATERIAL IN A TRENCH AND MANUFACTURING METHOD 审中-公开
公开(公告)号：US20200066857A1
公开(公告)日：2020-02-27
申请号：US16550146
申请日：2019-08-23
申请人： Infineon Technologies AG
发明人： Jens Peter Konrath , Caspar Leendertz , Larissa Wehrhahn-Kilian
IPC分类号： H01L29/423 , H01L29/78 , H01L29/16 , H01L29/47 , H01L29/739 , H01L21/04 , H01L21/02
摘要： An embodiment of a semiconductor device comprises a SiC semiconductor body, a gate dielectric and a gate electrode. A first trench extends from a first surface of the SiC semiconductor body into the SiC semiconductor body. A junction material is in the first trench, wherein the junction material and the SiC semiconductor body form a diode.

3. 发明申请

US20190311966A1 Semiconductor Device and Method for Forming a Semiconductor Device 审中-公开
公开(公告)号：US20190311966A1
公开(公告)日：2019-10-10
申请号：US16379289
申请日：2019-04-09
申请人： Infineon Technologies AG
发明人： Jens Peter Konrath , Wolfgang Bergner , Romain Esteve , Richard Gaisberger , Florian Grasse , Jochen Hilsenbeck , Ravi Keshav Joshi , Stefan Kramp , Stefan Krivec , Grzegorz Lupina , Hiroshi Narahashi , Andreas Voerckel , Stefan Woehlert
IPC分类号： H01L23/31 , H01L23/29 , H01L23/532 , H01L29/16 , H01L29/861 , H01L29/78 , H01L21/768 , H01L21/56
摘要： A semiconductor device includes a contact metallization layer arranged on a semiconductor substrate, an inorganic passivation structure arranged on the semiconductor substrate, and an organic passivation layer. The organic passivation layer is located between the contact metallization layer and the inorganic passivation structure, and located vertically closer to the semiconductor substrate than a part of the organic passivation layer located on top of the inorganic passivation structure.

4. 发明授权

US10121691B2 Semiconductor substrate arrangements and a method for forming a semiconductor substrate arrangement 有权
公开(公告)号：US10121691B2
公开(公告)日：2018-11-06
申请号：US15040540
申请日：2016-02-10
申请人： Infineon Technologies AG
发明人： Peter Irsigler , Jens Peter Konrath , Hans-Joachim Schulze
IPC分类号： H01L21/00 , H01L21/683 , H01L29/20 , H01L29/16 , H01L21/02 , H01L21/306 , H01L21/04
摘要： A semiconductor substrate arrangement includes a carrier wafer and a plurality of semiconductor substrate pieces fixed to the carrier wafer and distributed laterally over the carrier wafer. The semiconductor substrate pieces of the plurality of semiconductor substrate pieces comprise a hexagonal shape.

5. 发明申请

US20180158916A1 Semiconductor Component Having a Doped Substrate Layer and Corresponding Methods of Manufacturing 审中-公开
公开(公告)号：US20180158916A1
公开(公告)日：2018-06-07
申请号：US15868619
申请日：2018-01-11
申请人： Infineon Technologies AG
发明人： Hans-Joachim Schulze , Jens Peter Konrath , Roland Rupp , Christian Hecht
IPC分类号： H01L29/16 , H01L21/04 , H01L21/762 , H01L21/265
CPC分类号： H01L29/1608 , H01L21/0465 , H01L21/26506 , H01L21/762 , H01L21/76254 , H01L29/7395 , H01L29/7827
摘要： Representative implementations of devices and techniques provide an optimized layer for a semiconductor component. In an example, a doped portion of a wafer, forming a substrate layer may be transferred from the wafer to an acceptor, or handle wafer. A component layer may be applied to the substrate layer. The acceptor wafer is detached from the substrate layer. In some examples, further processing may be executed with regard to the substrate and/or component layers.

6. 发明申请

US20180122918A1 Methods for Forming a Plurality of Semiconductor Devices on a Plurality of Semiconductor Wafers 审中-公开
公开(公告)号：US20180122918A1
公开(公告)日：2018-05-03
申请号：US15855346
申请日：2017-12-27
申请人： Infineon Technologies AG
发明人： Jochen Hilsenbeck , Jens Peter Konrath
IPC分类号： H01L29/66 , H01L21/66 , H01L21/265 , H01L21/8232 , H01L27/08 , H01L21/04 , H01L29/47
摘要： A method for forming a plurality of semiconductor devices on a plurality of semiconductor wafers is provided. The method includes forming an electrically conductive layer on a surface of a first semiconductor wafer so that a Schottky-contact is generated between the electrically conductive layer formed on the first semiconductor wafer and the first semiconductor wafer. A material composition of the electrically conductive layer formed on the first semiconductor wafer is selected based on a value of a physical property of the first semiconductor wafer. The method further includes forming an electrically conductive layer on a surface of a second semiconductor wafer so that a Schottky-contact is generated between the electrically conductive layer formed on the second semiconductor wafer and the second semiconductor wafer. A material composition of the electrically conductive layer formed on the second semiconductor wafer is selected based on a value of the physical property of the second semiconductor wafer. The material composition of the electrically conductive layer formed on the second semiconductor wafer is different from the material composition of the electrically conductive layer formed on the first semiconductor wafer.

7. 发明申请

US20170162390A1 Forming a Contact Layer on a Semiconductor Body 有权
公开(公告)号：US20170162390A1
公开(公告)日：2017-06-08
申请号：US15365627
申请日：2016-11-30
申请人： Infineon Technologies AG
发明人： Roland Rupp , Jens Peter Konrath , Francisco Javier Santos Rodriguez , Carsten Schaeffer , Hans-Joachim Schulze , Werner Schustereder , Guenther Wellenzohn
IPC分类号： H01L21/04 , H01L29/47
CPC分类号： H01L29/401 , H01L21/02697 , H01L21/046 , H01L21/0485 , H01L21/0495 , H01L21/2258 , H01L21/28575 , H01L29/0619 , H01L29/1608 , H01L29/20 , H01L29/45 , H01L29/452 , H01L29/47 , H01L29/861 , H01L29/872
摘要： Disclosed is a method. The method includes forming a metal layer on a first surface of a semiconductor body; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body; and annealing the semiconductor body. The annealing includes heating at least the metal atom containing region to a temperature of less than 500° C.

8. 发明授权

US09595469B2 Semiconductor device and method for producing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09595469B2
公开(公告)日：2017-03-14
申请号：US14071076
申请日：2013-11-04
申请人： Infineon Technologies AG
发明人： Jochen Hilsenbeck , Jens Peter Konrath , Stefan Krivec
IPC分类号： H01L21/768 , H01L23/532 , H01L29/16 , H01L29/808 , H01L29/10 , H01L23/00 , H01L21/285 , H01L29/20
CPC分类号： H01L23/53238 , H01L21/2855 , H01L21/28568 , H01L21/28575 , H01L21/76841 , H01L21/76843 , H01L21/76852 , H01L23/532 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/48 , H01L29/1066 , H01L29/1608 , H01L29/2003 , H01L29/8083 , H01L2224/0345 , H01L2224/0347 , H01L2224/03612 , H01L2224/03614 , H01L2224/0391 , H01L2224/03914 , H01L2224/04042 , H01L2224/05018 , H01L2224/05082 , H01L2224/05124 , H01L2224/05147 , H01L2224/05188 , H01L2224/05551 , H01L2224/05561 , H01L2224/05566 , H01L2224/05599 , H01L2224/05688 , H01L2224/45099 , H01L2224/85375 , H01L2224/85399 , H01L2924/00014 , H01L2924/12036 , H01L2924/13055 , H01L2924/13091 , H01L2924/00 , H01L2924/0496 , H01L2924/01042 , H01L2924/01029 , H01L2924/01014 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device includes a semiconductor body with a front face and a back face, having an active zone located at the front face, a front surface metallization layer having a front face and a back face directed towards the active zone, the front surface metallization layer being provided on the front face of the semiconductor body and being electrically connected to the active zone, and a first barrier layer, including amorphous molybdenum nitride, located between the active zone and the metallization layer. Further, a method for producing such a device is provided.
摘要翻译：半导体器件包括具有正面和背面的半导体本体，具有位于前表面的有源区，前表面金属化层具有指向有源区的正面和背面，前表面金属化层设置在半导体本体的前表面上并与活性区电连接，以及位于活性区和金属化层之间的包括无定形氮化钼的第一阻挡层。此外，提供了一种用于制造这种装置的方法。

9. 发明申请

US20160359014A1 Methods for Forming a Plurality of Semiconductor Devices on a Plurality of Semiconductor Wafers 有权
标题翻译：在多个半导体晶片上形成多个半导体器件的方法
公开(公告)号：US20160359014A1
公开(公告)日：2016-12-08
申请号：US15162778
申请日：2016-05-24
申请人： Infineon Technologies AG
发明人： Jochen Hilsenbeck , Jens Peter Konrath
IPC分类号： H01L29/66 , H01L21/66 , H01L21/8232 , H01L21/265 , H01L27/08 , H01L21/285
CPC分类号： H01L29/66143 , H01L21/0495 , H01L21/265 , H01L21/8232 , H01L22/10 , H01L22/14 , H01L22/20 , H01L27/0814 , H01L29/47 , H01L29/475 , H01L29/6606 , H01L29/66212
摘要： A method for forming a plurality of semiconductor devices on a plurality of semiconductor wafers is provided. The method includes forming an electrically conductive layer on a surface of a first semiconductor wafer so that a Schottky-contact is generated between the electrically conductive layer formed on the first semiconductor wafer and the first semiconductor wafer. A material composition of the electrically conductive layer formed on the first semiconductor wafer is selected based on a value of a physical property of the first semiconductor wafer. The method further includes forming an electrically conductive layer on a surface of a second semiconductor wafer so that a Schottky-contact is generated between the electrically conductive layer formed on the second semiconductor wafer and the second semiconductor wafer. A material composition of the electrically conductive layer formed on the second semiconductor wafer is selected based on a value of the physical property of the second semiconductor wafer. The material composition of the electrically conductive layer formed on the second semiconductor wafer is different from the material composition of the electrically conductive layer formed on the first semiconductor wafer.
摘要翻译：提供了一种在多个半导体晶片上形成多个半导体器件的方法。该方法包括在第一半导体晶片的表面上形成导电层，使得在形成在第一半导体晶片上的导电层与第一半导体晶片之间产生肖特基接触。基于第一半导体晶片的物理性质的值选择形成在第一半导体晶片上的导电层的材料组成。该方法还包括在第二半导体晶片的表面上形成导电层，使得在形成在第二半导体晶片上的导电层和第二半导体晶片之间产生肖特基接触。基于第二半导体晶片的物理性质的值选择形成在第二半导体晶片上的导电层的材料组成。形成在第二半导体晶片上的导电层的材料组成与形成在第一半导体晶片上的导电层的材料组成不同。

10. 发明申请

US20160247703A1 Semiconductor Substrate Arrangements and a Method for Forming a Semiconductor Substrate Arrangement 审中-公开
标题翻译：半导体衬底布置和形成半导体衬底布置的方法
公开(公告)号：US20160247703A1
公开(公告)日：2016-08-25
申请号：US15040540
申请日：2016-02-10
申请人： Infineon Technologies AG
发明人： Peter Irsigler , Jens Peter Konrath , Hans-Joachim Schulze
IPC分类号： H01L21/683 , H01L21/04 , H01L21/02 , H01L21/306 , H01L29/20 , H01L29/16
CPC分类号： H01L21/6835 , H01L21/02002 , H01L21/02447 , H01L21/02458 , H01L21/02494 , H01L21/02529 , H01L21/0254 , H01L21/0475 , H01L21/30612 , H01L29/1608 , H01L29/2003 , H01L2221/68363 , H01L2221/68381
摘要： A semiconductor substrate arrangement includes a carrier wafer and a plurality of semiconductor substrate pieces fixed to the carrier wafer and distributed laterally over the carrier wafer. The semiconductor substrate pieces of the plurality of semiconductor substrate pieces comprise a hexagonal shape.
摘要翻译：半导体衬底布置包括载体晶片和固定到载体晶片并分布在载体晶片上的多个半导体衬底片。多个半导体衬底片的半导体衬底片包括六边形形状。

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