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1. 发明申请

US20150016079A1 PRINTED WIRING BOARD 有权
标题翻译：印刷线路板
公开(公告)号：US20150016079A1
公开(公告)日：2015-01-15
申请号：US14329453
申请日：2014-07-11
申请人： IBIDEN CO., LTD.
发明人： Toshiki FURUTANI , Takeshi FURUSAWA , Keisuke SHIMIZU , Yuichi NAKAMURA
IPC分类号： H05K1/18
CPC分类号： H05K1/185 , H01L21/568 , H01L24/19 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/32225 , H01L2224/73267 , H01L2224/83005 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/15311 , H01L2924/1533 , H01L2924/18162 , H01L2924/19105 , H05K1/0203 , H05K1/113 , H05K3/0097 , H05K3/3489 , H05K3/4602 , H05K3/4673 , H05K2201/068 , H05K2201/094 , H05K2203/1536 , H05K2203/308 , H01L2224/19
摘要： A wiring board includes a first resin insulation layer, an electronic component positioned on first surface of the first insulation layer, a second resin insulation layer formed on the first surface of the first insulation layer such that the second insulation layer is embedding the electronic component, a conductive layer formed on the second insulation layer, a third resin insulation layer formed on the conductive layer and second insulation layer, and a connection via conductor formed in the second insulation layer such that the connection via conductor is connecting electrode of the electronic component and conductive layer on the second insulation layer. The first insulation layer has a pad structure on second surface side of the first insulation layer on opposite side of the first surface, and the first insulation layer has coefficient of thermal expansion set lower than coefficients of thermal expansion of the second and third insulation layers.
摘要翻译：布线板包括第一树脂绝缘层，位于第一绝缘层的第一表面上的电子部件，形成在第一绝缘层的第一表面上的第二树脂绝缘层，使得第二绝缘层嵌入电子部件，形成在第二绝缘层上的导电层，形成在导电层和第二绝缘层上的第三树脂绝缘层和形成在第二绝缘层中的连接通孔导体，使得连接通孔导体是电子部件的连接电极和第二绝缘层上的导电层。第一绝缘层在第一绝缘层的与第一表面相对的第二表面侧具有衬垫结构，第一绝缘层的热膨胀系数设定为低于第二绝缘层和第三绝缘层的热膨胀系数。

2. 发明申请

US20140014399A1 PRINTED WIRING BOARD 有权
标题翻译：印刷线路板
公开(公告)号：US20140014399A1
公开(公告)日：2014-01-16
申请号：US13754185
申请日：2013-01-30
申请人： IBIDEN CO., LTD.
发明人： Takashi KARIYA , Toshiki FURUTANI , Takeshi FURUSAWA
IPC分类号： H05K1/02
CPC分类号： H05K1/02 , H01L21/486 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L2924/0002 , H05K1/0271 , H05K3/4644 , H05K2201/029 , H05K2201/09136 , H01L2924/00
摘要： A printed wiring board includes a core substrate, first and second buildup structures on surfaces of the core, respectively, and first and second solder-resist layers on the first and second structures, respectively. The core includes insulative substrate, conductive layers on surfaces of the substrate and through-hole conductor connecting the conductive layers, the first structure includes interlayer insulation layer and conductive layer in the first structure, the second structure includes interlayer insulation layer and conductive layer in the second structure, a thickness between the outer surfaces of the first and second solder-resist layers is set in range of from 150 μm or greater and less than 380 μm, and at least one of the core, first and second structures, and first and second solder-resist layers includes reinforcing material in amount such that the board includes the material in amount in range of from 20 to 35 vol. %.
摘要翻译：印刷电路板分别包括芯基板，在芯的表面上的第一和第二累积结构以及分别在第一和第二结构上的第一和第二阻焊层。芯包括绝缘衬底，衬底表面上的导电层和连接导电层的通孔导体，第一结构包括第一结构中的层间绝缘层和导电层，第二结构包括层间绝缘层和导电层第二结构，第一和第二阻焊层的外表面之间的厚度设定在150μm以上且小于380μm的范围内，以及芯，第一和第二结构中的至少一个，以及第一和第二结构第二阻焊层包括增强材料，其量使得该板包括量为20至35体积的材料。％。

3. 发明申请

US20150366061A1 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD 有权
标题翻译：印刷线路板和制造印刷线路板的方法
公开(公告)号：US20150366061A1
公开(公告)日：2015-12-17
申请号：US14741011
申请日：2015-06-16
申请人： IBIDEN CO., LTD.
发明人： Kota NODA , Takeshi FURUSAWA
IPC分类号： H05K1/14 , H05K1/02 , H05K3/10 , H05K3/00 , H05K3/40 , H05K3/46 , H05K1/11 , H05K1/03
CPC分类号： H01L23/13 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/49838 , H01L24/13 , H01L24/16 , H01L25/105 , H01L2224/131 , H01L2224/16227 , H01L2224/16237 , H01L2224/81192 , H01L2224/81395 , H01L2224/81411 , H01L2224/81444 , H01L2224/81447 , H01L2224/81464 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2924/15153 , H01L2924/3511 , H01L2924/3512 , H05K1/0271 , H05K3/4697 , H05K2201/09827 , H05K2201/10674 , Y10T29/49158 , H01L2924/014 , H01L2924/00014
摘要： A printed wiring board includes a first circuit board having a first surface and a second surface, and a second circuit board having a third surface and a fourth surface and having a mounting area on the third surface of the second circuit board. The first circuit board is laminated on the third surface of the second circuit board such that the first surface of the first circuit board is in contact with the third surface of the second circuit board, the first circuit board includes reinforcing material and has an opening portion exposing the mounting area of the second circuit board, and the first circuit board and the second circuit board are formed such that a ratio H1/h1 is in a range of from 0.75 to 2.4, where H1 represents a thickness of the first circuit board and h2 represents a thickness of the second circuit board.
摘要翻译：印刷电路板包括具有第一表面和第二表面的第一电路板和具有第三表面和第四表面的第二电路板，并且在第二电路板的第三表面上具有安装区域。第一电路板层叠在第二电路板的第三表面上，使得第一电路板的第一表面与第二电路板的第三表面接触，第一电路板包括增强材料，并且具有开口部分暴露第二电路板的安装区域，并且第一电路板和第二电路板形成为使得比率H1 / h1在0.75至2.4的范围内，其中H1表示第一电路板的厚度， h2表示第二电路板的厚度。

4. 发明申请

US20150282314A1 METHOD FOR MANUFACTURING PRINTED WIRING BOARD WITH CONDUCTIVE POST AND PRINTED WIRING BOARD WITH CONDUCTIVE POST 有权
标题翻译：带导电插头的印刷线路板和印刷电路板与导电柱的制造方法
公开(公告)号：US20150282314A1
公开(公告)日：2015-10-01
申请号：US14674301
申请日：2015-03-31
申请人： IBIDEN CO., LTD.
发明人： Toru FURUTA , Takeshi FURUSAWA , Tomoya TERAKURA
IPC分类号： H05K1/11 , H05K3/42 , H05K3/40 , H05K1/09 , H05K3/06
CPC分类号： H05K3/4007 , H05K1/0271 , H05K1/111 , H05K3/0097 , H05K3/282 , H05K3/3436 , H05K2201/0355 , H05K2201/0376 , H05K2201/09745 , H05K2201/09772 , H05K2203/0369 , H05K2203/1536 , Y02P70/611 , Y10T29/49165
摘要： A method for manufacturing a printed wiring board with conductive posts includes forming on a first foil provided on carrier a first conductive layer including mounting pattern to connect electronic component via conductive posts, forming on the first foil a laminate including an insulating layer and a second foil to form the laminate on the first conductive layer, removing the carrier, forming a metal film on the laminate and first film, forming resist on the metal film to have pattern exposing portion of the metal film corresponding to the mounting pattern and portion of the second foil for a second conductive layer, forming an electroplating layer on the portion of the metal film not covered by the resist, removing the resist, and applying etching to remove the first and second foils below the metal film exposed by the removing the resist and to form the posts on the mounting pattern.
摘要翻译：一种用于制造具有导电柱的印刷线路板的方法，包括在载体上形成第一导电层，第一导电层包括安装图案，以经由导电柱连接电子部件，在第一箔上形成包括绝缘层和第二箔在第一导电层上形成层压体，去除载体，在层压体上形成金属膜和第一膜，在金属膜上形成抗蚀剂，使金属膜的图案曝光部分对应于安装图案和第二导电层的部分箔片用于第二导电层，在未被抗蚀剂覆盖的金属膜的部分上形成电镀层，去除抗蚀剂，并施加蚀刻以除去通过除去抗蚀剂暴露的金属膜下面的第一和第二箔，并且形成安装模式上的柱。

5. 发明申请

US20160113110A1 PRINTED WIRING BOARD 审中-公开
标题翻译：印刷线路板
公开(公告)号：US20160113110A1
公开(公告)日：2016-04-21
申请号：US14918784
申请日：2015-10-21
申请人： IBIDEN CO., LTD.
发明人： Takeshi FURUSAWA , Kota NODA
IPC分类号： H05K1/02 , H05K1/11
CPC分类号： H05K3/4697 , H05K1/0271 , H05K1/115 , H05K2201/068 , H05K2201/096 , H05K2201/09827
摘要： A printed wiring board includes a substrate, a first conductor layer formed on first surface of the substrate, a second conductor layer formed on second surface of the substrate, a through-hole conductor penetrating through the substrate and connecting the first and second conductor layers, a build-up layer formed on the second surface of the substrate and including conductor layers and insulating layers, and a first insulating layer formed on the first surface of the substrate such that the first insulating layer is covering the first conductor layer on the substrate. The substrate has a cavity penetrating through the first insulating layer and substrate such that the cavity is exposing the build-up layer on the second surface of the substrate, and the substrate and insulating layers in the build-up layer are formed such that difference between thermal expansion coefficients of the substrate and insulating layers is set 15 ppm or less.
摘要翻译：印刷电路板包括基板，形成在基板的第一表面上的第一导体层，形成在基板的第二表面上的第二导体层，穿透基板并连接第一和第二导体层的通孔导体，形成在基板的第二表面上并包括导体层和绝缘层的积层，以及形成在基板的第一表面上的第一绝缘层，使得第一绝缘层覆盖基板上的第一导体层。衬底具有穿透第一绝缘层和衬底的空腔，使得空腔暴露衬底的第二表面上的堆积层，并且形成积层中的衬底和绝缘层，使得基板和绝缘层的热膨胀系数设定为15ppm以下。

6. 发明申请

US20160120033A1 PRINTED WIRING BOARD 有权
标题翻译：印刷线路板
公开(公告)号：US20160120033A1
公开(公告)日：2016-04-28
申请号：US14920974
申请日：2015-10-23
申请人： IBIDEN CO., LTD.
发明人： Takeshi FURUSAWA , Kota NODA
IPC分类号： H05K1/11 , H05K1/02 , H05K1/09
CPC分类号： H05K3/4697 , H01L21/4857 , H01L21/486 , H01L23/13 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L2224/16227 , H01L2224/16235 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K1/18 , H05K1/183 , H05K3/0097 , H05K3/4602 , H05K2201/10674 , H05K2203/107
摘要： A printed wiring board includes a substrate, a first conductor layer formed on first surface of the substrate, a second conductor layer formed on second surface of the substrate, a through-hole conductor penetrating through the substrate and connecting the first and second conductor layers, a build-up layer formed on the second surface of the substrate and including conductor layers, insulating layers and via conductors, and a first insulating layer formed on the first surface the substrate and covering the first conductor layer. The substrate has a cavity penetrating through the first insulating layer and substrate and exposing the build-up layer on the substrate, the via conductors include a lowermost via conductor having a bottom portion exposed at bottom of the cavity, and the bottom portion of the lowermost via conductor is recessed relative to surface of a lowermost insulating layer in the build-up layer at the bottom of the cavity.
摘要翻译：印刷电路板包括基板，形成在基板的第一表面上的第一导体层，形成在基板的第二表面上的第二导体层，穿透基板并连接第一和第二导体层的通孔导体，形成在基板的第二表面上并且包括导体层，绝缘层和通路导体的积层，以及形成在基板的第一表面上并覆盖第一导体层的第一绝缘层。衬底具有穿透第一绝缘层和衬底的空腔并暴露衬底上的积聚层，通孔导体包括具有暴露在空腔底部的底部的最下通孔导体和最下面的底部通孔导体相对于空腔底部的积聚层中的最下层绝缘层的表面凹陷。

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