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    • 3. 发明授权
    • Methods of fabricating integrated circuit devices including self-aligned contacts with increased alignment margin
    • 制造集成电路器件的方法包括具有增加的对准余量的自对准触点
    • US07250335B2
    • 2007-07-31
    • US11201803
    • 2005-08-11
    • Won-suk YangKi-nam Kim
    • Won-suk YangKi-nam Kim
    • H01L21/8239
    • H01L21/76897
    • An integrated circuit device, e.g., a memory device, includes a substrate, and a plurality of rows of active regions in the substrate, the active regions arranged in a staggered pattern such that active regions of a first row are aligned with portions of an isolation region separating active regions of an adjacent second row. Source and drain regions are in the active regions and are arranged such that each active region comprises a drain region disposed between two source regions. A plurality of word line structures are on the substrate, arranged transverse to the rows of active regions such that that word line structures cross the active regions between the source regions and the drain regions. Respective rows of conductive pads are disposed between respective adjacent word lines structures, including first conductive pads on the source regions, second conductive pads on the drain regions, and third conductive on isolation regions separating active regions. A plurality of bit line structures are on the substrate, extending transverse to the word line structures and contacting the second conductive pads. Related methods of fabrication are also described.
    • 诸如存储器件的集成电路器件包括衬底以及衬底中的多行有源区域,有源区域以交错图案排列,使得第一行的有源区域与隔离的部分对准 分隔相邻第二行的有效区域的区域。 源极和漏极区域处于有源区域中并且被布置成使得每个有源区域包括设置在两个源极区域之间的漏极区域。 多个字线结构位于衬底上,横向于有源区的行布置,使得字线结构跨越源极区域和漏极区域之间的有源区域。 导电焊盘的各行布置在相应的相邻字线结构之间,包括源极区上的第一导电焊盘,漏极区上的第二导电焊盘以及分离有源区的隔离区上的第三导电。 多个位线结构在基板上,横向于字线结构延伸并与第二导电焊盘接触。 还描述了相关的制造方法。
    • 5. 发明申请
    • Methods of fabricating integrated circuit devices including self-aligned contacts with increased alignment margin
    • 制造集成电路器件的方法包括具有增加的对准余量的自对准触点
    • US20050272251A1
    • 2005-12-08
    • US11201803
    • 2005-08-11
    • Won-suk YangKi-nam Kim
    • Won-suk YangKi-nam Kim
    • H01L21/768H01L21/60H01L21/8234H01L21/8242H01L27/088H01L27/108H01L21/336H01L21/4763
    • H01L21/76897
    • An integrated circuit device, e.g., a memory device, includes a substrate, and a plurality of rows of active regions in the substrate, the active regions arranged in a staggered pattern such that active regions of a first row are aligned with portions of an isolation region separating active regions of an adjacent second row. Source and drain regions are in the active regions and are arranged such that each active region comprises a drain region disposed between two source regions. A plurality of word line structures are on the substrate, arranged transverse to the rows of active regions such that that word line structures cross the active regions between the source regions and the drain regions. Respective rows of conductive pads are disposed between respective adjacent word lines structures, including first conductive pads on the source regions, second conductive pads on the drain regions, and third conductive on isolation regions separating active regions. A plurality of bit line structures are on the substrate, extending transverse to the word line structures and contacting the second conductive pads. Related methods of fabrication are also described.
    • 诸如存储器件的集成电路器件包括衬底以及衬底中的多行有源区域,有源区域以交错图案排列,使得第一行的有源区域与隔离的部分对准 分隔相邻第二行的有效区域的区域。 源极和漏极区域处于有源区域中并且被布置成使得每个有源区域包括设置在两个源极区域之间的漏极区域。 多个字线结构位于衬底上,横向于有源区的行布置,使得字线结构跨越源极区域和漏极区域之间的有源区域。 导电焊盘的相应行设置在相应的相邻字线结构之间,包括源区上的第一导电焊盘,漏极区上的第二导电焊盘以及分离有源区的隔离区上的第三导电。 多个位线结构在基板上,横向于字线结构延伸并与第二导电焊盘接触。 还描述了相关的制造方法。