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1. 发明授权

US4332839A Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide 失效
标题翻译：制造具有形成Ti或Ta硅化物的集成半导体电路结构的方法
公开(公告)号：US4332839A
公开(公告)日：1982-06-01
申请号：US227133
申请日：1981-01-22
申请人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
发明人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
IPC分类号： H01L21/28 , H01L21/768 , H01L23/532 , H01L29/49 , H01L21/283
CPC分类号： H01L23/53271 , H01L21/28052 , H01L21/76889 , H01L29/4933 , H01L2924/0002 , Y10S148/02 , Y10S148/147
摘要： The compounds TiSi.sub.2 and TaSi.sub.2 have been found to be suitable substitutes for polysilicon layers in semiconductor integrated circuits. Suitable conducting properties of the compounds are ensured by providing a relatively thin substrate of polysilicon.
摘要翻译：已经发现化合物TiSi 2和TaSi 2在半导体集成电路中是多晶硅层的合适的替代物。通过提供相对薄的多晶硅基质来确保化合物的合适的导电性能。

2. 再颁专利

USRE30244E Radial flow reactor including glow discharge limitting shield 失效
标题翻译：径流反应堆包括辉光放电限制屏蔽
公开(公告)号：USRE30244E
公开(公告)日：1980-04-01
申请号：US946843
申请日：1978-09-28
申请人： Frank B. Alexander, Jr. , Cesar D. Capio , Victor E. Hauser, Jr. , Hyman J. Levinstein , Cyril J. Mogab , Ashok K. Sinha , Richard S. Wagner
发明人： Frank B. Alexander, Jr. , Cesar D. Capio , Victor E. Hauser, Jr. , Hyman J. Levinstein , Cyril J. Mogab , Ashok K. Sinha , Richard S. Wagner
IPC分类号： C23C16/509
CPC分类号： C23C16/5096
摘要： An improved radio frequency (rf) powered radial flow cylindrical reactor utilizes a gas shield which substantially limits the glow plasma discharge reaction to a section of the reactor over the semiconductor substrates which are to be coated. The gas shield permits the use of higher rf input power which contributes to the formation of protective films that have desirable physical and electrical characteristics.

3. 发明授权

US4985373A Multiple insulating layer for two-level interconnected metallization in semiconductor integrated circuit structures 失效
标题翻译：用于半导体集成电路结构中的两层互连金属化的多重绝缘层
公开(公告)号：US4985373A
公开(公告)日：1991-01-15
申请号：US357647
申请日：1989-05-24
申请人： Hyman J. Levinstein , William D. Powell, Jr. , Ashok K. Sinha
发明人： Hyman J. Levinstein , William D. Powell, Jr. , Ashok K. Sinha
IPC分类号： H01L21/316 , H01L23/532
CPC分类号： H01L21/02129 , H01L21/022 , H01L21/02271 , H01L21/02274 , H01L21/31625 , H01L23/5329 , H01L2924/0002
摘要： Insulation between first and second levels of aluminum metallization in semiconductor integrated circuit structures comprises a plasma planarized, deposited silicon dioxide layer and another silicon dioxide layer deposited upon said plasma planarized layer.
摘要翻译：在半导体集成电路结构中的第一和第二级铝金属化之间的绝缘包括沉积在所述等离子体平坦化层上的等离子体平坦化沉积二氧化硅层和另一二氧化硅层。

4. 再颁专利

USRE32207E Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide 失效
标题翻译：制造具有形成Ti或Ta硅化物的集成半导体电路结构的方法
公开(公告)号：USRE32207E
公开(公告)日：1986-07-15
申请号：US429299
申请日：1982-09-30
申请人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
发明人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/768 , H01L23/532 , H01L29/49
CPC分类号： H01L23/53271 , H01L21/28052 , H01L21/32055 , H01L21/76889 , H01L29/4933 , H01L2924/0002
摘要： The compounds TiSi.sub.2 and TaSi.sub.2 have been found to be suitable substitutes for polysilicon layers in semiconductor integrated circuits. Suitable conducting properties of the compounds are ensured by providing a relatively thin substrate of polysilicon.

5. 发明授权

US4276557A Integrated semiconductor circuit structure and method for making it 失效
标题翻译：集成半导体电路结构及其制作方法
公开(公告)号：US4276557A
公开(公告)日：1981-06-30
申请号：US974378
申请日：1978-12-29
申请人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
发明人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
IPC分类号： H01B1/00 , H01B1/06 , H01L21/28 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/532 , H01L29/49 , H01L23/48
CPC分类号： H01L21/28052 , H01L21/32055 , H01L21/76889 , H01L23/53271 , H01L29/4933 , H01L2924/0002 , Y10S148/14
摘要： The compounds TiSi.sub.2 and TaSi.sub.2 have been found to be suitable substitutes for polysilicon layers in semiconductor integrated circuits. Suitable conducting properties of the compounds are ensured by providing a relatively thin substrate of polysilicon.
摘要翻译：已经发现化合物TiSi 2和TaSi 2在半导体集成电路中是多晶硅层的合适的替代物。通过提供相对薄的多晶硅基质来确保化合物的合适的导电性能。

6. 发明授权

US4378628A Cobalt silicide metallization for semiconductor integrated circuits 失效
标题翻译：半导体集成电路用硅化钴金属化
公开(公告)号：US4378628A
公开(公告)日：1983-04-05
申请号：US296914
申请日：1981-08-27
申请人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
发明人： Hyman J. Levinstein , Shyam P. Murarka , Ashok K. Sinha
IPC分类号： H01L29/78 , H01L21/28 , H01L21/285 , H01L21/336
CPC分类号： H01L29/66575 , H01L21/28097 , H01L21/28518
摘要： In order to form MOSFET structures, a cobalt layer (16) is deposited and sintered, at about 400.degree. C. to 500.degree. C., on a patterned semiconductor wafer having exposed polycrystalline (14) or monocrystalline (11) silicon portions, as well as exposed oxide (15 or 25) portions. The cobalt reacts with exposed surfaces of the silicon portions and forms thereat such compounds as cobalt monosilicide (CoSi) or di-cobalt silicide (C0.sub.2 Si), or a mixture of both. The unreacted cobalt is selectively removed, as by selective etching in a suitable acid bath. A heat treatment at about 700.degree. C. or more, preferably in an oxidizing ambient which contains typically about 2 percent oxygen, converts the cobalt compound(s) into relatively stable cobalt disilicide (CoSi.sub.2). Subsequently, deposition of an in situ doped layer (33) of polycrystalline silicon (polysilicon) on the cobalt disilicide contacting the monocrystalline silicon portions--followed by gettering, deposition of a layer (34) of aluminum, and standard etch-patterning of the aluminum and polysilicon layers--completes the metallization of the desired MOSFET structures on the silicon wafer.
摘要翻译：为了形成MOSFET结构，在具有暴露的多晶（14）或单晶（11）硅部分的图案化半导体晶片上，在约400℃至500℃下沉积并烧结钴层（16），如以及暴露的氧化物（15或25）部分。钴与硅部分的暴露表面反应并在其上形成诸如一硅化钴（CoSi）或二钴硅化物（CO 2 Si）或两者的混合物的化合物。选择性地除去未反应的钴，如通过在合适的酸浴中的选择性蚀刻。约700℃或更高，优选氧化环境中通常含有约2％氧气的热处理将钴化合物转化成相对稳定的二硅化钴（CoSi 2）。随后，将多晶硅（多晶硅）的原位掺杂层（33）沉积在与单晶硅部分接触的二硅化钴上，然后吸杂，沉积铝层（34），并且对铝进行标准蚀刻图案化和多晶硅层 - 完成硅晶片上期望的MOSFET结构的金属化。

7. 发明授权

US4171489A Radiation mask structure 失效
标题翻译：辐射面罩结构
公开(公告)号：US4171489A
公开(公告)日：1979-10-16
申请号：US941776
申请日：1978-09-13
申请人： Arthur C. Adams , Cesar D. Capio , Hyman J. Levinstein , Ashok K. Sinha , David N. Wang
发明人： Arthur C. Adams , Cesar D. Capio , Hyman J. Levinstein , Ashok K. Sinha , David N. Wang
IPC分类号： G03F1/22 , G21K5/02 , H01L21/027 , H01L21/30 , G21F3/02
CPC分类号： G03F1/22
摘要： The discovery that boron nitride and boron carbide films can be made in tension allows nondistorting radiation windows or masks to be realized. Both low and high pressure techniques for making the tensile films lead to related mask structures utilizing such films. The resulting structures are sufficiently distortion free to be useful for x-ray lithography.
摘要翻译： {PG，1]发现氮化硼和碳化硼薄膜可以制成张力，可以实现非调质辐射窗口或掩模。用于制造拉伸膜的低压和高压技术都导致利用这种膜的相关掩模结构。所得到的结构具有足够的变形，可用于x射线光刻。

8. 发明授权

US4151007A Hydrogen annealing process for stabilizing metal-oxide-semiconductor structures 失效
标题翻译：用于稳定金属氧化物半导体结构的氢退火工艺
公开(公告)号：US4151007A
公开(公告)日：1979-04-24
申请号：US840620
申请日：1977-10-11
申请人： Hyman J. Levinstein , Ashok K. Sinha
发明人： Hyman J. Levinstein , Ashok K. Sinha
IPC分类号： H01L21/30 , H01L21/3105 , H01L21/321
CPC分类号： H01L21/321 , H01L21/3003 , H01L21/3105 , Y10S148/003 , Y10S148/024 , Y10S148/053 , Y10S148/128
摘要： Variations in threshold voltage of Metal-Oxide-Silicon (MOS) structures are attenuated by the inclusion in the fabrication process of a hydrogen anneal step using a temperature range of 650 degrees C.ltoreq.T.ltoreq.950 degrees C. This anneal step is designed to be the last step in the fabrication process which is performed at temperatures above 600 degrees C.
摘要翻译：金属氧化物 - 硅（MOS）结构的阈值电压的变化通过在650℃的温度范围内的氢退火步骤的制造过程中包含而被减弱。该退火步骤被设计为在600摄氏度以上的温度下进行的制造工艺的最后一步。

9. 发明授权

US5491603A Method of determining a dechucking voltage which nullifies a residual electrostatic force between an electrostatic chuck and a wafer 失效
标题翻译：确定脱扣电压的方法，其消除静电卡盘和晶片之间的剩余静电力
公开(公告)号：US5491603A
公开(公告)日：1996-02-13
申请号：US235012
申请日：1994-04-28
申请人： Manoocher Birang , Jian Ding , Hyman J. Levinstein
发明人： Manoocher Birang , Jian Ding , Hyman J. Levinstein
IPC分类号： B23Q3/15 , H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/683 , H02N13/00
CPC分类号： H01L21/6833
摘要： The invention is embodied in a method of determining an optimum de-chucking voltage for nullifying residual electrostatic forces on a wafer in an electrostatic chuck for removal of the wafer from the chuck, including holding the wafer on the electrostatic chuck by applying an electrostatic potential to the chuck, introducing a gas between the wafer and the chuck, reducing the electrostatic potential of the chuck while observing a rate of leakage of the gas from between the wafer and the chuck, and recording as the optimum dechucking voltage the value of the electrostatic potential obtaining when the rate of leakage exceeds a predetermined threshold.
摘要翻译：本发明体现于一种确定最佳去夹紧电压的方法，用于使静电卡盘中的晶片上的残留静电力无效，从卡盘移除晶片，包括通过施加静电电位将晶片保持在静电卡盘上卡盘，在晶片和卡盘之间引入气体，同时观察卡盘的气体泄漏速率，同时减小卡盘的静电电位，并记录最佳的脱扣电压为静电电位值当泄漏速率超过预定阈值时获得。

10. 发明授权

US4937643A Devices having tantalum silicide structures 失效
标题翻译：具有硅化钽结构的器件
公开(公告)号：US4937643A
公开(公告)日：1990-06-26
申请号：US78013
申请日：1987-07-27
申请人： Jean S. Deslauriers , Hyman J. Levinstein
发明人： Jean S. Deslauriers , Hyman J. Levinstein
IPC分类号： H01L21/28 , H01L21/3213
CPC分类号： H01L21/32137 , H01L21/28061
摘要： A method for fabricating a device which includes a tantalum silicide structure, and which is essentially free of conductive etch residues, is disclosed. The method includes the steps of depositing tantalum and silicon onto a substrate, patterning the tantalum and silicon, and then sintering the patterned tantalum and silicon to form a patterned layer of tantalum silicide.
摘要翻译：公开了一种制造包括硅化钽结构并且基本上不含导电蚀刻残留物的器件的方法。该方法包括以下步骤：将钽和硅沉积到衬底上，图案化钽和硅，然后烧结图案化的钽和硅以形成图案化的硅化钽层。

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