专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110282963A1 STORAGE DEVICE AND METHOD OF CONTROLLING STORAGE DEVICE 审中-公开
标题翻译：存储装置和控制存储装置的方法
公开(公告)号：US20110282963A1
公开(公告)日：2011-11-17
申请号：US12743861
申请日：2010-05-11
申请人： Shohei Shimahara , Hiroki Kanai , Ryosuke Matsubara
发明人： Shohei Shimahara , Hiroki Kanai , Ryosuke Matsubara
IPC分类号： G06F15/16
CPC分类号： G06F3/0656 , G06F3/061 , G06F3/0617 , G06F3/0619 , G06F3/065 , G06F3/067 , G06F11/2056 , G06F11/2089 , G06F12/0866
摘要： Disclosed is a storage device 10 in which CPUs 132 are redundantly configured, and which is thus capable of performing dual-writing of data into cache memories 134 respectively coupled to the CPUs 132. In the storage device 10, general-purpose processors each including an NTB_Port 72, PCI_Ports 73 and a Memory_I/F 74 are used as CPUs 132 of the CPUs 132. In the storage device 10, when a first PCIe_Port 73 determines not to perform the dual-writing, a first NTB_Port 1322 writes data into only one of the cache memories 134, and when the first PCIe_Port 73 determines to perform the dual-writing, the first NTB_Port 1322 writes data into one of the cache memories 134 while writing the data into the other one of the cache memories 134 via the other one of the CPUs 132.
摘要翻译：公开了一种存储装置10，其中CPU 132被冗余地配置，并且因此能够将数据双重写入到分别耦合到CPU 132的高速缓存存储器134中。在存储装置10中，通用处理器包括 NTB_Port 72，PCI_Ports 73和Memory_I / F 74用作CPU 132的CPU 132.在存储装置10中，当第一PCIe_Port 73确定不执行双重写入时，第一NTB_Port 1322将数据写入仅一个的高速缓冲存储器134，并且当第一PCIe_Port 73确定执行双重写入时，第一NTB_Port 1322将数据经由另一个将数据写入另一个高速缓存存储器134中，将数据写入高速缓冲存储器134之一的CPU 132。

2. 发明申请

US20090271539A1 STORAGE CONTROLLING UNIT 审中-公开
标题翻译：存储控制单元
公开(公告)号：US20090271539A1
公开(公告)日：2009-10-29
申请号：US12496684
申请日：2009-07-02
申请人： Akira Fujibayashi , Hiroki Kanai
发明人： Akira Fujibayashi , Hiroki Kanai
IPC分类号： G06F3/00
CPC分类号： G06F3/0658 , G06F3/0607 , G06F3/0632 , G06F3/067
摘要： Provided is a storage controller capable of changing a system configuration with scalability. A storage controller blade of the storage controller includes: interface units that each connect to one of a host computer and a disk device; a processor unit that controls a configuration of the storage controller and data access; a memory unit that stores a data cache and configuration information on the interface unit and the processor unit; and a mutual connection unit that connects the interface units, the processor unit, and the memory unit to one another. The processor unit recognizes a form of connection to another storage controller blade over the mutual network, and the connection path to another storage controller blade is set in the mutual connection unit based on the recognized form of connection.
摘要翻译：提供了能够以可扩展性改变系统配置的存储控制器。存储控制器的存储控制器刀片包括：各自连接到主计算机和盘设备之一的接口单元; 处理器单元，其控制存储控制器的配置和数据访问; 存储单元，其在接口单元和处理器单元上存储数据高速缓存和配置信息; 以及将接口单元，处理器单元和存储器单元彼此连接的相互连接单元。处理器单元通过相互网络识别与另一存储控制器刀片的连接形式，并且基于所识别的连接形式将在另一个存储控制器刀片的连接路径设置在相互连接单元中。

3. 发明授权

US07320051B2 Storage device control apparatus and control method for the storage device control apparatus 失效
标题翻译：用于存储装置控制装置的存储装置控制装置和控制方法
公开(公告)号：US07320051B2
公开(公告)日：2008-01-15
申请号：US11606878
申请日：2006-12-01
申请人： Hiroki Kanai
发明人： Hiroki Kanai
IPC分类号： G06F13/00
CPC分类号： G06F3/0607 , G06F3/0626 , G06F3/0656 , G06F3/0658 , G06F3/0689
摘要： A storage device control apparatus includes a mounting part and an internal connection part. The mounting part can removably mount channel control unit, each with a host interface controller formed therein for receiving data I/O requests, disk control units, each with a disk interface controller formed therein for performing I/O control of the data to storage volumes storing data in response to the data I/O requests, cache memory units, each with a memory formed therein for storing the data, and storage control units, each with the host interface controller, the disk interface controller, and the memory formed therein. The internal connection part connects the channel control units, the disk control units, the cache memory units, and the storage control units in a communicable manner.
摘要翻译：存储装置控制装置包括安装部和内部连接部。安装部分可移除地安装通道控制单元，每个通道控制单元具有形成在其中的主机接口控制器，用于接收数据I / O请求，磁盘控制单元，每个具有形成在其中的磁盘接口控制器，用于执行数据到存储卷的I / O控制响应于数据I / O请求存储数据，高速缓冲存储器单元，每个具有形成在其中的存储器用于存储数据;以及存储控制单元，每个存储控制单元具有主机接口控制器，磁盘接口控制器和形成在其中的存储器。内部连接部分以可通信的方式连接通道控制单元，盘控制单元，高速缓冲存储器单元和存储控制单元。

4. 发明授权

US07287125B2 Disk array device, method for controlling the disk array device and storage system 失效
标题翻译：磁盘阵列设备，磁盘阵列设备和存储系统的控制方法
公开(公告)号：US07287125B2
公开(公告)日：2007-10-23
申请号：US11545514
申请日：2006-10-11
申请人： Seiji Kaneko , Hiroki Kanai
发明人： Seiji Kaneko , Hiroki Kanai
IPC分类号： G06F12/00
CPC分类号： G06F12/0866 , G06F3/0611 , G06F3/0658 , G06F3/0659 , G06F3/067 , G06F3/0689 , G06F12/0815 , G06F12/0817 , Y10S707/99952
摘要： A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
摘要翻译：磁盘阵列装置配备有从外部设备接收数据输入/输出请求的多个输入/输出通道，为相应的相应输入/输出通道提供的多个高速缓存存储器，每个缓存存储器连接到对应的各个输入/输出通道，磁盘驱动器装置，对磁盘驱动装置执行数据输入/输出的磁盘控制模块，以及将输入/输出通道与磁盘控制模块通信连接的通信模块。磁盘阵列设备还包括一致性维护模块，该模块可以执行一致性维持处理以保持存储在每个高速缓冲存储器中的数据的一致性。根据从外部设备接收的数据输入/输出请求的内容，控制根据数据输入/输出请求和一致性维护处理对外部设备进行响应的响应处理的执行顺序。

5. 发明申请

US20070245136A1 Computer system using disk controller and operating service thereof 失效
公开(公告)号：US20070245136A1
公开(公告)日：2007-10-18
申请号：US11808223
申请日：2007-06-07
申请人： Akira Fujibayashi , Kazuhisa Fujimoto , Hiroki Kanai
发明人： Akira Fujibayashi , Kazuhisa Fujimoto , Hiroki Kanai
IPC分类号： H04L12/26
CPC分类号： G06F3/0613 , G06F3/0607 , G06F3/0626 , G06F3/0635 , G06F3/0658 , G06F3/067 , G06F11/3485 , H04L12/66 , H04L67/1097 , Y02D10/34
摘要： When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.

6. 发明授权

US07284086B2 Storage device controlling device and control method for storage device controlling device 有权
标题翻译：存储装置控制装置及存储装置控制装置的控制方法
公开(公告)号：US07284086B2
公开(公告)日：2007-10-16
申请号：US10771465
申请日：2004-02-05
申请人： Hiroki Kanai
发明人： Hiroki Kanai
IPC分类号： G06F12/00
CPC分类号： G06F13/385 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/067
摘要： A storage device controller has a channel controller; a disk controller; and a first memory for storing data delivered between the channel controller and the disk controller. The channel controller has a circuit board on which a first processor, a file access processor having a second processor and a second memory, a data transfer device and a third memory are formed. The second processor transmits information indicating the storage position of data in the second memory to the first processor, the first processor writes into the third memory data transfer information containing information indicating the storage position of data in the first memory and information indicating the storage position of the data in second memory, and the data transfer device reads out data transfer information from the third memory and controls the data transfer between the first memory and the second memory on the basis of data transfer information thus read out.
摘要翻译：存储设备控制器具有通道控制器; 磁盘控制器以及用于存储在通道控制器和盘控制器之间传送的数据的第一存储器。通道控制器具有电路板，其上形成有第一处理器，具有第二处理器和第二存储器的文件访问处理器，数据传送装置和第三存储器。第二处理器将指示第二存储器中的数据的存储位置的信息发送到第一处理器，第一处理器向第三存储器写入包含指示第一存储器中的数据的存储位置的信息和指示存储位置的信息的第三存储器数据传送信息第二存储器中的数据和数据传送装置从第三存储器读出数据传送信息，并且根据读出的数据传送信息控制第一存储器和第二存储器之间的数据传送。

7. 发明授权

US07139880B2 Disk array device, method for controlling the disk array device and storage system 有权
公开(公告)号：US07139880B2
公开(公告)日：2006-11-21
申请号：US10628782
申请日：2003-07-28
申请人： Seiji Kaneko , Hiroki Kanai
发明人： Seiji Kaneko , Hiroki Kanai
IPC分类号： G06F12/00
CPC分类号： G06F12/0866 , G06F3/0611 , G06F3/0658 , G06F3/0659 , G06F3/067 , G06F3/0689 , G06F12/0815 , G06F12/0817 , Y10S707/99952
摘要： A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.

8. 发明授权

US07133976B2 Disk array device, method for controlling the disk array device and storage system 有权
公开(公告)号：US07133976B2
公开(公告)日：2006-11-07
申请号：US11331083
申请日：2006-01-13
申请人： Seiji Kaneko , Hiroki Kanai
发明人： Seiji Kaneko , Hiroki Kanai
IPC分类号： G06F12/00
CPC分类号： G06F12/0866 , G06F3/0611 , G06F3/0658 , G06F3/0659 , G06F3/067 , G06F3/0689 , G06F12/0815 , G06F12/0817 , Y10S707/99952
摘要： A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.

9. 发明授权

US07058761B2 Clustering disk controller, its disk control unit and load balancing method of the unit 失效
公开(公告)号：US07058761B2
公开(公告)日：2006-06-06
申请号：US10090767
申请日：2002-03-06
申请人： Shuji Nakamura , Kazuhisa Fujimoto , Hiroki Kanai , Akira Yoshida
发明人： Shuji Nakamura , Kazuhisa Fujimoto , Hiroki Kanai , Akira Yoshida
IPC分类号： G06F15/16
CPC分类号： G06F3/0635 , G06F3/0613 , G06F3/0689 , G06F2206/1012
摘要： A clustering disk subsystem comprising a switch holding a table which can modify a destination of a request from a host computer, wherein the switch transfers an access request to another channel according to a destination channel status such as heavy load or fault, and the channel which received the request processes the request by proxy for load balancing between internal disk controllers in a clustering disk subsystem. The subsystem has an effect in which load balancing or fail-over between channels or disk controllers can be performed without any special hardware or software in the host. As a result, good performance can be obtained even when access requests from the host computer are concentrated in a specific channel or disk controller.

10. 发明授权

US07020731B2 Disk array control device with two different internal connection systems 失效
公开(公告)号：US07020731B2
公开(公告)日：2006-03-28
申请号：US10436253
申请日：2003-05-13
申请人： Kazuhisa Fujimoto , Atsushi Tanaka , Akira Fujibayashi , Hiroki Kanai , Nobuyuki Minowa
发明人： Kazuhisa Fujimoto , Atsushi Tanaka , Akira Fujibayashi , Hiroki Kanai , Nobuyuki Minowa
IPC分类号： G06F13/14
CPC分类号： G06F3/0611 , G06F3/0613 , G06F3/0635 , G06F3/0658 , G06F3/0683 , G06F3/0689 , G06F12/084 , G06F12/0866 , G06F13/122
摘要： A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式