专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20130042024A1 APPARATUS AND METHOD FOR PRODUCING IDS FOR INTERCONNECTED DEVICES OF MIXED TYPE 失效
标题翻译：用于生产混合类型的互连装置的ID的装置和方法
公开(公告)号：US20130042024A1
公开(公告)日：2013-02-14
申请号：US13590795
申请日：2012-08-21
申请人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM
发明人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM
IPC分类号： G06F3/00
CPC分类号： G06F13/4243 , G06F12/0676
摘要： A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs and NAND-, NOR- and AND-type Flash memories) having associated device type information is serially interconnected. A serial input (SI) containing a device type (DT) and a device identifier (ID) is fed to one device of the serial interconnection. Upon a match between the fed DT matches the DT of the device, the fed ID is latched in a register of the device and an ID for another device is generated, which is then transferred to the next device in the serial interconnection. Otherwise, ID generation is skipped. These steps are performed in all devices. Thus, sequential IDs are generated for the different device types and also the total number of each device type is recognized. If the fed DT is “don't care”, sequential IDs are generated for all devices and the total number of the devices is recognized.
摘要翻译：具有相关联的设备类型信息的多种混合型存储器件（例如，DRAM，SRAM，MRAM和NAND，NOR和AND型闪存）被串联连接。包含设备类型（DT）和设备标识符（ID）的串行输入（SI）被馈送到串行互连的一个设备。在馈送的DT匹配设备的DT之间匹配时，馈送的ID被锁存在设备的寄存器中，并且生成另一个设备的ID，然后将其传送到串行互连中的下一个设备。否则，跳过ID生成。这些步骤在所有设备中执行。因此，为不同的设备类型生成顺序ID，并且还识别每个设备类型的总数。如果馈送的DT不在意，则为所有设备生成顺序ID，并识别设备的总数。

2. 发明申请

US20110185086A1 APPARATUS AND METHOD FOR PRODUCING DEVICE IDENTIFIERS FOR SERIALLY INTERCONNECTED DEVICES OF MIXED TYPE 失效
标题翻译：用于生产混合类型的串联互连设备的设备标识符的装置和方法
公开(公告)号：US20110185086A1
公开(公告)日：2011-07-28
申请号：US13077168
申请日：2011-03-31
申请人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
发明人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
IPC分类号： G06F3/00
CPC分类号： G11C16/20 , G11C8/12
摘要： A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs and NAND-, NOR- and AND-type Flash memories) are serially interconnected. Each device has device type information on its device type. A specific device type (DT) and a device identifier (ID) contained in a serial input (SI) are fed to one device of the serial interconnection. The device determines whether the fed DT matches the DT of the device. In a case of match, a calculator included in the device performs calculation to generate an ID for another device and the fed ID is latched in a register of the device. The generated ID is transferred to another device of the serial interconnection. In a case of no match, the ID generation is skipped and no ID is generated for another device. Such a device type match determination and ID generation or skip are performed in all devices of the serial interconnection. In cases of different device types being separately provided to the interconnected devices, sequential IDs are generated in each of the different device types and also the total number of each device type are recognized. In a case of a “don't care” code is provided to the interconnected devices, sequential IDs are generated and also, the total number of the interconnected devices is recognized, regardless of the type differences.
摘要翻译：多个混合型存储器件（例如，DRAM，SRAM，MRAM以及NAND，NOR和AND型闪存）串联连接。每个设备都有其设备类型的设备类型信息。包含在串行输入（SI）中的特定设备类型（DT）和设备标识符（ID）被馈送到串行互连的一个设备。设备确定馈送的DT是否匹配设备的DT。在匹配的情况下，包含在该设备中的计算器执行计算以生成另一设备的ID，并且将馈送的ID锁存在设备的寄存器中。生成的ID被传送到串行互连的另一个设备。在不匹配的情况下，跳过ID生成，并且不会为其他设备生成ID。在串行互连的所有设备中执行这样的设备类型匹配确定和ID生成或跳过。在将不同设备类型分别提供给互连设备的情况下，在不同设备类型中的每一种中生成顺序ID，并且还识别每种设备类型的总数。在向互连设备提供“不关心”代码的情况下，生成顺序ID，并且还识别互连设备的总数，而不管类型差异。

3. 发明申请

US20110002171A1 MEMORY WITH OUTPUT CONTROL 有权
标题翻译：带输出控制的存储器
公开(公告)号：US20110002171A1
公开(公告)日：2011-01-06
申请号：US12882931
申请日：2010-09-15
申请人： HakJune OH , Hong Beom PYEON , Jin-Ki KIM
发明人： HakJune OH , Hong Beom PYEON , Jin-Ki KIM
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G06F1/12 , G11C7/1021 , G11C7/1051 , G11C7/1078 , G11C11/5642 , G11C16/06 , G11C16/10 , G11C16/16 , G11C16/26 , G11C16/3445 , G11C2207/107
摘要： An apparatus, system, and method for controlling data transfer to an output port of a serial data link interface in a semiconductor memory is disclosed. In one example, a flash memory device may have multiple serial data links, multiple memory banks and control input ports that enable the memory device to transfer the serial data to a serial data output port of the memory device. In another example, a flash memory device may have a single serial data link, a single memory bank, a serial data input port, a control input port for receiving output enable signals. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices.
摘要翻译：公开了一种用于控制向半导体存储器中的串行数据链路接口的输出端口传送数据的装置，系统和方法。在一个示例中，闪存设备可以具有多个串行数据链路，多个存储器组和控制输入端口，其使得存储器设备能够将串行数据传送到存储器件的串行数据输出端口。在另一示例中，闪存器件可以具有单个串行数据链路，单个存储体，串行数据输入端口，用于接收输出使能信号的控制输入端口。闪存器件可以使用回波信号线以菊花链配置级联以在存储器件之间串行通信。

4. 发明申请

US20080192649A1 APPARATUS AND METHOD FOR PRODUCING IDENTIFIERS REGARDLESS OF MIXED DEVICE TYPE IN A SERIAL INTERCONNECTION 有权
标题翻译：用于生产符合串行互连的混合器件类型的标识符的装置和方法
公开(公告)号：US20080192649A1
公开(公告)日：2008-08-14
申请号：US11692446
申请日：2007-03-28
申请人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
发明人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
IPC分类号： H04L12/28
CPC分类号： G11C7/1078 , G11C7/1051 , G11C7/1063 , G11C7/109
摘要： A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs, and NAND-, NOR- and AND-type Flash memories) is serially interconnected. Each device has device type information on its device type. A specific device type (DT) and a device identifier (ID) contained in a serial input (SI) as a packet are fed to one device of the serial interconnection. The device determines whether the fed DT matches the DT of the device. In a case of match, a calculator included in the device performs calculation to generate an ID accompanying the fed DT for another device and the fed ID is latched in a register of the device. In a case of no match, the ID generation is skipped and no ID is generated for another device. The DT is combined with the generated or the received ID depending on the device type match determination. The combined DT and ID is as a packet transferred to a next device. Such a device type match determination and ID generation or skip are performed in all devices of the serial interconnection. With reference to device type provided to the interconnected devices, IDs are sequentially generated. The SI containing the DT, the ID and an ID generation command is transmitted in a packet basis to a next device. A memory controller can recognize the total number of one DT, in response to the ID received from the last device. In a case of a “don't care” DT is provided to the interconnected devices, IDs are sequentially generated and the total number of the interconnected devices is recognized, regardless of the differences in DTs of the devices.
摘要翻译：混合型的多个存储器件（例如，DRAM，SRAM，MRAM以及NAND，NOR和AND型闪存）被串联连接。每个设备都有其设备类型的设备类型信息。作为分组的串行输入（SI）中包含的特定设备类型（DT）和设备标识符（ID）被馈送到串行互连的一个设备。设备确定馈送的DT是否匹配设备的DT。在匹配的情况下，包括在设备中的计算器执行计算以生成伴随用于另一设备的馈送DT的ID，并且将馈送的ID锁存在设备的寄存器中。在不匹配的情况下，跳过ID生成，并且不会为其他设备生成ID。根据设备类型匹配确定，DT与所生成或接收的ID组合。组合的DT和ID作为传送到下一个设备的分组。在串行互连的所有设备中执行这样的设备类型匹配确定和ID生成或跳过。参考提供给互连设备的设备类型，依次生成ID。将包含DT，ID和ID生成命令的SI以分组的形式发送到下一个设备。响应于从最后一个设备接收的ID，存储器控制器可以识别一个DT的总数。在“不关心”的情况下，将DT提供给互连设备，不管设备的DT的差异如何，顺序地生成ID并且识别互连设备的总数。

5. 发明申请

US20080140899A1 ADDRESS ASSIGNMENT AND TYPE RECOGNITION OF SERIALLY INTERCONNECTED MEMORY DEVICES OF MIXED TYPE 失效
标题翻译：混合类型的串联互连存储器件的地址分配和类型识别
公开(公告)号：US20080140899A1
公开(公告)日：2008-06-12
申请号：US11771023
申请日：2007-06-29
申请人： HakJune OH , Hong Beom PYEON , Jin-Ki KIM
发明人： HakJune OH , Hong Beom PYEON , Jin-Ki KIM
IPC分类号： G06F13/00
CPC分类号： G11C7/20 , G06F12/0653 , G06F13/1694 , G11C7/10 , G11C8/12 , G11C8/18
摘要： A memory system architecture is provided in which a memory controller controls operations of memory devices in a serial interconnection configuration. The memory controller has an output serial interface for sending memory commands and an input serial interface for receiving memory responses for those memory commands requisitioning such responses. Each memory device includes a memory, such as, for example, flash memory (e.g., NAND- and NOR-type flash memories). In an initialization phase, the memory devices are assigned with consecutive number addresses. The memory controller sends a target address and can recognize the type of the targeted memory device. A data path for the memory commands and the memory responses is provided by the interconnection.
摘要翻译：提供了存储器系统架构，其中存储器控制器控制串行互连配置中的存储器件的操作。存储器控制器具有用于发送存储器命令的输出串行接口和用于接收用于请求这样的响应的那些存储器命令的存储器响应的输入串行接口。每个存储器件包括存储器，例如闪速存储器（例如NAND和NOR型闪速存储器）。在初始化阶段，存储器设备被分配有连续的地址。存储器控制器发送目标地址并且可以识别目标存储器件的类型。存储器命令和存储器响应的数据路径由互连提供。

6. 发明申请

US20120023286A1 APPARATUS AND METHOD OF PAGE PROGRAM OPERATION FOR MEMORY DEVICES WITH MIRROR BACK-UP OF DATA 有权
标题翻译：用于具有镜像备份数据的存储器件的页面程序操作的装置和方法
公开(公告)号：US20120023286A1
公开(公告)日：2012-01-26
申请号：US13250301
申请日：2011-09-30
申请人： Hong Beom PYEON , Jin-Ki Kim , HakJune Oh
发明人： Hong Beom PYEON , Jin-Ki Kim , HakJune Oh
IPC分类号： G06F12/00
CPC分类号： G06F13/4243 , G06F13/4247
摘要： An apparatus and method of page program operation is provided. When performing a page program operation with a selected memory device, a memory controller loads the data into the page buffer of one selected memory device and also into the page buffer of another selected memory device in order to store a back-up copy of the data. In the event that the data is not successfully programmed into the memory cells of the one selected memory device, then the memory controller recovers the data from the page buffer of the other memory device. Since a copy of the data is stored in the page buffer of the other memory device, the memory controller does not need to locally store the data in its data storage elements.
摘要翻译：提供了一种页面编程操作的装置和方法。当使用所选择的存储器件执行页面编程操作时，存储器控制器将数据加载到一个所选择的存储器件的页面缓冲器中，并将其加载到另一个选择的存储器件的页面缓冲器中，以便存储数据的备份副本。在数据未成功编程到所选存储器件的存储器单元中的情况下，存储器控制器从另一存储器件的页缓冲器中恢复数据。由于数据的副本存储在另一存储器件的页缓冲器中，所以存储器控制器不需要将数据本地存储在其数据存储元件中。

7. 发明申请

US20110194365A1 BRIDGE DEVICE ARCHITECTURE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM 有权
标题翻译：用于将分离存储器件连接到系统的桥接器件结构
公开(公告)号：US20110194365A1
公开(公告)日：2011-08-11
申请号：US13091465
申请日：2011-04-21
申请人： Jin-Ki KIM , HakJune OH , Hong Beom PYEON
发明人： Jin-Ki KIM , HakJune OH , Hong Beom PYEON
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C5/02 , G11C5/025
摘要： Bridge device architecture for connecting discrete memory devices is disclosed. A bridge device is used in conjunction with a composite memory device including at least one discrete memory device. The bridge device comprises a local control interface connected to the at least one discrete memory device, a local input/output interface connected to the at least one discrete memory device, and a global input/output interface interposed between the local control interface and the local input/output interface. The global input/output interface receives and provides global memory control signals and also receives and provides write data to and read data from the at least one discrete memory device.
摘要翻译：公开了用于连接分立存储器件的桥接器件架构。桥接器件与包括至少一个分立存储器件的复合存储器件结合使用。桥接设备包括连接到至少一个分立存储器设备的本地控制接口，连接到至少一个分立存储器设备的本地输入/输出接口以及插入本地控制接口和本地控制接口之间的全局输入/输出接口输入/输出接口。全局输入/输出接口接收并提供全局存储器控制信号，并且还接收并向至少一个离散存储器件提供写入数据和从其读取数据。

8. 发明申请

US20110032932A2 APPARATUS AND METHOD FOR PRODUCING DEVICE IDENTIFIERS FOR SERIALLY INTERCONNECTED DEVICES OF MIXED TYPE 有权
标题翻译：用于生产混合类型的串联互连设备的设备标识符的装置和方法
公开(公告)号：US20110032932A2
公开(公告)日：2011-02-10
申请号：US11692452
申请日：2007-03-28
申请人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
发明人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
IPC分类号： H04L12/56
CPC分类号： G06F13/4243
摘要： A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs, and NAND-, NOR- and AND-type Flash memories) are serially interconnected. Each device has device type information on its device type. A specific device type (DT) and a device identifier (ID) contained in a serial input (SI) as a packet are fed to one device of the serial interconnection. The device determines whether the fed DT matches the DT of the device. In a case of match, a calculator included in the device performs calculation to generate an ID for another device and the fed ID is latched in a register of the device. In a case of no-match, the ID generation is skipped and no ID is generated for another device. The DT is combined with the generated or the received ID depending on the device type match determination. The combined DT and ID is as a packet transferred to a next device. Such a device type match determination and ID generation or skip are performed in all devices of the serial interconnection. With reference to device type provided to the interconnected devices, IDs are sequentially generated. The SI containing the DT, the ID and an ID generation command is transmitted in a packet basis to a next device.
摘要翻译：多个混合型存储器件（例如，DRAM，SRAM，MRAM以及NAND-，NOR-和AND-型闪存）被串联连接。每个设备都有其设备类型的设备类型信息。作为分组的串行输入（SI）中包含的特定设备类型（DT）和设备标识符（ID）被馈送到串行互连的一个设备。设备确定馈送的DT是否匹配设备的DT。在匹配的情况下，包含在该设备中的计算器执行计算以生成另一设备的ID，并且将馈送的ID锁存在设备的寄存器中。在不匹配的情况下，跳过ID生成，并且不为另一设备生成ID。根据设备类型匹配确定，DT与所生成或接收的ID组合。组合的DT和ID作为传送到下一个设备的分组。在串行互连的所有设备中执行这样的设备类型匹配确定和ID生成或跳过。参考提供给互连设备的设备类型，依次生成ID。将包含DT，ID和ID生成命令的SI以分组的形式发送到下一个设备。

9. 发明申请

US20110016236A1 APPARATUS AND METHOD FOR PRODUCING IDENTIFIERS REGARDLESS OF MIXED DEVICE TYPE IN A SERIAL INTERCONNECTION 失效
标题翻译：用于生产符合串行互连的混合器件类型的标识符的装置和方法
公开(公告)号：US20110016236A1
公开(公告)日：2011-01-20
申请号：US12892215
申请日：2010-09-28
申请人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
发明人： Hong Beom PYEON , HakJune OH , Jin-Ki KIM , Shuji SUMI
IPC分类号： G06F13/36
CPC分类号： G11C7/1078 , G11C7/1051 , G11C7/1063 , G11C7/109
摘要： A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs, and NAND-, NOR- and AND-type Flash memories) is serially interconnected. Each device has device type information on its device type. A specific device type (DT) and a device identifier (ID) contained in a serial input (SI) as a packet are fed to one device of the serial interconnection. The device determines whether the fed DT matches the DT of the device. In a case of match, a calculator included in the device performs calculation to generate an ID accompanying the fed DT for another device and the fed ID is latched in a register of the device. In a case of no match, the ID generation is skipped and no ID is generated for another device. The DT is combined with the generated or the received ID depending on the device type match determination. The combined DT and ID is as a packet transferred to a next device. Such a device type match determination and ID generation or skip are performed in all devices of the serial interconnection. With reference to device type provided to the interconnected devices, IDs are sequentially generated. The SI containing the DT, the ID and an ID generation command is transmitted in a packet basis to a next device. A memory controller can recognize the total number of one DT, in response to the ID received from the last device. In a case of a “don't care” DT is provided to the interconnected devices, IDs are sequentially generated and the total number of the interconnected devices is recognized, regardless of the differences in DTs of the devices.
摘要翻译：混合型的多个存储器件（例如，DRAM，SRAM，MRAM以及NAND，NOR和AND型闪存）被串联连接。每个设备都有其设备类型的设备类型信息。作为分组的串行输入（SI）中包含的特定设备类型（DT）和设备标识符（ID）被馈送到串行互连的一个设备。设备确定馈送的DT是否匹配设备的DT。在匹配的情况下，包括在设备中的计算器执行计算以生成伴随用于另一设备的馈送DT的ID，并且将馈送的ID锁存在设备的寄存器中。在不匹配的情况下，跳过ID生成，并且不会为其他设备生成ID。根据设备类型匹配确定，DT与所生成或接收的ID组合。组合的DT和ID作为传送到下一个设备的分组。在串行互连的所有设备中执行这样的设备类型匹配确定和ID生成或跳过。参考提供给互连设备的设备类型，依次生成ID。将包含DT，ID和ID生成命令的SI以分组的形式发送到下一个设备。响应于从最后一个设备接收的ID，存储器控制器可以识别一个DT的总数。在“不关心”的情况下，将DT提供给互连设备，不管设备的DT的差异如何，顺序地生成ID并且识别互连设备的总数。

10. 发明申请

US20100275056A1 APPARATUS AND METHOD OF PAGE PROGRAM OPERATION FOR MEMORY DEVICES WITH MIRROR BACK-UP OF DATA 有权
标题翻译：用于具有镜像备份数据的存储器件的页面程序操作的装置和方法
公开(公告)号：US20100275056A1
公开(公告)日：2010-10-28
申请号：US12832121
申请日：2010-07-08
申请人： Hong Beom PYEON , Jin-Ki KIM , HakJune OH
发明人： Hong Beom PYEON , Jin-Ki KIM , HakJune OH
IPC分类号： G06F12/16 , G06F11/20
CPC分类号： G06F13/4243 , G06F13/4247
摘要： An apparatus and method of page program operation is provided. When performing a page program operation with a selected memory device, a memory controller loads the data into the page buffer of one selected memory device and also into the page buffer of another selected memory device in order to store a back-up copy of the data. In the event that the data is not successfully programmed into the memory cells of the one selected memory device, then the memory controller recovers the data from the page buffer of the other memory device. Since a copy of the data is stored in the page buffer of the other memory device, the memory controller does not need to locally store the data in its data storage elements.
摘要翻译：提供了一种页面编程操作的装置和方法。当使用所选择的存储器件执行页面编程操作时，存储器控制器将数据加载到一个所选择的存储器件的页面缓冲器中，并将其加载到另一个选择的存储器件的页面缓冲器中，以便存储数据的备份副本。在数据未成功编程到所选存储器件的存储器单元中的情况下，存储器控制器从另一存储器件的页缓冲器中恢复数据。由于数据的副本存储在另一存储器件的页缓冲器中，所以存储器控制器不需要将数据本地存储在其数据存储元件中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式