专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100057685A1 INFORMATION STORAGE AND RETRIEVAL SYSTEM 审中-公开
标题翻译：信息存储和检索系统
公开(公告)号：US20100057685A1
公开(公告)日：2010-03-04
申请号：US12202869
申请日：2008-09-02
申请人： Gerhard Luhn , Johann Harter , Franz Kreupl
发明人： Gerhard Luhn , Johann Harter , Franz Kreupl
IPC分类号： G06F7/06 , G06F17/30
CPC分类号： G06F16/313 , G06F16/93
摘要： An information storage and retrieval system includes a first data structure and a second data structure. The first data structure is configured to store documents. Each document includes a plurality of data portions. The second data structure is configured to store addresses to each document and data portion stored in the first data structure at addresses defined by an identity of each data portion.
摘要翻译：信息存储和检索系统包括第一数据结构和第二数据结构。第一个数据结构被配置为存储文档。每个文档包括多个数据部分。第二数据结构被配置为将存储在第一数据结构中的每个文档和数据部分的地址存储在由每个数据部分的身份定义的地址处。

2. 发明授权

US08742387B2 Resistive memory devices with improved resistive changing elements 有权
标题翻译：具有改进的电阻变化元件的电阻式存储器件
公开(公告)号：US08742387B2
公开(公告)日：2014-06-03
申请号：US12145608
申请日：2008-06-25
申请人： Thomas Happ , Franz Kreupl , Jan Boris Philipp , Petra Majewski
发明人： Thomas Happ , Franz Kreupl , Jan Boris Philipp , Petra Majewski
IPC分类号： H01L47/00 , H01L45/00
CPC分类号： H01L45/1253 , G11C13/0004 , G11C2213/79 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/141 , H01L45/146
摘要： An integrated circuit includes a memory cell with a resistance changing memory element. The resistance changing memory element includes a first electrode, a second electrode, and a resistivity changing material disposed between the first and second electrodes, where the resistivity changing material is configured to change resistive states in response to application of a voltage or current to the first and second electrodes. In addition, at least one of the first electrode and the second electrode comprises an insulator material including a self-assembled electrically conductive element formed within the insulator material. The self-assembled electrically conductive element formed within the insulator material remains stable throughout the operation of switching the resistivity changing material to different resistive states.
摘要翻译：集成电路包括具有电阻变化存储元件的存储单元。电阻变化存储元件包括第一电极，第二电极和设置在第一和第二电极之间的电阻率变化材料，其中电阻率变化材料被配置为响应于施加电压或电流而改变电阻状态和第二电极。此外，第一电极和第二电极中的至少一个包括绝缘体材料，其包括形成在绝缘体材料内的自组装导电元件。形成在绝缘体材料内的自组装导电元件在将电阻率变化材料切换到不同电阻状态的整个操作期间保持稳定。

3. 发明申请

US20120243337A1 P-/METAL FLOATING GATE NON-VOLATILE STORAGE ELEMENT 有权
标题翻译： P- /金属浮动门非易失存储元件
公开(公告)号：US20120243337A1
公开(公告)日：2012-09-27
申请号：US13153964
申请日：2011-06-06
申请人： Sanghyun Lee , Mohan Dunga , Masaaki Higashitani , Tuan Pham , Franz Kreupl
发明人： Sanghyun Lee , Mohan Dunga , Masaaki Higashitani , Tuan Pham , Franz Kreupl
IPC分类号： G11C16/10 , G11C16/04 , H01L21/336 , H01L29/788
CPC分类号： H01L21/28273 , H01L27/11524 , H01L27/11529 , H01L29/42324
摘要： Non-volatile storage elements having a P−/metal floating gate are disclosed herein. The floating gate may have a P− region near the tunnel oxide, and may have a metal region near the control gate. A P− region near the tunnel oxide helps provide good data retention. A metal region near the control gate helps to achieve a good coupling ratio between the control gate and floating gate. Therefore, programming of non-volatile storage elements is efficient. Also, erasing the non-volatile storage elements may be efficient. In some embodiments, having a P− region near the tunnel oxide (as opposed to a strongly doped p-type semiconductor) may improve erase efficiency relative to P+.
摘要翻译：本文公开了具有P- /金属浮动栅极的非易失性存储元件。浮栅可以在隧道氧化物附近具有P-区域，并且可以在控制栅极附近具有金属区域。隧道氧化物附近的P-区域有助于提供良好的数据保留。控制栅极附近的金属区域有助于实现控制栅极和浮动栅极之间良好的耦合比。因此，非易失性存储元件的编程是有效的。此外，擦除非易失性存储元件可能是有效的。在一些实施例中，在隧道氧化物附近具有P-区（与强掺杂p型半导体相反）可提高相对于P +的擦除效率。

4. 发明授权

US08254166B2 Integrated circuit including doped semiconductor line having conductive cladding 失效
标题翻译：集成电路包括具有导电包层的掺杂半导体线
公开(公告)号：US08254166B2
公开(公告)日：2012-08-28
申请号：US12206439
申请日：2008-09-08
申请人： Ulrich Klosterman , Ulrike Gruening-von Schwerin , Franz Kreupl
发明人： Ulrich Klosterman , Ulrike Gruening-von Schwerin , Franz Kreupl
IPC分类号： G11C11/36 , H01L21/441
CPC分类号： H01L27/2409 , G11C13/0004 , G11C2213/72 , H01L45/06
摘要： An integrated circuit includes an array of memory cells. Each memory cell includes a diode. The integrated circuit includes a doped semiconductor line formed in a semiconductor substrate. The doped semiconductor line is coupled to a row of diodes. The integrated circuit includes conductive cladding contacting the doped semiconductor line.
摘要翻译：集成电路包括存储单元阵列。每个存储单元包括一个二极管。集成电路包括形成在半导体衬底中的掺杂半导体线。掺杂半导体线耦合到一排二极管。集成电路包括与掺杂半导体线接触的导电包层。

5. 发明申请

US20110310656A1 Memory Cell With Resistance-Switching Layers Including Breakdown Layer 有权
标题翻译：具有包含故障层的电阻切换层的存储单元
公开(公告)号：US20110310656A1
公开(公告)日：2011-12-22
申请号：US13157208
申请日：2011-06-09
申请人： Franz Kreupl , Chu-Chen Fu , Yibo Nian
发明人： Franz Kreupl , Chu-Chen Fu , Yibo Nian
IPC分类号： G11C11/00 , H01L45/00
CPC分类号： H01L27/2409 , G11C11/16 , G11C11/1659 , G11C13/0007 , G11C2213/31 , G11C2213/71 , G11C2213/72 , H01L27/2481 , H01L45/08 , H01L45/122 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146
摘要： A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has a resistance-switching layer, a conductive intermediate layer, and first and second electrodes at either end of the RSME. A breakdown layer is electrically between, and in series with, the second electrode and the intermediate layer. The breakdown layer maintains a resistance of at least about 1-10 MΩ while in a conductive state. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.
摘要翻译： 3-D读写存储器中的存储器件包括存储器单元。每个存储单元包括与转向元件串联的电阻切换存储元件（RSME）。 RSME具有电阻切换层，导电中间层以及在RSME的任一端的第一和第二电极。击穿层在第二电极和中间层之间电连接并与其串联。击穿层保持至少约1-10MΩ的电阻; 而处于导电状态。在存储单元的置位或复位操作中，离子电流在电阻切换层中流动，有助于切换机构。由于导电中间层的散射，对切换机构无贡献的电子流减少，以避免损坏转向元件。提供了用于RSME不同层的材料和材料的组合。

6. 发明授权

US07915603B2 Modifiable gate stack memory element 有权
标题翻译：可修改的门堆栈存储元件
公开(公告)号：US07915603B2
公开(公告)日：2011-03-29
申请号：US11588865
申请日：2006-10-27
申请人： Franz Kreupl
发明人： Franz Kreupl
IPC分类号： H01L29/00
CPC分类号： H01L29/78 , G11C13/0004 , G11C13/0007 , G11C13/0011 , G11C2213/31 , G11C2213/32 , G11C2213/53 , G11C2213/71 , H01L29/0673 , H01L29/42324 , H01L29/42368 , H01L29/42376 , H01L29/513 , H01L29/517 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/7887
摘要： An apparatus and method for storing information are provided, including using a transistor having a channel, a gate oxide layer, a gate electrode, and a modifiable gate stack layer. The on-resistance of the transistor is changed by causing a non-charge-storage based physical change in the modifiable gate stack layer, to store information.
摘要翻译：提供了一种用于存储信息的装置和方法，包括使用具有沟道的晶体管，栅极氧化层，栅电极和可修改的栅叠层层。通过在可修改的栅极堆叠层中引起基于非电荷存储的物理变化来改变晶体管的导通电阻以存储信息。

7. 发明授权

US07863700B2 Magnetoresistive sensor with tunnel barrier and method 有权
标题翻译：具有隧道屏障和方法的磁阻传感器
公开(公告)号：US07863700B2
公开(公告)日：2011-01-04
申请号：US12164765
申请日：2008-06-30
申请人： Franz Kreupl , Ulrich Klostermann
发明人： Franz Kreupl , Ulrich Klostermann
IPC分类号： H01L29/82
CPC分类号： G11B5/3909 , B82Y10/00 , B82Y25/00 , G01R33/098 , G11B5/3906 , H01L43/08 , H01L43/10
摘要： Magnetoresistive sensors with tunnel barrier and method. One embodiment provides a magnetoresistive sensor having a magnetic tunnel junction is provided. The magnetic tunnel junction includes a barrier layer. The barrier layer includes carbon, pyrolytic carbon, or graphene, or graphite.
摘要翻译：具有隧道屏障和方法的磁阻传感器。一个实施例提供了具有磁性隧道结的磁阻传感器。磁性隧道结包括阻挡层。阻挡层包括碳，热解碳或石墨烯或石墨。

8. 发明申请

US20100061140A1 INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUCTIVE CLADDING 失效
标题翻译：集成电路，包括具有导电封接的二极管半导体线
公开(公告)号：US20100061140A1
公开(公告)日：2010-03-11
申请号：US12206439
申请日：2008-09-08
申请人： Ulrich Klostermann , Ulrike Gruening-von Schwerin , Franz Kreupl
发明人： Ulrich Klostermann , Ulrike Gruening-von Schwerin , Franz Kreupl
IPC分类号： H01L45/00 , G11C11/00 , H01L21/20
CPC分类号： H01L27/2409 , G11C13/0004 , G11C2213/72 , H01L45/06
摘要： An integrated circuit includes an array of memory cells. Each memory cell includes a diode. The integrated circuit includes a doped semiconductor line formed in a semiconductor substrate. The doped semiconductor line is coupled to a row of diodes. The integrated circuit includes conductive cladding contacting the doped semiconductor line.
摘要翻译：集成电路包括存储单元阵列。每个存储单元包括一个二极管。集成电路包括形成在半导体衬底中的掺杂半导体线。掺杂半导体线耦合到一排二极管。集成电路包括与掺杂半导体线接触的导电包层。

9. 发明申请

US20090321706A1 Resistive Memory Devices with Improved Resistive Changing Elements 有权
标题翻译：具有改进的电阻变化元件的电阻式存储器件
公开(公告)号：US20090321706A1
公开(公告)日：2009-12-31
申请号：US12145608
申请日：2008-06-25
申请人： Thomas Happ , Franz Kreupl , Jan Boris Philipp , Petra Majewski
发明人： Thomas Happ , Franz Kreupl , Jan Boris Philipp , Petra Majewski
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , G11C13/0004 , G11C2213/79 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/141 , H01L45/146
摘要： An integrated circuit includes a memory cell with a resistance changing memory element. The resistance changing memory element includes a first electrode, a second electrode, and a resistivity changing material disposed between the first and second electrodes, where the resistivity changing material is configured to change resistive states in response to application of a voltage or current to the first and second electrodes. In addition, at least one of the first electrode and the second electrode comprises an insulator material including a self-assembled electrically conductive element formed within the insulator material. The self-assembled electrically conductive element formed within the insulator material remains stable throughout the operation of switching the resistivity changing material to different resistive states.
摘要翻译：集成电路包括具有电阻变化存储元件的存储单元。电阻变化存储元件包括第一电极，第二电极和设置在第一和第二电极之间的电阻率变化材料，其中电阻率变化材料被配置为响应于施加电压或电流而改变电阻状态和第二电极。此外，第一电极和第二电极中的至少一个包括绝缘体材料，其包括形成在绝缘体材料内的自组装导电元件。形成在绝缘体材料内的自组装导电元件在将电阻率变化材料切换到不同电阻状态的整个操作期间保持稳定。

10. 发明授权

US07635867B2 Nanotube array and method for producing a nanotube array 失效
标题翻译：纳米管阵列及其制造方法
公开(公告)号：US07635867B2
公开(公告)日：2009-12-22
申请号：US10476663
申请日：2002-05-16
申请人： Andrew Graham , Franz Hofmann , Johannes Kretz , Franz Kreupl , Richard Luyken , Wolfgang Rösner
发明人： Andrew Graham , Franz Hofmann , Johannes Kretz , Franz Kreupl , Richard Luyken , Wolfgang Rösner
IPC分类号： H01L31/0312
CPC分类号： H01L51/0048 , B82Y10/00 , C01B32/05 , G01N27/127 , G11C13/025 , H01L51/0595
摘要： A nanotube array and a method for producing a nanotube array. The nanotube array has a substrate, a catalyst layer, which includes one or more subregions, on the surface of the substrate and at least one nanotube arranged on the surface of the catalyst layer, parallel to the surface of the substrate. The at least one nanotube being arranged parallel to the surface of the substrate results in a planar arrangement of at least one nanotube. Therefore, the nanotube array of the invention is suitable for coupling to conventional silicon microelectronics. Therefore, according to the invention it is possible for a nanotube array to be electronically coupled to macroscopic semiconductor electronics. Furthermore, the nanotube array according to the invention may have an electrically insulating layer between the substrate and the catalyst layer. This electrically insulating layer preferably has a topography which is such that the at least one nanotube rests on the electrically insulating layer at its end sections and is uncovered in its central section. As a result of the surface of the at least one nanotube being partly uncovered, the uncovered surface of the nanotube can be used as an active sensor surface. For example, the uncovered surface of the nanotube can come into operative contact with an atmosphere which surrounds the nanotube array. The electrical resistance of a nanotube changes significantly in the presence of certain gases. Thus because the nanotube is clear and uncovered, the nanotube array can be used in many sensor applications.
摘要翻译：纳米管阵列及其制造方法。纳米管阵列具有衬底，催化剂层，其包括在衬底的表面上的一个或多个子区域，和布置在催化剂层表面上的平行于衬底表面的至少一个纳米管。所述至少一个纳米管平行于衬底的表面布置，导致至少一个纳米管的平面布置。因此，本发明的纳米管阵列适用于与传统的硅微电子耦合。因此，根据本发明，可以将纳米管阵列电连接到宏观半导体电子器件。此外，根据本发明的纳米管阵列可以在衬底和催化剂层之间具有电绝缘层。该电绝缘层优选地具有使得至少一个纳米管在其端部部分处于电绝缘层上并且在其中心部分未被覆盖的形貌。由于至少一个纳米管的表面部分未被覆盖，纳米管的未被覆盖的表面可以用作主动传感器表面。例如，纳米管的未覆盖表面可以与围绕纳米管阵列的气氛进行操作接触。在某些气体的存在下，纳米管的电阻显着变化。因此，由于纳米管是透明和未覆盖的，所以纳米管阵列可用于许多传感器应用中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式