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1. 发明授权

US07214596B2 Method for the fabrication of isolation structures 有权
标题翻译：隔离结构的制造方法
公开(公告)号：US07214596B2
公开(公告)日：2007-05-08
申请号：US10909749
申请日：2004-08-02
申请人： Francesco Ciovacco , Roberto Colombo
发明人： Francesco Ciovacco , Roberto Colombo
IPC分类号： H01L21/76 , H01L21/336 , H01L21/4763
CPC分类号： H01L21/3065 , H01L21/3081
摘要： A method for manufacturing insulating structures in a semiconductor substrate includes forming a first insulating layer on the semiconductor substrate, forming a stop layer on the first insulating layer, and forming a barrier layer on the stop layer. The barrier layer is selective with respect to the stop layer. A screen layer is formed on the barrier layer. A portion of the screen layer is selectively removed for forming an opening therethrough for exposing a portion of the barrier layer. The exposed barrier layer is removed for exposing a portion of the stop layer. The exposed stop layer is removed for exposing a portion of the semiconductor substrate. The method further includes removing the remaining barrier layer, and removing a portion of the exposed semiconductor substrate for forming a trench therein.
摘要翻译：在半导体衬底中制造绝缘结构的方法包括在半导体衬底上形成第一绝缘层，在第一绝缘层上形成阻挡层，并在阻挡层上形成阻挡层。阻挡层相对于停止层是选择性的。屏障层形成在阻挡层上。选择性地去除屏幕层的一部分以形成穿过其中的开口以暴露阻挡层的一部分。去除曝光的阻挡层以暴露停止层的一部分。去除暴露的停止层以暴露半导体衬底的一部分。该方法还包括去除剩余的阻挡层，以及去除暴露的半导体衬底的一部分以在其中形成沟槽。

2. 发明申请

US20060073651A1 Method for manufacturing electronic circuits integrated on a semiconductor substrate 审中-公开
标题翻译：集成在半导体基板上的电子电路的制造方法
公开(公告)号：US20060073651A1
公开(公告)日：2006-04-06
申请号：US11294763
申请日：2005-12-06
申请人： Francesco Ciovacco , Simone Alba , Roberto Colombo , Chiara Savardi
发明人： Francesco Ciovacco , Simone Alba , Roberto Colombo , Chiara Savardi
IPC分类号： H01L21/8238 , H01L21/302
CPC分类号： H01L21/823437 , H01L21/0276 , H01L21/0332 , H01L21/0337 , H01L21/0338 , H01L21/3081 , H01L21/3086 , H01L21/3088 , H01L21/31138 , H01L21/31144 , H01L21/32139 , H01L21/76804 , H01L21/76816
摘要： A method for manufacturing semiconductor-integrated electronic circuits includes: depositing an auxiliary layer on a substrate; depositing a layer of screening material on the auxiliary layer; selectively removing the layer of screening material to provide a first opening in the layer of screening material and expose an area of the auxiliary layer; and removing this area of the auxiliary layer to form a second opening in the auxiliary layer, whose cross-section narrows toward the substrate to expose an area of the substrate being smaller than the area exposed by the first opening.
摘要翻译：一种半导体集成电子电路的制造方法，其特征在于，在基板上形成辅助层，在辅助层上沉积一层筛选材料; 选择性地去除所述筛选材料层以在所述筛选材料层中提供第一开口并暴露所述辅助层的区域; 并且去除辅助层的该区域以在辅助层中形成第二开口，其横截面朝向衬底变窄，以暴露衬底的区域小于由第一开口暴露的区域。

3. 发明授权

US06998348B2 Method for manufacturing electronic circuits integrated on a semiconductor substrate 失效
公开(公告)号：US06998348B2
公开(公告)日：2006-02-14
申请号：US10428338
申请日：2003-05-01
申请人： Francesco Ciovacco , Simone Alba , Roberto Colombo , Chiara Savardi
发明人： Francesco Ciovacco , Simone Alba , Roberto Colombo , Chiara Savardi
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/823437 , H01L21/0276 , H01L21/0332 , H01L21/0337 , H01L21/0338 , H01L21/3081 , H01L21/3086 , H01L21/3088 , H01L21/31138 , H01L21/31144 , H01L21/32139 , H01L21/76804 , H01L21/76816
摘要： A method for manufacturing semiconductor-integrated electronic circuits includes: depositing an auxiliary layer on a substrate; depositing a layer of screening material on the auxiliary layer; selectively removing the layer of screening material to provide a first opening in the layer of screening material and expose an area of the auxiliary layer; and removing this area of the auxiliary layer to form a second opening in the auxiliary layer, whose cross-section narrows toward the substrate to expose an area of the substrate being smaller than the area exposed by the first opening.

4. 发明申请

US20050026389A1 Method for the fabrication of isolation structures 有权
标题翻译：隔离结构的制造方法
公开(公告)号：US20050026389A1
公开(公告)日：2005-02-03
申请号：US10909749
申请日：2004-08-02
申请人： Francesco Ciovacco , Roberto Colombo
发明人： Francesco Ciovacco , Roberto Colombo
IPC分类号： H01L21/3065 , H01L21/308 , H01L31/109
CPC分类号： H01L21/3065 , H01L21/3081
摘要： A method for manufacturing insulating structures in a semiconductor substrate includes forming a first insulating layer on the semiconductor substrate, forming a stop layer on the first insulating layer, and forming a barrier layer on the stop layer. The barrier layer is selective with respect to the stop layer. A screen layer is formed on the barrier layer. A portion of the screen layer is selectively removed for forming an opening therethrough for exposing a portion of the barrier layer. The exposed barrier layer is removed for exposing a portion of the stop layer. The exposed stop layer is removed for exposing a portion of the semiconductor substrate. The method further includes removing the remaining barrier layer, and removing a portion of the exposed semiconductor substrate for forming a trench therein.
摘要翻译：在半导体衬底中制造绝缘结构的方法包括在半导体衬底上形成第一绝缘层，在第一绝缘层上形成阻挡层，并在阻挡层上形成阻挡层。阻挡层相对于停止层是选择性的。屏障层形成在阻挡层上。选择性地去除屏幕层的一部分以形成穿过其中的开口以暴露阻挡层的一部分。去除曝光的阻挡层以暴露停止层的一部分。去除暴露的停止层以暴露半导体衬底的一部分。该方法还包括去除剩余的阻挡层，以及去除暴露的半导体衬底的一部分以在其中形成沟槽。

5. 发明申请

US20130200985A1 ARMOURED RESISTOR WITH AN END SEALING ELEMENT 有权
标题翻译：具有末端密封元件的装甲电阻
公开(公告)号：US20130200985A1
公开(公告)日：2013-08-08
申请号：US13701265
申请日：2011-05-31
申请人： Roberto Colombo , Gianni Palu' , Maurizio Biasi
发明人： Roberto Colombo , Gianni Palu' , Maurizio Biasi
IPC分类号： H01H37/76 , H01C17/02
CPC分类号： H01H37/761 , H01C17/02 , H05B3/04 , H05B3/06 , H05B3/42 , Y10T29/49087
摘要： Armoured resistor with an end sealing element in which the electric pin (2) partially projecting from an end (1′) of the armour (1) and connected to said end by said sealing element (5) is provided with a part (22) with high roughness, i.e. knurling and/or toothing (22′, 22″, 22′″) and/or a circular groove (23, 23′), moreover said end (1′) of the armour is crimped in order to compress said sealing element (5) against said zone with high roughness.
摘要翻译：具有端部密封元件的装甲电阻器，其中从所述铠装（1）的端部（1'）部分地突出并且通过所述密封元件（5）连接到所述端部的所述电引脚（2）设置有部分（22）具有高粗糙度，即滚花和/或齿形（22'，22“，22”“）和/或圆形槽（23,23'），此外，装甲的所述端部（1'）按顺序卷曲以高粗糙度将所述密封元件（5）压靠所述区域。

6. 发明授权

US4435345A Process for the production of a continuous sheet of foamed synthetic, thermoplastic polymer by extrusion 失效
标题翻译：通过挤出生产连续的发泡合成热塑性聚合物片的方法
公开(公告)号：US4435345A
公开(公告)日：1984-03-06
申请号：US316383
申请日：1981-10-29
申请人： Roberto Colombo
发明人： Roberto Colombo
IPC分类号： B29B7/00 , B01D17/00 , B29C44/50 , B29C47/00 , B29C47/16 , B29C47/90 , B29C47/92 , B29D20060101 , B29D23/00 , C08J20060101 , B29D27/00
CPC分类号： B29C44/26 , B29C44/3403 , B29C44/50 , B29C44/56 , B29C2791/006 , Y10S264/13
摘要： The density of the foam is reduced and the thickness of the sheet obtained by extrusion/expansion is increased by grasping the sheet between confining walls which are permeable to gas and movable together with the sheet, and which diverge from each other in the direction of advance of the sheet, and by applying a subatmospheric pressure to the faces of the sheet and through the said walls while the sheet is in its thermoplastic state, after which the foam is gelled by cooling to stabilize the thickness achieved.
摘要翻译：泡沫体的密度降低，并且通过将可吸收气体并与片材一起移动的限制壁之间的片材夹持在挤出/膨胀获得的片材的厚度上，并且在前进方向上彼此分开并且当片材处于其热塑性状态时，通过对片材的表面和通过所述壁施加低于大气压的压力，之后通过冷却凝胶化泡沫以稳定所获得的厚度。

7. 发明授权

US08774610B2 Steam generator 有权
标题翻译：蒸汽发生器
公开(公告)号：US08774610B2
公开(公告)日：2014-07-08
申请号：US13264214
申请日：2010-04-14
申请人： Roberto Colombo , Maurizio Biasi , Angelo Irrera
发明人： Roberto Colombo , Maurizio Biasi , Angelo Irrera
IPC分类号： F22B1/28 , F22B37/40 , D06F39/04 , D06F39/08
CPC分类号： D06F39/008
摘要： Steam generator (1) is provided with an electric heating element (2) for heating water to be evaporated, consisting of an electric heating resistor (21) inserted in a profiled base (8) of a metal supporting element (7), fixed in a hole obtained in one of the vertical walls (15) of the container (4) for heating water.
摘要翻译：蒸汽发生器（1）设置有用于加热待蒸发的水的电加热元件（2），其包括插入金属支撑元件（7）的异形基座（8）中的电加热电阻器（21），固定在在容器（4）的一个垂直壁（15）中的一个中获得用于加热水的孔。

8. 发明授权

US08293598B2 Process for manufacturing a memory device including a vertical bipolar junction transistor and a CMOS transistor with spacers 有权
标题翻译：用于制造包括垂直双极结型晶体管和具有间隔物的CMOS晶体管的存储器件的工艺
公开(公告)号：US08293598B2
公开(公告)日：2012-10-23
申请号：US12557396
申请日：2009-09-10
申请人： Fabio Pellizzer , Cristina Casellato , Michele Magistretti , Roberto Colombo , Lucilla Brattico
发明人： Fabio Pellizzer , Cristina Casellato , Michele Magistretti , Roberto Colombo , Lucilla Brattico
IPC分类号： H01L21/8238 , H01L27/06
CPC分类号： H01L27/0623 , G11C13/0004 , H01L21/8249 , H01L27/1022 , H01L27/2445 , H01L29/6656 , H01L29/6659 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： A bipolar selection transistor and a circuitry MOS transistor for a memory device are formed in a semiconductor body. The bipolar selection transistor is formed by implanting a buried collector, implanting a base region on the buried collector, forming a silicide protection mask on the semiconductor body, and implanting an emitter region and a control contact region. The circuitry MOS transistor is formed by defining a gate on the semiconductor body, forming lateral spacers on the sides of the gate and implanting source and drain regions on the sides of the lateral spacers. Then, a silicide region is formed on the emitter, base contact, source and drain regions and the gate, in a self-aligned way. The lateral spacers are multilayer structures including at least two different layers, one of which is used to form the silicide protection mask on the bipolar selection transistor. Thereby, the dimensions of the lateral spacers are decoupled from the thickness of the silicide protection mask.
摘要翻译：在半导体本体中形成用于存储器件的双极选择晶体管和电路MOS晶体管。双极选择晶体管通过注入掩埋集电器，在掩埋集电极上注入基极区域，在半导体主体上形成硅化物保护掩模，以及注入发射极区域和控制接触区域而形成。电路MOS晶体管通过在半导体主体上限定栅极形成，在栅极的侧面上形成横向间隔物，并在侧面间隔物的侧面上注入源极和漏极区域。然后，以自对准的方式在发射极，基极接触，源极和漏极区域以及栅极上形成硅化物区域。横向间隔物是包括至少两个不同层的多层结构，其中之一用于在双极选择晶体管上形成硅化物保护掩模。因此，横向间隔件的尺寸与硅化物防护罩的厚度分离。

9. 发明授权

US07544620B2 Process for digging a deep trench in a semiconductor body and semiconductor body so obtained 有权
标题翻译：用于挖掘如此获得的半导体本体和半导体主体中的深沟槽的工艺
公开(公告)号：US07544620B2
公开(公告)日：2009-06-09
申请号：US11648838
申请日：2006-12-28
申请人： Roberto Colombo
发明人： Roberto Colombo
IPC分类号： H01L21/461
CPC分类号： H01L21/30655 , H01L21/76281 , H01L21/76283
摘要： A process for digging deep trenches in a body of semiconductor material includes forming a mask having an opening, above a surface of a semiconductor body. A passivating layer is conformally formed on the mask and on the semiconductor body within the opening. A directional etch is extended to first remove the passivating layer from on top of the semiconductor body and then etch the semiconductor body through the opening. Forming the passivating layer and executing the directional etch are carried out repeatedly in sequence so as to form a trench through the opening. A tapered portion of the trench is formed, which has a transverse dimension decreasing as a distance from the surface of the semiconductor body increases.
摘要翻译：用于挖掘半导体材料体中的深沟槽的方法包括在半导体本体的表面上形成具有开口的掩模。钝化层在掩模和开口内的半导体本体上共形地形成。扩展定向蚀刻以首先从半导体主体的顶部去除钝化层，然后通过开口蚀刻半导体本体。顺序地重复执行形成钝化层并执行定向蚀刻，以形成通过该开口的沟槽。形成沟槽的锥形部分，其横截面尺寸随半导体本体表面的距离增加而减小。

10. 发明授权

US6137092A Resistance heating element, in particular for clothes dryers 失效
标题翻译：电阻加热元件，特别适用于干衣机
公开(公告)号：US6137092A
公开(公告)日：2000-10-24
申请号：US422728
申请日：1999-10-22
申请人： Roberto Colombo , Duilio Capraro
发明人： Roberto Colombo , Duilio Capraro
IPC分类号： D06F58/26 , H05B3/16 , H05B6/62 , H05B3/02
CPC分类号： H05B6/62 , D06F58/26 , H05B3/16
摘要： A resistive heating element, in particular for clothes dryers, comprising a substantially rectangular plate of heating resistant dielectric material supported at its ends by two shoulders also of heat-resistant dielectric material and inserted through a resistive wire spiral connected at its ends to conductor cables, characterised in that one end of the plate is freely slidable along a slot provided in the corresponding shoulder.
摘要翻译：一种电阻加热元件，特别是用于干衣机的电阻加热元件，包括耐热电介质材料的基本矩形的板，其两端由耐热介电材料支承，并通过其端部连接到电缆的电阻丝螺旋插入，其特征在于，所述板的一端可沿着设置在相应肩部中的槽自由滑动。

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