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    • 2. 发明授权
    • Methods of manufacturing thin-film absolute pressure sensors
    • 制造薄膜绝对压力传感器的方法
    • US5471723A
    • 1995-12-05
    • US280616
    • 1994-07-26
    • Ernst LuderTraugott KallfassMasoud HabibiFrank HegnerGeorg Schneider
    • Ernst LuderTraugott KallfassMasoud HabibiFrank HegnerGeorg Schneider
    • G01L9/00H01G5/16
    • G01L9/0073G01L9/0042G01L9/0054Y10T29/43
    • Resistive and capacitive absolute pressure sensors are disclosed which are made by surface micromachining and thin-film techniques. In the case of a capacitive sensor, the electrodes have a high insulation resistance relative to each other, the diaphragm exhibits only little tensile strain in the finished condition, no sublimation step is necessary to prevent the diaphragm from sticking to the substrate, the diaphragm provides a measurement signal over a wide pressure range even if its rests against the substrate, the measurement signal is virtually temperature-independent, and only few chemical-vapor-deposition and photolithographic steps are necessary. The capacitive sensor has a glass substrate and a diaphragm which bound a hermetically sealed cavity, the substrate supporting, on the cavity side, a substrate electrode with first interconnection tracks or corner pads extending therefrom, the diaphragm being made of the material of a first insulating layer, which firmly adheres, at least in part, to the substrate at the edge of the cavity, and supporting, on the side remote from the cavity, a top electrode and a second insulating layer which completely covers the top electrode and the diaphragm and hermetically seals the cavity, and the top electrode having second interconnection tracks extending therefrom onto the first insulating layer outside the diaphragm. In the case of a resistive sensor, the substrate electrode is omitted, and the top electrode is replaced by a half or full bridge consisting of piezoresistors. Four manufacturing process variants are disclosed.
    • 公开了通过表面微加工和薄膜技术制造的电阻和电容绝对压力传感器。 在电容传感器的情况下,电极相对于彼此具有高的绝缘电阻,隔膜在成品状态下仅显示很小的拉伸应变,不需要升华步骤来防止隔膜粘附到基板上,隔膜提供 测量信号在宽的压力范围内,即使其靠在衬底上,测量信号实际上与温度无关,并且仅需要少量化学气相沉积和光刻步骤。 电容式传感器具有玻璃基板和隔膜,其结合密封空腔,所述基板在空腔侧支撑具有从其延伸的第一互连轨道或角垫的基板电极,所述隔膜由第一绝缘材料 层,其至少部分地在空腔的边缘处粘附到基底,并且在远离腔的一侧支撑完全覆盖顶部电极和隔膜的顶部电极和第二绝缘层,以及 密封空腔,顶部电极具有从其延伸到隔膜外侧的第一绝缘层上的第二互连轨道。 在电阻传感器的情况下,省略了基板电极,并且顶部电极由由压敏电阻器组成的半桥或全桥替代。 披露了四种制造方法变体。
    • 3. 发明授权
    • Circuit device for controlling circuit components connected in series or
in a matrix-like network
    • 用于控制串联或矩阵状网络中连接的电路组件的电路装置
    • US5517543A
    • 1996-05-14
    • US207758
    • 1994-03-08
    • Kai SchleupenErnst Luder
    • Kai SchleupenErnst Luder
    • G09G3/36G11C19/18G11C19/28
    • G09G3/3685G09G3/3674G11C19/184G09G2310/0286
    • The circuit device has a plurality of cascaded stages. Each cascaded stage includes several partial stages and has at most two capacitors (C.sub.n1, C.sub.nB) and at most seven transistors (T.sub.n1, T.sub.n2, T.sub.n3, T.sub.n4, T.sub.n5, T.sub.n6, T.sub.n7). The circuit device includes a device for controlling the cascaded stages with four periodic clock signals (.PHI..sub.1, .PHI..sub.2, .PHI..sub.3, .sub.101 .sub.4) phase-shifted about 90.degree. relative to each other such that each of the cascaded stages is controlled by a respective assigned one of four predetermined sets of two of the four periodic clock signals and the same one of the four predetermined set repeats every fifth cascaded stage. Each cascaded stage includes an output stage (12, 12') including a bootstrap-capacitor (C.sub.nB) and three transistors (T.sub.n5, T.sub.n6, T.sub.n7) electrically connected to the bootstrap-capacitor (C.sub.nB); and a charging and discharging stage (11) for the bootstrap-capacitor (C.sub.nB). The charging and discharging stage (11) includes at least one transistor (T.sub.n4) connected electrically to the bootstrap capacitor (C.sub.nB). Each cascaded stage can advantageously also include an inverter stage connected to the charging and discharging stage and including two transistors (T.sub.n1, T.sub.n2) and a memory capacitor (C.sub.n1) electrically connected with each other and controlled by an input signal so that so that both transistors (T.sub.n1, T.sub.n2) are never simultaneously conducting.
    • 电路装置具有多个级联级。 每个级联级包括几个部分级,并且具有至多两个电容器(Cn1,CnB)和至多七个晶体管(Tn1,Tn2,Tn3,Tn4,Tn5,Tn6,Tn7)。 该电路装置包括用于通过相对于彼此相移大约90度的四个周期性时钟信号(PHI 1,PHI 2,PHI 3,101 4)来控制级联级的装置,使得每个级联级由 在四个周期性时钟信号中的四个预定组中的四个预定集合中的每一个分配一个,并且每五个级联阶段中四个预定集合重复中的相同一个。 每个级联级包括电连接到自举电容器(CnB)的包括自举电容器(CnB)和三个晶体管(Tn5,Tn6,Tn7)的输出级(12,12'); 以及用于自举电容器(CnB)的充电和放电级(11)。 充电和放电级(11)包括至少一个与自举电容器(CnB)电连接的晶体管(Tn4)。 每个级联级可以有利地还包括连接到充电和放电级的反相器级并且包括彼此电连接并由输入信号控制的两个晶体管(Tn1,Tn2)和存储电容器(Cn1),使得两个晶体管 (Tn1,Tn2)从不同时导通。
    • 6. 发明授权
    • Capacitive pressure sensors with high linearity by optimizing electrode
boundaries
    • 通过优化电极边界,具有高线性度的电容式压力传感器
    • US5792957A
    • 1998-08-11
    • US277182
    • 1994-07-19
    • Ernst LuderTraugott KallfassHubert BenzelJoerg Schaepperle
    • Ernst LuderTraugott KallfassHubert BenzelJoerg Schaepperle
    • G01L9/12G01L9/00
    • G01L9/0072G01L9/0075
    • In a first variant of this pressure sensor with a substrate and a diaphragm which are joined together parallel to each other in a defined spaced relationship, forming a chamber sealed at least at the edge, the chamber-side surface of the diaphragm is completely covered with a diaphragm electrode. The chamber-side surface of the substrate supports a reference electrode consisting of an outer portion, which extends along the edge of the chamber and whose capacitance is virtually pressure-independent, and a pressure-dependent central portion, which is located at the center of the substrate and is connected with the outer portion via a connecting portion. The remainder of the substrate surface is covered with a measuring electrode spaced from the reference electrode by a constant distance. In a second circular variant and in a third, rectangular variant, the reference electrode consists of an outer portion, which extends along the edge of the chamber and whose capacitance is virtually pressure-independent, and two pressure-dependent central portions, which are each located in one half of the substrate symmetrically with respect to the substrate center and are connected with the outer portion via one connecting portion each, and whose boundary curves are continuous and are optimized by an iterative method. In a third variant, the reference electrode differs from that of the second variant in that it is not centrosymmetrical, but symmetrical with respect to a substrate diameter.
    • 在具有基板和隔膜的压力传感器的第一变型中,它们以限定的间隔关系彼此平行地连接在一起,形成至少在边缘处密封的室,隔膜的室侧表面被完全覆盖 隔膜电极。 衬底的室侧表面支撑参考电极,该参考电极由外部部分组成,外部部分沿室的边缘延伸并且其电容几乎不受压力的影响,并且压力依赖中心部分位于 并且经由连接部与外部部分连接。 衬底表面的其余部分用与参考电极间隔一定距离的测量电极覆盖。 在第二圆形变型中,并且在第三个矩形变体中,参考电极由外部部分组成,外部部分沿着腔室的边缘延伸并且其电容实质上与压力无关,并且两个依赖于压力的中心部分 位于相对于基板中心对称的基板的一半中,并且经由一个连接部分与外部部分连接,并且其边界曲线是连续的并且通过迭代方法被优化。 在第三变型中,参考电极与第二变型的不同之处在于它不是中心对称的,而是相对于衬底直径对称。
    • 7. 发明授权
    • Process and apparatus for conversion of an N-bit digital data word into
an analog voltage value
    • 用于将N位数字数据字转换为模拟电压值的过程和装置
    • US5642117A
    • 1997-06-24
    • US523477
    • 1995-09-05
    • Ernst LuderStefan Kull
    • Ernst LuderStefan Kull
    • G09G3/20G09G3/36H03M1/82H03M1/50
    • G09G3/2011G09G3/3688H03M1/82G09G2310/0259G09G2310/027G09G2310/066
    • The process of converting a digital data word having N-bits into an analog voltage value includes decrementing or incrementing a counter word (B) having N-bits from a respective maximum or minimum value to form a series of decremented or incremented values, synchronizing the decrementing or incrementing of the counter word (B) to a time course of an analog reference voltage (U.sub.ramp) having a ramp-shaped time dependence, evaluating a logical connection function of the decremented or incremented values of the counter word (B) with a digital data word (A) to determine when one of the decremented or incremented values of the counter word (B) is equal to a complement of the digital data word (A) and setting an output analog voltage value (U.sub.column) equal to the analog reference voltage (U.sub.ramp) as soon as the decremented or incremented value of counter word (B) equal to the complement of data word (A) is reached.
    • 将具有N位的数字数据字转换为模拟电压值的处理包括从相应的最大值或最小值递减或递增具有N位的计数器字(B),以形成一系列递减或递增的值,使 将计数器字(B)递减或递增到具有斜坡形时间依赖性的模拟参考电压(Uramp)的时间过程,用计数器字(B)的递增或递增值的逻辑连接函数用 数字数据字(A),用于确定计数器字(B)的递增或递增值之一等于数字数据字(A)的补数,并设置等于模拟量的输出模拟电压值(Ucolumn) 一旦达到等于数据字(A)的补码的计数器字(B)的递增或递增值,则参考电压(Uramp)。