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    • 1. 发明授权
    • System and method for bi-phase modulation decoding
    • 双相调制解码的系统和方法
    • US08477879B2
    • 2013-07-02
    • US12832674
    • 2010-07-08
    • Eric Gregory OettingerMark David Hagen
    • Eric Gregory OettingerMark David Hagen
    • H04L25/03
    • H04L25/4904H04B5/0031H04B5/0037H04B5/0093H04L27/2338
    • One embodiment of the present invention includes a decoder system that decodes a bi-phase modulated signal to generate an output code. The system includes a first filter associated with a first logic state configured to generate a first dot product of a plurality of consecutive digital samples of the bi-phase modulated signal and a respective plurality of tap weights of the first filter. The system also includes a second filter associated with a second logic state configured to generate a second dot product of the plurality of consecutive digital samples of the bi-phase modulated signal with a respective plurality of tap weights of the second filter. The system further includes a comparator configured to compare the first and second dot products and to provide the output code as a bit having one of the first logic state and the second logic state based on the comparison.
    • 本发明的一个实施例包括对双相调制信号进行解码以产生输出码的解码器系统。 该系统包括与第一逻辑状态相关联的第一滤波器,其被配置为生成双相调制信号的多个连续数字样本的第一点积和第一滤波器的相应多个抽头权重。 该系统还包括与第二逻辑状态相关联的第二滤波器,其被配置为生成所述双相调制信号的所述多个连续数字样本的第二点积与所述第二滤波器的相应多个抽头权重。 该系统还包括比较器,其被配置为比较第一和第二点积,并且基于比较将输出代码提供为具有第一逻辑状态和第二逻辑状态之一的位。
    • 4. 发明申请
    • METHODS AND APPARATUS TO HANDLE A REFERENCE VOLTAGE CHANGE IN A DIGITAL POWER SUPPLY
    • 在数字电源中控制参考电压变化的方法和装置
    • US20080284388A1
    • 2008-11-20
    • US11967793
    • 2007-12-31
    • Eric Gregory OettingerMark David Hagen
    • Eric Gregory OettingerMark David Hagen
    • G05F1/10
    • H02M3/157H02M2001/0012H02M2001/0025H02M2001/007H02M2003/1586
    • An example disclosed method to handle a reference voltage change in a digital power supply includes receiving a first value associated with a first reference voltage having a first voltage magnitude at a digital signal processor of a digital power supply, comparing the first reference voltage to an output voltage of the digital power supply, controlling the digital power supply based on the comparison between the first reference voltage and the output voltage, receiving a second value associated with a second reference voltage having a second voltage magnitude, determining that the first voltage magnitude is different than the second voltage magnitude, in response to determining that the second voltage magnitude is different than the first voltage magnitude, determining a voltage profile, and controlling the digital power supply based on the voltage profile.
    • 用于处理数字电源中的参考电压变化的示例公开的方法包括:在数字电源的数字信号处理器处接收与具有第一电压幅度的第一参考电压相关联的第一值,将第一参考电压与输出 数字电源的电压,基于第一参考电压和输出电压之间的比较来控制数字电源,接收与具有第二电压幅度的第二参考电压相关联的第二值,确定第一电压幅度不同 响应于确定所述第二电压幅度不同于所述第一电压幅度,确定电压分布,以及基于所述电压分布来控制所述数字电源。
    • 6. 发明申请
    • SYSTEM AND METHOD FOR BI-PHASE MODULATION DECODING
    • 用于双相调制解码的系统和方法
    • US20110158329A1
    • 2011-06-30
    • US13044930
    • 2011-03-10
    • Eric Gregory OettingerMark David HagenMark David Heminger
    • Eric Gregory OettingerMark David HagenMark David Heminger
    • H04L27/22H04B3/54
    • H04L27/22H04B5/0037H04L27/2338H04L2027/003H04L2027/0046H04L2027/0069
    • One embodiment of the present invention includes a decoder system that decodes a bi-phase modulated signal. The system includes a buffer configured to store a first plurality of digital samples associated with a first bit of the bi-phase modulated signal and a second plurality of digital samples associated with a second bit of the bi-phase modulated signal. The first bit can immediately precede the second bit. The system also includes a first summer configured to add the first plurality of digital samples to generate a first sum and a second summer configured to add the second plurality of digital samples to generate a second sum. The system further includes a comparator configured to compare the first sum and the second sum to determine an edge-transition between the first bit and the second bit, and to determine a logic-state of the first bit based on the edge-transition.
    • 本发明的一个实施例包括对双相调制信号进行解码的解码器系统。 该系统包括被配置为存储与双相调制信号的第一比特相关联的第一多个数字样本和与该双相调制信号的第二比特相关联的第二多个数字样本的缓冲器。 第一位可以立即在第二位之前。 该系统还包括第一加法器,其被配置为添加第一多个数字样本以产生第一和,并且配置为添加第二多个数字样本以生成第二和。 该系统还包括比较器,其被配置为比较第一和和第二和以确定第一位和第二位之间的边沿转换,并且基于边沿转换来确定第一位的逻辑状态。