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    • 8. 发明授权
    • System and method for the aggregation of 10GBASE-R signals into pseudo 100GBASE-R signals
    • 将10GBASE-R信号聚合成伪100GBASE-R信号的系统和方法
    • US08761209B1
    • 2014-06-24
    • US13285562
    • 2011-10-31
    • Matthew BrownDimitrios Giannakopoulos
    • Matthew BrownDimitrios Giannakopoulos
    • H04J3/02H04L12/54H04L29/06
    • H04L12/413
    • An Ethernet physical layer (PHY) module is provided with a method for transceiving between a 10GBASE-R client interface and a 100G attachment interface. On each of ten client interface logical lanes a 10GBASE-R signal is accepted. Each 10GBASE-R logical lane is demultiplexed into two 5 gigabit per second (Gbps) pseudo 100GBASE-R logical lanes, creating a total of twenty pseudo 100GBASE-R logical lanes. The pseudo 100GBASE-R logical lanes are arranged into n groups of 20/n pseudo 100GBASE-R logical lanes. Further, the pseudo 100GBASE-R logical lanes from each group are arranged into a 100G attachment logical lane. Finally, a 100G attachment logical lane is transmitted at an attachment interface on each of n physical lanes. In the reverse direction, each of n physical lanes accepts a 100G attachment logical lane at the attachment interface, and a de-aggregation process supplies a 10GBASE-R signal on each of ten client interface logical lanes.
    • 以太网物理层(PHY)模块提供了一种用于在10GBASE-R客户端接口和100G附件接口之间进行收发的方法。 在10个客户端界面逻辑通道中的每一个上接受10GBASE-R信号。 每个10GBASE-R逻辑通道被解复用为两个5千兆位/秒(Gbps)伪100GBASE-R逻辑通道,共创建了20个伪100GBASE-R逻辑通道。 伪100GBASE-R逻辑通道被排列成n组20 / n个伪100GBASE-R逻辑通道。 此外,来自每组的伪100GBASE-R逻辑通道被排列成100G附件逻辑通道。 最后,在n个物理通道中的每一个上的附着接口上发送100G附件逻辑通道。 在相反的方向上,n个物理通道中的每一个在附接接口处接受100G的连接逻辑通道,并且去聚合处理在十个客户端接口逻辑通道中的每一个上提供10GBASE-R信号。