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1. 发明授权

US5213670A Method for manufacturing a polycrystalline layer on a substrate 失效
标题翻译：在基板上制造多晶层的方法
公开(公告)号：US5213670A
公开(公告)日：1993-05-25
申请号：US745957
申请日：1991-08-09
申请人： Emmerich Bertagnolli , Herbert Kabza
发明人： Emmerich Bertagnolli , Herbert Kabza
IPC分类号： C23C14/14 , C23C14/58 , C23C16/24 , C23C16/56 , H01L21/02 , H01L21/321
CPC分类号： C23C14/5806 , C23C14/14 , C23C14/58 , C23C14/584 , C23C16/24 , C23C16/56 , H01L21/321 , H01L28/20
摘要： A manufacturing method for polycrystalline silicon layers with a defined particle size and texture on a substrate provides for depositing of an amorphous silicon layer on the substrate. The substrate with the amorphous silicon layer is placed into a furnace at an initial temperature lower than the crystallization temperature of amorphous silicon. After an adjustment to thermal equilibrium, the furnace is heated in a controlled fashion from the initial temperature to a target temperature which is higher than the crystallization temperature, whereby the amorphous silicon layer is completely crystallized and becomes a polycrystalline layer. The method is particularly applicable in manufacturing polycrystalline silicon resistances for integrated circuits.
摘要翻译：在衬底上具有确定的粒度和纹理的多晶硅层的制造方法提供了在衬底上沉积非晶硅层。将具有非晶硅层的衬底置于比非晶硅的结晶温度低的初始温度下的炉中。在对热平衡进行调整之后，以从控制的方式将炉子从初始温度加热到高于结晶温度的目标温度，从而使非晶硅层完全结晶并变成多晶层。该方法特别适用于制造用于集成电路的多晶硅电阻。

2. 发明申请

US20130098292A1 Processing System 有权
公开(公告)号：US20130098292A1
公开(公告)日：2013-04-25
申请号：US13708936
申请日：2012-12-08
申请人： Emmerich Bertagnolli , Heinz Wanzenboeck , Wolfram Buehler , Camille Stebler , Ulrike Zeile , Alexander Rosenthal
发明人： Emmerich Bertagnolli , Heinz Wanzenboeck , Wolfram Buehler , Camille Stebler , Ulrike Zeile , Alexander Rosenthal
IPC分类号： C23C16/48
CPC分类号： H01J37/3178 , C23C16/486 , C23C16/487 , H01J37/16 , H01J37/20 , H01J37/261 , H01J37/30 , H01J37/3056 , H01J2237/188 , H01J2237/2002 , H01J2237/2602 , H01J2237/303 , H01J2237/31744
摘要： A processing system for processing an object (3) is provided, wherein the processing system is adapted, to focus a first energy beam, in particular an electron beam (11), and a second energy beam, in particular an ion beam (21), on a focusing region (29) in which a object (3) to be processed is arrangeable. A processing chamber wall (35) having two openings (38, 39) for traversal of both energy beams and a connector (37) for supplying process gas delimits a processing chamber (45) from a vacuum chamber (2) of the processing system. Processing the object by activating the process gas through one of the energy beams and inspecting the object via one of the energy beams is enabled for different orientations of the object relative to a propagation direction of one of the energy beams.

3. 发明申请

US20110079711A1 Particle beam microscopy system and method for operating the same 有权
标题翻译：粒子束显微镜系统及其操作方法
公开(公告)号：US20110079711A1
公开(公告)日：2011-04-07
申请号：US12804139
申请日：2010-07-13
申请人： Wolfram Buehler , Holger Doemer , Matthias Lang , Joerg Stodolka , Peter Roediger , Emmerich Bertagnolli , Heinz Wanzenboeck
发明人： Wolfram Buehler , Holger Doemer , Matthias Lang , Joerg Stodolka , Peter Roediger , Emmerich Bertagnolli , Heinz Wanzenboeck
IPC分类号： G01N23/00
CPC分类号： H01J37/30 , H01J37/28 , H01J37/3178 , H01J2237/0044 , H01J2237/006 , H01J2237/022 , H01J2237/3174
摘要： A particle beam system 1 for cleaning itself comprises an irradiation system to direct electromagnetic radiation onto the surfaces to be cleaned and a supply system 61 to supply a precursor gas to the interior of the vacuum chamber 11 of the particle beam system 1. The precursor gas is activated in a vicinity of the surfaces to be cleaned and is converted into a reaction gas which reacts with the contaminants present on the irradiated surfaces such that said contaminants may be pumped out then.
摘要翻译：用于清洁的粒子束系统1本身包括将电磁辐射引导到要清洁的表面上的照射系统和用于将前体气体供应到粒子束系统1的真空室11的内部的供应系统61.前体气体在待清洁表面附近被活化，并被转化成与存在于照射表面上的污染物反应的反应气体，从而可以将所述污染物抽出。

4. 发明申请

US20090152459A1 System and Method for Processing an Object 有权
标题翻译：用于处理对象的系统和方法
公开(公告)号：US20090152459A1
公开(公告)日：2009-06-18
申请号：US12268802
申请日：2008-11-11
申请人： Wolfram Buhler , Alexander Rosenthal , Emmerich Bertagnolli , Heinz Wanzenbock , Markus Fischer , Gottfried Hochleitner
发明人： Wolfram Buhler , Alexander Rosenthal , Emmerich Bertagnolli , Heinz Wanzenbock , Markus Fischer , Gottfried Hochleitner
IPC分类号： G01N23/00
CPC分类号： H01J37/3005 , G03F1/74 , G03F1/86 , H01J37/20 , H01J37/3056 , H01J2237/006 , H01J2237/202 , H01J2237/31744
摘要： A system and a method for processing and inspecting an object are provided, wherein the system comprises a particle beam column, an object holder and a gas supply apparatus. Thereby, the object holder is formed comprising a base, a first table displaceable relative to the base, a second table displaceable relative to the first table and a third table rotatable relative to the second table, wherein the cannula of the gas supply apparatus is fixed at the first table.
摘要翻译：提供了一种用于处理和检查物体的系统和方法，其中所述系统包括粒子束柱，物体保持器和气体供应装置。因此，物体保持器形成为包括基部，相对于基部可移动的第一台，相对于第一台可移动的第二台和可相对于第二台转动的第三台，其中气体供应装置的插管固定在第一张桌子

5. 发明申请

US20050101995A1 Arrangement for receiving electrical signals from living cells and for the selective transmission of electrical stimulation to living cells 审中-公开
标题翻译：用于从活细胞接收电信号并选择性地向活细胞传输电刺激的装置
公开(公告)号：US20050101995A1
公开(公告)日：2005-05-12
申请号：US10922449
申请日：2004-08-19
申请人： Emmerich Bertagnolli
发明人： Emmerich Bertagnolli
IPC分类号： A61N1/05 , A61N1/08 , A61N1/32 , A61N1/34 , G06N3/06 , A61N1/00
CPC分类号： G06N3/061 , A61N1/0551 , A61N1/08 , A61N1/32 , A61N1/36071
摘要： The invention involves an array to couple a live cell, in particular a nerve cell, with an electronic circuit to pick up directly or indirectly electrically active cell signals and/or to electronically stimulate the cell, with a passive electronic element (C1, R1), where one terminal is connected to a reference potential (M), and the other terminal is connected to a switched output of an electronic switch (T1) the input of which can be connected to a signal or voltage source (point B), where an electrically conducting contact element (1) can be brought into contact with the cell (2) and is connected between the output of the electric switch (point P) and the associated terminal of the passive electronic component (C1, R1).
摘要翻译：本发明涉及一种将活细胞，特别是神经细胞与电子电路耦合的阵列，以电子电路直接或间接地接触电活动的细胞信号和/或以电子方式刺激细胞，用无源电子元件（C 1，R 1），其中一个端子连接到参考电位（M），另一个端子连接到电子开关（T1）的开关输出，其输入端可以连接到信号或电压源（B点），其中导电接触元件（1）可以与电池（2）接触并且连接在电开关（点P）的输出端和无源电子部件（C 1，R 1）。

6. 发明授权

US06586795B2 DRAM cell configuration whose memory cells can have transistors and capacitors with improved electrical properties 失效
标题翻译：其存储单元可以具有晶体管和具有改善的电性能的电容器的DRAM单元配置
公开(公告)号：US06586795B2
公开(公告)日：2003-07-01
申请号：US09873659
申请日：2001-06-04
申请人： Bernd Goebel , Emmerich Bertagnolli
发明人： Bernd Goebel , Emmerich Bertagnolli
IPC分类号： H01L218242
CPC分类号： H01L27/10864 , H01L27/10841
摘要： Memory cells each include one transistor and one capacitor. A memory node of the capacitor is disposed in a first indentation, while a gate electrode of the transistor is disposed in a second indentation. An upper source/drain region, a channel region, and a lower source/drain region of the transistor are disposed above one another and each adjoin both a first flank of the first indentation and the second indentation. At least a portion of the first flank is provided with a capacitor dielectric, which in the region of the lower source/drain region has a recess, in which the memory node adjoins the lower source/drain region. The second indentation of a first one of the memory cells can adjoin the memory node that is disposed in the first indentation of a second one of the memory cells. The second indentations can be parts of word line trenches, which extend transversely to insulation trenches. Above the recess, an insulating structure is preferably disposed in the first indentation and adjoins two adjacent ones of the insulation trenches.
摘要翻译：每个存储单元包括一个晶体管和一个电容器。电容器的存储节点设置在第一压痕中，而晶体管的栅电极设置在第二压痕中。晶体管的上源极/漏极区域，沟道区域和下部源极/漏极区域彼此并排设置，并且每个与第一压痕的第一侧面和第二压痕相邻。第一侧面的至少一部分设置有电容器电介质，其在下源极/漏极区域的区域中具有凹槽，其中存储器节点邻接下部源极/漏极区域。存储器单元中的第一个存储单元的第二缩进可以与布置在第二个存储单元的第一个凹槽中的存储器节点相邻。第二个凹痕可以是横向延伸到绝缘沟槽的字线沟槽的部分。在凹部上方，绝缘结构优选设置在第一压痕中，并与两个绝缘沟槽相邻。

7. 发明授权

US5767001A Process for producing semiconductor components between which contact is made vertically 失效
标题翻译：用于制造在其之间进行触点的半导体部件的制造方法
公开(公告)号：US5767001A
公开(公告)日：1998-06-16
申请号：US545650
申请日：1995-11-03
申请人： Emmerich Bertagnolli , Helmut Klose
发明人： Emmerich Bertagnolli , Helmut Klose
IPC分类号： H01L21/768 , H01L23/48 , H01L25/065 , H01L27/00 , H01L27/06 , H01L21/283 , H01L21/302
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/481 , H01L25/50 , H01L27/0688 , H01L2225/06513 , H01L2225/06524 , H01L2225/06541 , H01L2924/0002
摘要： A process for producing components having a contact structure provides for vertical contact-making, in which, for the connection of a metal contact of a first component to a metal contact of a second component, the substrate is etched out, starting from the top, in a region provided for a vertical, conductive connection, this recess is filled with a metal so that said metal is connected to the surface of the metal contact, the rear side of the substrate is removed until the metal projects beyond the rear side, a metallization layer made of a metal having a low melting point, for example AuIn, is applied to the metal contact of the second component, the surface of the second component is provided with a planar layer, the two components are arranged vertically with respect to one another and a permanent contact is produced between the metal of the first component and the metallization layer of the second component by pressing one onto the other and heating.
摘要翻译： PCT No.PCT / DE94 / 00486 Sec。 371日期：1995年11月3日 102（e）1995年11月3日日期PCT 1994年5月2日PCT PCT。 WO94 / 25981 PCT公开日期1994年11月10日具有接触结构的部件的制造方法提供垂直接触，其中为了将第一部件的金属接触件与第二部件的金属接触件连接，蚀刻出基板，从顶部开始，在设置用于垂直导电连接的区域中，该凹部填充有金属，使得所述金属连接到金属接触件的表面，基板的后侧被移除，直到金属突出超出背面，由具有低熔点的金属（例如AuIn）制成的金属化层被施加到第二部件的金属接触件，第二部件的表面设置有平面层，两个部件被布置在第一部件的金属和第二部件的金属化层之间通过将其彼此挤压并加热而产生永久接触。

8. 发明授权

US5217909A Method for manufacturing a bipolar transistor 失效
标题翻译：制造双极晶体管的方法
公开(公告)号：US5217909A
公开(公告)日：1993-06-08
申请号：US712563
申请日：1991-06-10
申请人： Emmerich Bertagnolli
发明人： Emmerich Bertagnolli
IPC分类号： H01L29/73 , H01L21/285 , H01L21/331 , H01L21/60 , H01L29/732 , H01L29/737
CPC分类号： H01L21/76897 , H01L21/28525 , H01L29/66272 , Y10S148/01 , Y10S148/011
摘要： A method for manufacturing a bipolar transistor in which the base, emitter and collector terminals are produced from a single, planar layer of, for example, polysilicon, directly deposited onto a substrate. The planar layer is doped by a first conductivity type for the base terminal. After masking with an implantation mask, covering a region of the planar layer for the base terminal and defining regions of the planar layer for the emitter and collector terminals, the regions for the emitter and collector terminals are doped by an implantation of a second conductivity type, the second conductivity type being opposite the first conductivity type. After a self-aligned supplementation of the implantation mask, for example, with the assistance of a spacer technique, with which the regions of the planar layer for the emitter and collector terminals are also covered, the planar layer is structured by anisotropic etching by using the supplemented implantation mask as an etching mask.
摘要翻译：一种用于制造双极晶体管的方法，其中基极，发射极和集电极端子由直接沉积到衬底上的例如多晶硅的单个平面层产生。平面层由基极端子的第一导电类型掺杂。在用注入掩模掩蔽之后，覆盖用于基极端子的平面层的区域并限定用于发射极和集电极端子的平面层的区域，通过第二导电类型的注入来掺杂发射极和集电极端子的区域第二导电类型与第一导电类型相反。在注入掩模的自对准补充之后，例如，借助间隔技术，用于发射极和集电极端子的平面层的区域也被覆盖，平面层通过使用补充的植入掩模作为蚀刻掩模。

9. 发明授权

US5047823A Circuit structure having a lateral bipolar transistor and its method of manufacture 失效
标题翻译：具有横向双极晶体管的电路结构及其制造方法
公开(公告)号：US5047823A
公开(公告)日：1991-09-10
申请号：US509308
申请日：1990-04-16
申请人： Ludwig Treitinger , Emmerich Bertagnolli
发明人： Ludwig Treitinger , Emmerich Bertagnolli
IPC分类号： H01L21/331 , H01L29/73 , H01L29/735
CPC分类号： H01L29/7317 , H01L29/735
摘要： A circuit structure contains at least one bipolar transistor whose emitter is fashioned as a part of a doped silicon layer grown on a substrate. The doped silicon layer comprises a sidewall extending parallel to its surface normal, the sidewall being covered with a doped silicon structure in contact with the silicon substrate and forms the base of the bipolar transistor. The bipolar transistor comprises a self-aligned, effective emitter with a 50-500 nm.
摘要翻译：电路结构包含至少一个双极晶体管，其发射极被形成为在衬底上生长的掺杂硅层的一部分。掺杂硅层包括平行于其表面法线延伸的侧壁，该侧壁被与硅衬底接触的掺杂硅结构覆盖并形成双极晶体管的基极。双极晶体管包括具有50-500nm的自对准有效发射极。

10. 发明申请

US20120187291A1 Method of Depositing Protective Structures 审中-公开
标题翻译：沉积保护结构的方法
公开(公告)号：US20120187291A1
公开(公告)日：2012-07-26
申请号：US13428054
申请日：2012-03-23
申请人： Heinz Wanzenboeck , Wolfram Buehler , Holger Doemer , Carl Kuebler , Daniel Fischer , Gottfried Hochleitner , Emmerich Bertagnolli
发明人： Heinz Wanzenboeck , Wolfram Buehler , Holger Doemer , Carl Kuebler , Daniel Fischer , Gottfried Hochleitner , Emmerich Bertagnolli
IPC分类号： C23C16/50 , G21K5/00 , C23C16/02
CPC分类号： G01N1/28 , G01N1/286 , H01J37/26 , H01J37/261 , H01J37/3056 , H01J2237/31745 , H01J2237/31749
摘要： A process of preparing a lamella from a substrate includes manufacturing a protection strip on an edge portion of the lamella to be prepared from the substrate, and preparing the lamella, wherein the manufacturing the protection strip includes a first phase of activating a surface area portion of the substrate, and a second phase of electron beam assisted deposition of the protective strip on the activated surface area portion from the gas phase.
摘要翻译：从衬底制备薄片的方法包括在待从衬底制备的薄片的边缘部分上制造保护条，并制备薄片，其中制造保护条包括激活第一阶段的第一阶段衬底以及电子束辅助沉积在气相的活化表面积部分上的保护带的第二相。

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