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1. 发明授权

US07977248B2 Double patterning with single hard mask 有权
标题翻译：双重图案化与单个硬掩模
公开(公告)号：US07977248B2
公开(公告)日：2011-07-12
申请号：US12006204
申请日：2007-12-31
申请人： Elliot Tan , Michael K. Harper , James Jeong
发明人： Elliot Tan , Michael K. Harper , James Jeong
IPC分类号： H01L21/302
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/32139
摘要： In general, in one aspect, a method includes forming a hard mask on a semiconductor substrate. A first resist layer is patterned on the hard mask as a first plurality of lines separated by a first defined pitch. The hard mask is etched to a portion of formed thickness to create a first plurality of fins in alignment with the first plurality of lines and the first resist layer is removed. A second resist layer is patterned on the hard mask as a second plurality of lines separated by a second defined pitch. The second plurality of lines is patterned between the first plurality of lines. The hard mask is etched to the portion of the formed thickness to create a second plurality of fins in alignment with the second plurality of lines. The first plurality of hard mask fins and the second plurality of hard mask fins are interwoven and have same thickness.
摘要翻译：通常，一方面，一种方法包括在半导体衬底上形成硬掩模。第一抗蚀剂层在硬掩模上被图案化为由第一限定间距分开的第一多个线。将硬掩模蚀刻成成形厚度的一部分以产生与第一多条线对准的第一多个翅片，并且去除第一抗蚀剂层。第二抗蚀剂层在硬掩模上被图案化为由第二限定间距分开的第二多个线。在第一组多行之间构图第二组线。将硬掩模蚀刻到所形成的厚度的部分以形成与第二多条线对准的第二多个翅片。第一多个硬掩模翅片和第二多个硬掩模翅片交织并具有相同的厚度。

2. 发明申请

US20090170316A1 Double patterning with single hard mask 有权
标题翻译：双重图案化与单个硬掩模
公开(公告)号：US20090170316A1
公开(公告)日：2009-07-02
申请号：US12006204
申请日：2007-12-31
申请人： Elliot Tan , Michael K. Harper , James Jeong
发明人： Elliot Tan , Michael K. Harper , James Jeong
IPC分类号： H01L21/308
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/32139
摘要： In general, in one aspect, a method includes forming a hard mask on a semiconductor substrate. A first resist layer is patterned on the hard mask as a first plurality of lines separated by a first defined pitch. The hard mask is etched to a portion of formed thickness to create a first plurality of fins in alignment with the first plurality of lines and the first resist layer is removed. A second resist layer is patterned on the hard mask as a second plurality of lines separated by a second defined pitch. The second plurality of lines is patterned between the first plurality of lines. The hard mask is etched to the portion of the formed thickness to create a second plurality of fins in alignment with the second plurality of lines. The first plurality of hard mask fins and the second plurality of hard mask fins are interwoven and have same thickness.
摘要翻译：通常，一方面，一种方法包括在半导体衬底上形成硬掩模。第一抗蚀剂层在硬掩模上被图案化为由第一限定间距分开的第一多个线。将硬掩模蚀刻成成形厚度的一部分以产生与第一多条线对准的第一多个翅片，并且去除第一抗蚀剂层。第二抗蚀剂层在硬掩模上被图案化为由第二限定间距分开的第二多个线。在第一组多行之间构图第二组线。将硬掩模蚀刻到所形成的厚度的部分以形成与第二多条线对准的第二多个翅片。第一多个硬掩模翅片和第二多个硬掩模翅片交织并具有相同的厚度。

3. 发明授权

US08193641B2 Recessed workfunction metal in CMOS transistor gates 有权
标题翻译： CMOS晶体管栅极中嵌入的功函数金属
公开(公告)号：US08193641B2
公开(公告)日：2012-06-05
申请号：US11431388
申请日：2006-05-09
申请人： Willy Rachmady , Brian McIntyre , Michael K. Harper , Subhash M. Joshi
发明人： Willy Rachmady , Brian McIntyre , Michael K. Harper , Subhash M. Joshi
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L29/4966 , H01L21/28088 , H01L21/28194 , H01L29/517 , H01L29/66553
摘要： A transistor gate comprises a substrate having a pair of spacers disposed on a surface, a high-k dielectric conformally deposited on the substrate between the spacers, a recessed workfunction metal conformally deposited on the high-k dielectric and along a portion of the spacer sidewalls, a second workfunction metal conformally deposited on the recessed workfunction metal, and an electrode metal deposited on the second workfunction metal. The transistor gate may be formed by conformally depositing the high-k dielectric into a trench between the spacers on the substrate, conformally depositing a workfunction metal atop the high-k dielectric, depositing a sacrificial mask atop the workfunction metal, etching a portion of the sacrificial mask to expose a portion of the workfunction metal, and etching the exposed portion of the workfunction metal to form the recessed workfunction metal. The second workfunction metal and the electrode metal may be deposited atop the recessed workfunction metal.
摘要翻译：晶体管栅极包括具有设置在表面上的一对间隔物的衬底，在隔离体之间保形地沉积在衬底上的高k电介质，共形沉积在高k电介质上并沿着间隔壁侧壁的一部分的凹陷功函数金属保形地沉积在凹陷功函数金属上的第二功函件金属和沉积在第二功函数金属上的电极金属。晶体管栅极可以通过将高k电介质保形地沉积到衬底上的间隔物之间的沟槽中而形成，从而在高k电介质顶部上共形沉积功函数金属，在功函数金属顶部沉积牺牲掩模，蚀刻部分牺牲掩模以暴露所述功函数金属的一部分，以及蚀刻所述功函数金属的暴露部分以形成所述凹陷功函数金属。第二功函数金属和电极金属可沉积在凹陷功函数金属顶上。

4. 发明申请

US20120264285A1 RECESSED WORKFUNCTION METAL IN CMOS TRANSISTOR GATES 有权
标题翻译： CMOS晶体管栅中的工作功能金属
公开(公告)号：US20120264285A1
公开(公告)日：2012-10-18
申请号：US13479078
申请日：2012-05-23
申请人： Willy Rachmady , Brian Mclntyre , Michael K. Harper , Subhash M. Joshi
发明人： Willy Rachmady , Brian Mclntyre , Michael K. Harper , Subhash M. Joshi
IPC分类号： H01L21/283
CPC分类号： H01L29/4966 , H01L21/28088 , H01L21/28194 , H01L29/517 , H01L29/66553
摘要： A transistor gate comprises a substrate having a pair of spacers disposed on a surface, a high-k dielectric conformally deposited on the substrate between the spacers, a recessed workfunction metal conformally deposited on the high-k dielectric and along a portion of the spacer sidewalls, a second workfunction metal conformally deposited on the recessed workfunction metal, and an electrode metal deposited on the second workfunction metal. The transistor gate may be formed by conformally depositing the high-k dielectric into a trench between the spacers on the substrate, conformally depositing a workfunction metal atop the high-k dielectric, depositing a sacrificial mask atop the workfunction metal, etching a portion of the sacrificial mask to expose a portion of the workfunction metal, and etching the exposed portion of the workfunction metal to form the recessed workfunction metal. The second workfunction metal and the electrode metal may be deposited atop the recessed workfunction metal.
摘要翻译：晶体管栅极包括具有设置在表面上的一对间隔物的衬底，在隔离体之间保形地沉积在衬底上的高k电介质，共形沉积在高k电介质上并沿着间隔壁侧壁的一部分的凹陷功函数金属保形地沉积在凹陷功函数金属上的第二功函件金属和沉积在第二功函数金属上的电极金属。晶体管栅极可以通过将高k电介质保形地沉积到衬底上的间隔物之间的沟槽中而形成，从而在高k电介质顶部上共形沉积功函数金属，在功函数金属顶部沉积牺牲掩模，蚀刻部分牺牲掩模以暴露所述功函数金属的一部分，以及蚀刻所述功函数金属的暴露部分以形成所述凹陷功函数金属。第二功函数金属和电极金属可沉积在凹陷功函数金属顶上。

5. 发明申请

US20120164837A1 FEATURE SIZE REDUCTION 有权
标题翻译：特征尺寸减少
公开(公告)号：US20120164837A1
公开(公告)日：2012-06-28
申请号：US12978160
申请日：2010-12-23
申请人： Elliot N. Tan , Michael K. Harper
发明人： Elliot N. Tan , Michael K. Harper
IPC分类号： H01L21/31
CPC分类号： H01L21/0337 , H01L21/0338
摘要： Methods for semiconductor device fabrication are provided. Features are created using spacers. Methods include creating a pattern comprised of at least two first features on the substrate surface, depositing a first conformal layer on the at least two first features, depositing a second conformal layer on the first conformal layer, partially removing the second conformal layer to partially expose the first conformal layer, and partially removing the first conformal layer from between the first features and the second conformal layer thereby creating at least two second features. Optionally the first conformal film is partially etched back before the second conformal film is deposited.
摘要翻译：提供了半导体器件制造方法。使用间隔件创建特征。方法包括产生由衬底表面上的至少两个第一特征构成的图案，在所述至少两个第一特征上沉积第一共形层，在第一共形层上沉积第二共形层，部分地去除第二共形层以部分曝光第一共形层，并且从第一特征和第二共形层之间部分地去除第一共形层，从而形成至少两个第二特征。可选地，在第二保形膜沉积之前，第一保形膜被部分地回蚀。

6. 发明申请

US20100276756A1 SUBSTRATE FINS WITH DIFFERENT HEIGHTS 有权
标题翻译：带不同高度的基座
公开(公告)号：US20100276756A1
公开(公告)日：2010-11-04
申请号：US12837321
申请日：2010-07-15
申请人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
发明人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L21/76 , H01L21/76232 , H01L21/823431 , H01L29/66795 , H01L29/785
摘要： A device includes a number of fins. Some of the fins have greater heights than other fins. This allows the selection of different drive currents and/or transistor areas.
摘要翻译：一种装置包括多个翅片。一些翅片比其他翅片具有更高的高度。这允许选择不同的驱动电流和/或晶体管区域。

7. 发明授权

US08441074B2 Substrate fins with different heights 有权
公开(公告)号：US08441074B2
公开(公告)日：2013-05-14
申请号：US12837321
申请日：2010-07-15
申请人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
发明人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
IPC分类号： H01L29/66
CPC分类号： H01L21/76 , H01L21/76232 , H01L21/823431 , H01L29/66795 , H01L29/785
摘要： A device includes a number of fins. Some of the fins have greater heights than other fins. This allows the selection of different drive currents and/or transistor areas.

8. 发明授权

US08314034B2 Feature size reduction 有权
标题翻译：功能尺寸缩小
公开(公告)号：US08314034B2
公开(公告)日：2012-11-20
申请号：US12978160
申请日：2010-12-23
申请人： Elliot N. Tan , Michael K. Harper
发明人： Elliot N. Tan , Michael K. Harper
IPC分类号： H01L21/302
CPC分类号： H01L21/0337 , H01L21/0338
摘要： Methods for semiconductor device fabrication are provided. Features are created using spacers. Methods include creating a pattern comprised of at least two first features on the substrate surface, depositing a first conformal layer on the at least two first features, depositing a second conformal layer on the first conformal layer, partially removing the second conformal layer to partially expose the first conformal layer, and partially removing the first conformal layer from between the first features and the second conformal layer thereby creating at least two second features. Optionally the first conformal film is partially etched back before the second conformal film is deposited.
摘要翻译：提供了半导体器件制造方法。使用间隔件创建特征。方法包括产生由衬底表面上的至少两个第一特征构成的图案，在所述至少两个第一特征上沉积第一共形层，在第一共形层上沉积第二共形层，部分地去除第二共形层以部分曝光第一共形层，并且从第一特征和第二共形层之间部分地去除第一共形层，从而形成至少两个第二特征。可选地，在第二保形膜沉积之前，第一保形膜被部分地回蚀。

9. 发明授权

US08629039B2 Substrate fins with different heights 有权
标题翻译：不同高度的基片
公开(公告)号：US08629039B2
公开(公告)日：2014-01-14
申请号：US13875412
申请日：2013-05-02
申请人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
发明人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
IPC分类号： H01L21/76
CPC分类号： H01L21/76 , H01L21/76232 , H01L21/823431 , H01L29/66795 , H01L29/785
摘要： A device includes a number of fins. Some of the fins have greater heights than other fins. This allows the selection of different drive currents and/or transistor areas.
摘要翻译：一种装置包括多个翅片。一些翅片比其他翅片具有更高的高度。这允许选择不同的驱动电流和/或晶体管区域。

10. 发明申请

US20130273710A1 SUBSTRATE FINS WITH DIFFERENT HEIGHTS 有权
标题翻译：带不同高度的基座
公开(公告)号：US20130273710A1
公开(公告)日：2013-10-17
申请号：US13875412
申请日：2013-05-02
申请人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
发明人： Willy Rachmady , Justin S. Sandford , Michael K. Harper
IPC分类号： H01L21/76
CPC分类号： H01L21/76 , H01L21/76232 , H01L21/823431 , H01L29/66795 , H01L29/785
摘要： A device includes a number of fins. Some of the fins have greater heights than other fins. This allows the selection of different drive currents and/or transistor areas.
摘要翻译：一种装置包括多个翅片。一些翅片比其他翅片具有更高的高度。这允许选择不同的驱动电流和/或晶体管区域。

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