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    • 2. 发明授权
    • Silicon carbide semiconductor device
    • 碳化硅半导体器件
    • US06573534B1
    • 2003-06-03
    • US09265582
    • 1999-03-10
    • Rajesh KumarTsuyoshi YamamotoShoichi OndaMitsuhiro KataokaKunihiko HaraEiichi OkunoJun Kojima
    • Rajesh KumarTsuyoshi YamamotoShoichi OndaMitsuhiro KataokaKunihiko HaraEiichi OkunoJun Kojima
    • H01L310312
    • H01L29/7828H01L29/1095H01L29/1608H01L29/41766H01L29/4236H01L29/66068H01L29/7802H01L29/7838Y10S438/931
    • A semiconductor device, comprising: a semiconductor substrate comprising silicon carbide of a first conductivity type; a silicon carbide epitaxial layer of the first conductivity type; a first semiconductor region formed on the semiconductor substrate and comprising silicon carbide of a second conductivity type; a second semiconductor region formed on the first semiconductor region, comprising silicon carbide of the first conductivity type and separated from the semiconductor substrate of the first conductivity type by the first semiconductor region; a third semiconductor region formed on the semiconductor region, connected to the semiconductor substrate and the second semiconductor region, comprising silicon carbide of the first conductivity type, and of higher resistance than the semiconductor substrate; and a gate electrode formed on the third semiconductor region via an insulating layer; wherein the third semiconductor layer is depleted when no voltage is being applied to the gate electrode so that said semiconductor device has a normally OFF characteristic.
    • 一种半导体器件,包括:包含第一导电类型的碳化硅的半导体衬底; 第一导电类型的碳化硅外延层; 形成在所述半导体衬底上并且包括第二导电类型的碳化硅的第一半导体区域; 形成在所述第一半导体区域上的第二半导体区域,包括所述第一导电类型的碳化硅并且通过所述第一半导体区域与所述第一导电类型的半导体衬底分离; 形成在所述半导体区域上的第三半导体区域,与所述半导体衬底和所述第二半导体区域连接,所述第二半导体区域包括所述第一导电型的碳化硅,并且具有比所述半导体衬底更高的电阻; 以及经由绝缘层形成在所述第三半导体区域上的栅电极; 其中当没有电压施加到所述栅电极时,所述第三半导体层被耗尽,使得所述半导体器件具有正常OFF特性。
    • 5. 发明授权
    • Image processor
    • 图像处理器
    • US07646891B2
    • 2010-01-12
    • US10529202
    • 2002-12-26
    • Hiroshi KageKunihiko Hara
    • Hiroshi KageKunihiko Hara
    • G06K9/00G06K9/40G06K9/36H04N5/228H04N5/14H04N9/64
    • H04N5/23277G06T5/003G06T5/50G06T7/20G06T2207/20201H04N5/23248H04N5/23254
    • There is provided an image processor and a method thereof for high-speed compensation for taken-image blurs produced by camera shakes or the like. In the first instance, a motion-detecting area is selected for each of two images taken by an image sensor. When projective data is calculated by means of computing in a predetermined direction pixels of the motion-detecting areas, the motion vector between the two images can be acquired based on the projective data. The image correlativity between the two images is then calculated in the direction that the motion vector designates; and the amount of pixel displacement between the two images is calculated based on the correlativity values acquired by the calculation. Moreover, the area that has been produced by displacing an image output area in a camera-shake compensation area designated in the second frame, by the pixel-displacement amount calculated by a displacement calculator is cut away from the camera-shake compensation area, and is outputted as an image for the image output area of the second frame.
    • 提供了一种用于高速补偿由相机抖动等产生的拍摄图像模糊的图像处理器及其方法。 在第一种情况下,对由图像传感器拍摄的两幅图像中的每一幅图像选择运动检测区域。 当通过在预定方向上计算运动检测区域的像素来计算投影数据时,可以基于投影数据获取两个图像之间的运动矢量。 然后在运动矢量指定的方向上计算两个图像之间的图像相关性; 并且基于通过计算获得的相关性值来计算两个图像之间的像素位移量。 此外,通过将在第二帧中指定的相机抖动补偿区域中的图像输出区域移位由位移计算器计算出的像素位移量而产生的区域被切掉相机抖动补偿区域,并且 作为第二帧的图像输出区域的图像输出。
    • 8. 发明授权
    • Vertical type semiconductor device provided with an improved
construction to greatly decrease device on-resistance without impairing
breakdown
    • 垂直型半导体器件具有改进的结构,以大大降低器件导通电阻而不损害击穿
    • US5504360A
    • 1996-04-02
    • US293421
    • 1994-08-22
    • Norihito TokuraKunihiko Hara
    • Norihito TokuraKunihiko Hara
    • H01L29/06H01L29/08H01L29/78H01L29/76H01L29/94H01L31/062
    • H01L29/7813H01L29/7802H01L29/0653H01L29/0696H01L29/0847H01L29/41766
    • A vertical type semiconductor device is provided with an improved construction which greatly decreases the on-resistance without impairing the breakdown voltage thereof. In the fundamental DMOS cells that control a current to constitute the vertical semiconductor device, through-hole cells are arranged along the sides of a cell having a channel. The through-hole cell includes a through-hole extending from the surface of an n.sup.- -type drift region toward an n.sup.+ -type drain region, and also includes an n.sup.+ -type through-hole region that is formed by diffusing impurities from the inner wall of the through-hole which is continuous with the n.sup.+ -type drain region. A breakdown voltage of the element is maintained by the n.sup.- -type drift region between a p-type well region and the n.sup.+ -type through-hole region or the n.sup.+ -type drain region. Given the unique arrangement of the through-hole cells, the JFET resistance component becomes negligibly small between the DMOS cells neighboring along the sides of the cells despite the fact that the cells are finely formed, and a small on-resistance is exhibited.
    • 垂直型半导体器件具有改进的结构,其大大降低导通电阻而不损害其击穿电压。 在控制电流以构成垂直半导体器件的基本DMOS单元中,沿着具有沟道的单元的侧面布置有通孔单元。 通孔单元包括从n型漂移区域的表面向n +型漏极区域延伸的通孔,还包括通过从内部扩散杂质形成的n +型通孔区域 与n +型漏极区连续的通孔的壁。 元件的击穿电压由p型阱区域和n +型通孔区域或n +型漏极区域之间的n型漂移区域维持。 鉴于通孔单元的独特布置,尽管细胞形成细小,但是出现小的导通电阻,但是JFET电阻分量在沿着单元侧面相邻的DMOS单元之间变得可以忽略不计。
    • 9. 发明授权
    • Semiconductor strain sensor
    • 半导体应变传感器
    • US5329271A
    • 1994-07-12
    • US878429
    • 1992-05-04
    • Hajime InuzukaTsuyoshi NakagawaKunihiko Hara
    • Hajime InuzukaTsuyoshi NakagawaKunihiko Hara
    • G01L9/04G01L1/18G01L9/00G01P15/12H01L29/84G01L1/22
    • G01L1/18G01P15/123
    • A semiconductor strain sensor includes a silicon substrate, a strain resistive element and electrodes. The silicon substrate has a deformable portion which is deformed when stress is applied to it. The strain resistive element is formed on the deformable portion and has an at least a first layer and a second layer which form a heterojunction between them. The first layer is doped with impurities so that a two-dimensional carrier gas layer is formed in the second layer near the heterojunction. The two-dimensional carrier gas layer has carriers originating from the impurities. The electrodes electrically contact the two dimensional carrier gas layer. Change of resistance of the strain resistive element in accordance with the stress is detected through the electrodes.
    • 半导体应变传感器包括硅衬底,应变电阻元件和电极。 硅衬底具有可变形部分,当其施加应力时,可变形部分变形。 应变电阻元件形成在可变形部分上,并且具有在它们之间形成异质结的至少第一层和第二层。 第一层掺杂杂质,使得在异质结附近的第二层中形成二维载气层。 二维载气层具有源自杂质的载体。 电极与二维载气层电接触。 通过电极检测应变电阻元件根据应力的电阻变化。