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1. 发明授权

US06654870B1 Methods and apparatus for establishing port priority functions in a VLIW processor 有权
标题翻译：在VLIW处理器中建立端口优先功能的方法和装置
公开(公告)号：US06654870B1
公开(公告)日：2003-11-25
申请号：US09598084
申请日：2000-06-21
申请人： Edwin Frank Barry , Edward A. Wolff , Patrick Rene Marchand , David Carl Strube
发明人： Edwin Frank Barry , Edward A. Wolff , Patrick Rene Marchand , David Carl Strube
IPC分类号： G06F938
CPC分类号： G06F9/30141 , G06F9/30003 , G06F9/30036 , G06F9/30112 , G06F9/3013 , G06F9/3016 , G06F9/3838 , G06F9/3853 , G06F9/3885
摘要： Port priorities are defined on a 32-bit word, 16-bit half-word, and 8-bit byte basis to control the write enable signals to a compute register file (CRF). With a manifold array (ManArray) reconfigurable register file, it is possible to have double-word 64-bit and single word 32-bit data-type instructions mixed with other double-word, single-word, half-word, or byte data-type instructions within the same very long instruction word (VLIW). By resolving a write priority conflict on the byte, half-word, or word that is in conflict during the VLIW execution, it is possible to have partial operations complete that provide a useful function. For. example, a load half-word to the half-word H0 portion of a 32-bit register R0 can have priority to complete its operation while a 64-bit shift of the register pair R0 and R1 will complete its operation on the non-conflicting half-word portions of the 64-bit register R0 and R1. Other unique capabilities result from the present approach to assigning port priorities that improve the performance of the ManArray indirect VLIW processor.
摘要翻译：端口优先级定义在32位字，16位半字和8位字节的基础上，用于将写使能信号控制到计算寄存器文件（CRF）。使用歧管阵列（ManArray）可重配置寄存器文件，可以将双字64位和单字32位数据类型指令与其他双字，单字，半字或字节数据混合类型的指令在相同的很长的指令字（VLIW）内。通过在VLIW执行期间解决冲突的字节，半字或字的写入优先级冲突，可以使部分操作完成，从而提供有用的功能。对于。例如，到32位寄存器R0的半字H0部分的加载半字可以优先完成其操作，而寄存器对R0和R1的64位移位将完成其在非冲突的操作 64位寄存器R0和R1的半字部分。目前的分配端口优先级方法的其他独特功能来自于提高ManArray间接VLIW处理器的性能。

2. 发明授权

US07024540B2 Methods and apparatus for establishing port priority functions in a VLIW processor 失效
标题翻译：在VLIW处理器中建立端口优先功能的方法和装置
公开(公告)号：US07024540B2
公开(公告)日：2006-04-04
申请号：US10695071
申请日：2003-10-28
申请人： Edwin Frank Barry , Edward A. Wolff , Patrick Rene Marchand , David Carl Strube
发明人： Edwin Frank Barry , Edward A. Wolff , Patrick Rene Marchand , David Carl Strube
IPC分类号： G06F12/00
CPC分类号： G06F9/30141 , G06F9/30003 , G06F9/30036 , G06F9/30112 , G06F9/3013 , G06F9/3016 , G06F9/3838 , G06F9/3853 , G06F9/3885
摘要： Port priorities are defined on a 32-bit word, 16-bit half-word, and 8-bit byte basis to control the write enable signals to a compute register file (CRF). With a manifold array (ManArray) reconfigurable register file, it is possible to have double-word 64-bit and single word 32-bit data-type instructions mixed with other double-word, single-word, half-word, or byte data-type instructions within the same very long instruction word (VLIW). By resolving a write priority conflict on the byte, half-word, or word that is in conflict during the VLIW execution, it is possible to have partial operations complete that provide a useful function. For example, a load half-word to the half-word H0 portion of a 32-bit register R0 can have priority to complete its operation while a 64-bit shift of the register pair R0 and R1 will complete its operation on the non-conflicting half-word portions of the 64-bit register R0 and R1. Other unique capabilities result from the present approach to assigning port priorities that improve the performance of the ManArray indirect VLIW processor.
摘要翻译：端口优先级定义在32位字，16位半字和8位字节的基础上，用于将写使能信号控制到计算寄存器文件（CRF）。使用歧管阵列（ManArray）可重配置寄存器文件，可以将双字64位和单字32位数据类型指令与其他双字，单字，半字或字节数据混合类型的指令在相同的很长的指令字（VLIW）内。通过在VLIW执行期间解决冲突的字节，半字或字的写入优先级冲突，可以使部分操作完成，从而提供有用的功能。例如，对于32位寄存器R 0的半字H 0部分的加载半字可以优先完成其操作，而寄存器对R 0和R 1的64位移位将完成其操作在64位寄存器R 0和R 1的非冲突半字部分上。其他独特功能来自本方法分配端口优先级，以提高ManArray间接VLIW处理器的性能。

3. 发明申请

US20090063724A1 System core for transferring data between an external device and memory 有权
标题翻译：用于在外部设备和存储器之间传输数据的系统核心
公开(公告)号：US20090063724A1
公开(公告)日：2009-03-05
申请号：US11827548
申请日：2007-07-12
申请人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, JR. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
发明人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, JR. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
IPC分类号： G06F13/28
CPC分类号： G06F15/82 , G06F9/30145 , G06F11/263 , Y10S707/99943
摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.
摘要翻译：这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。可以很容易地映射参数化，并显着简化系统维护。

4. 发明申请

US20080133892A1 Methods and Apparatus for Initiating and Resynchronizing Multi-Cycle SIMD Instructions 失效
标题翻译：用于启动和重新同步多周期SIMD指令的方法和装置
公开(公告)号：US20080133892A1
公开(公告)日：2008-06-05
申请号：US11778303
申请日：2007-07-16
申请人： Gerald G. Pechanek , David Carl Strube , Edward A. Wolff , Edwin Frank Barry , Grayson Morris , Carl Donald Busboom , Dale Edward Schneider
发明人： Gerald G. Pechanek , David Carl Strube , Edward A. Wolff , Edwin Frank Barry , Grayson Morris , Carl Donald Busboom , Dale Edward Schneider
IPC分类号： G06F9/30
CPC分类号： G06F9/3885 , G06F9/30014 , G06F9/30032 , G06F9/30036 , G06F9/30065 , G06F9/30149 , G06F9/325 , G06F9/3836 , G06F9/3853 , G06F9/3857 , G06F9/3859 , G06F9/3887
摘要： Techniques for adding more complex instructions and their attendant multi-cycle execution units with a single instruction multiple data stream (SIMD) very long instruction word (VLIW) processing framework are described. In one aspect, an initiation mechanism also acts as a resynchronization mechanism to read the results of multi-cycle execution. This multi-purpose mechanism operates with a short instruction word (SIW) issue of the multi-cycle instruction, in a sequence processor (SP) alone, with a VLIW, and across all processing elements (PEs) individually or as an array of PEs. A number of advantageous floating point instructions are also described.
摘要翻译：描述了使用单指令多数据流（SIMD）非常长的指令字（VLIW）处理框架来添加更复杂指令的技术及其伴随的多周期执行单元。在一个方面，启动机制还充当重新同步机制以读取多周期执行的结果。该多用途机构以单循环指令的短指令字（SIW）问题，单独的序列处理器（SP），VLIW以及跨所有处理元件（PE）单独地或作为PE阵列来操作。还描述了许多有利的浮点指令。

5. 发明授权

US06748517B1 Constructing database representing manifold array architecture instruction set for use in support tool code creation 有权
标题翻译：构建表示用于支持工具代码创建的多支数组架构指令集的数据库
公开(公告)号：US06748517B1
公开(公告)日：2004-06-08
申请号：US09599980
申请日：2000-06-22
申请人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, Jr. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
发明人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, Jr. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
IPC分类号： G06F944
CPC分类号： G06F15/82 , G06F9/30145 , G06F11/263 , Y10S707/99943
摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized testcases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.
摘要翻译：这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。该方法的各个方面包括语法的规律性，可以以数据库形式表示指令集的相对容易程度，可以创建工具的准备就绪能力，自检代码的准备生成和参数化测试用例。可以很容易地映射参数化，并显着简化系统维护。

6. 发明授权

US07962667B2 System core for transferring data between an external device and memory 有权
标题翻译：用于在外部设备和存储器之间传输数据的系统核心
公开(公告)号：US07962667B2
公开(公告)日：2011-06-14
申请号：US11827548
申请日：2007-07-12
申请人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, Jr. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
发明人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, Jr. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
IPC分类号： G06F13/28 , G06F13/00
CPC分类号： G06F15/82 , G06F9/30145 , G06F11/263 , Y10S707/99943
摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.
摘要翻译：这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。可以很容易地映射参数化，并显着简化系统维护。

7. 发明申请

US20130007331A1 System Core for Transferring Data Between an External Device and Memory 失效
标题翻译：用于在外部设备和内存之间传输数据的系统核心
公开(公告)号：US20130007331A1
公开(公告)日：2013-01-03
申请号：US13611969
申请日：2012-09-12
申请人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, JR. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
发明人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, JR. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
IPC分类号： G06F13/36
CPC分类号： G06F15/82 , G06F9/30145 , G06F11/263 , Y10S707/99943
摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.
摘要翻译：这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。可以很容易地映射参数化，并显着简化系统维护。

8. 发明授权

US08117357B2 System core for transferring data between an external device and memory 失效
公开(公告)号：US08117357B2
公开(公告)日：2012-02-14
申请号：US13106042
申请日：2011-05-12
申请人： Gerald George Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, Jr. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
发明人： Gerald George Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, Jr. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
IPC分类号： G06F13/28 , G06F13/00
CPC分类号： G06F15/82 , G06F9/30145 , G06F11/263 , Y10S707/99943
摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

9. 发明申请

US20110219210A1 System Core for Transferring Data Between an External Device and Memory 失效
标题翻译：用于在外部设备和内存之间传输数据的系统核心
公开(公告)号：US20110219210A1
公开(公告)日：2011-09-08
申请号：US13106042
申请日：2011-05-12
申请人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, JR. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
发明人： Gerald G. Pechanek , David Carl Strube , Edwin Frank Barry , Charles W. Kurak, JR. , Carl Donald Busboom , Dale Edward Schneider , Nikos P. Pitsianis , Grayson Morris , Edward A. Wolff , Patrick R. Marchand , Ricardo E. Rodriguez , Marco C. Jacobs
IPC分类号： G06F9/312 , G06F9/30
CPC分类号： G06F15/82 , G06F9/30145 , G06F11/263 , Y10S707/99943
摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.
摘要翻译：这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。可以很容易地映射参数化，并显着简化系统维护。

10. 发明授权

US06622234B1 Methods and apparatus for initiating and resynchronizing multi-cycle SIMD instructions 有权
标题翻译：用于启动和重新同步多周期SIMD指令的方法和装置
公开(公告)号：US06622234B1
公开(公告)日：2003-09-16
申请号：US09598564
申请日：2000-06-21
申请人： Gerald G. Pechanek , David Carl Strube , Edward A. Wolff , Edwin Frank Barry , Grayson Morris , Carl Donald Busboom , Dale Edward Schneider
发明人： Gerald G. Pechanek , David Carl Strube , Edward A. Wolff , Edwin Frank Barry , Grayson Morris , Carl Donald Busboom , Dale Edward Schneider
IPC分类号： G06F938
CPC分类号： G06F9/3885 , G06F9/30014 , G06F9/30032 , G06F9/30036 , G06F9/30065 , G06F9/30149 , G06F9/325 , G06F9/3836 , G06F9/3853 , G06F9/3857 , G06F9/3859 , G06F9/3887
摘要： Techniques for adding more complex instructions and their attendant multi-cycle execution units with a single instruction multiple data, stream (SIMD) very long instruction word (VLIW) processing framework are described. In one aspect, an initiation mechanism also acts as a resynchronization mechanism to read the results of multi-cycle execution. This multi-purpose mechanism operates with a short instruction word (SIW) issue of the multi-cycle instruction, in a sequence processor (SP) alone, with a VLIW, and across all processing elements (PEs) individually or as an array of PEs. A number of advantageous floating point instructions are also described.
摘要翻译：描述了使用单个指令多个数据流（SIMD）非常长的指令字（VLIW）处理框架来添加更复杂的指令及其伴随的多周期执行单元的技术。在一个方面，启动机制还充当重新同步机制以读取多周期执行的结果。该多用途机构以单循环指令的短指令字（SIW）问题，单独的序列处理器（SP），VLIW以及跨所有处理元件（PE）单独地或作为PE阵列来操作。还描述了许多有利的浮点指令。

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