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1. 发明授权

US4800421A Glass bonding means and method 失效
标题翻译：玻璃粘合手段和方法
公开(公告)号：US4800421A
公开(公告)日：1989-01-24
申请号：US822571
申请日：1986-01-27
申请人： Earl K. Davis , James E. Drye , David J. Reed
发明人： Earl K. Davis , James E. Drye , David J. Reed
IPC分类号： C03C8/24 , C04B37/02 , H01L21/58 , H01L23/10 , H01L23/15 , H01L39/02
CPC分类号： H01L24/32 , C03C8/24 , C03C8/245 , C04B37/025 , H01L23/10 , H01L23/15 , H01L24/83 , C04B2237/10 , C04B2237/343 , C04B2237/402 , C04B2237/708 , C04B2237/84 , C04B2237/86 , H01L2224/2919 , H01L2224/32225 , H01L2224/8319 , H01L2224/8385 , H01L2224/8389 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15787 , H01L2924/19043 , H01L2924/3011
摘要： An improved semiconductor die bonding structure and method for electrical devices is described which utilizes a ductile foil between the semiconductor die and the base of the device package. The die is sealed to the foil with a die bonding material formed from a titania free base glass to which has been added 23.6 to 36.4 weight percent lead titanate powder to give a glass plus ceramic mixture consisting essentially of (by weight percent) 2.5-10.7% GeO.sub.2, 0-2.3% SiO.sub.2, 58.6-78.5% PbO, 0-5.3% PbF.sub.2, 7-13% B.sub.2 O.sub.3, 2.5-6.9% Al.sub.2 O.sub.3, 0-5.3% ZnO, 0.4-2.3% V.sub.2 O.sub.5, 0-5.3% CdO, and 6.2-9.6% TiO.sub.2. The ductile foil is bonded to the ceramic package base directly without intermediate layers or alternatively by means of an improved foil bonding glass material consisting essentially of (by weight percent) 10-15% SiO.sub.2, 45-55% PbO, 8-12% ZnO, 2-5% Al.sub.2 O.sub.3, and 25-30% B.sub.2 O.sub.3.
摘要翻译：描述了一种用于电气设备的改进的半导体管芯接合结构和方法，其利用半导体管芯和器件封装的基极之间的延性箔。模具通过由二氧化钛游离基础玻璃形成的管芯接合材料密封到其上，向其中加入23.6至36.4重量％的钛酸铅粉末，得到基本上由（重量百分比）2.5-10.7组成的玻璃加陶瓷混合物％GeO 2，0-2.3％SiO 2，58.6-78.5％PbO，0-5.3％PbF 2，7-13％B 2 O 3，2.5-6.9％Al 2 O 3，0-5.3％ZnO，0.4-2.3％V 2 O 5，0-5.3％CdO ，和6.2-9.6％的TiO2。延展性箔片直接连接到陶瓷封装基材上，无中间层，或者通过改进的箔结合玻璃材料，基本上由（重量百分比）10-15％的SiO2，45-55％的PbO，8-12％的ZnO ，2-5％Al2O3和25-30％B2O3。

2. 发明授权

US4515898A Glass bonding means and method 失效
标题翻译：玻璃粘合手段和方法
公开(公告)号：US4515898A
公开(公告)日：1985-05-07
申请号：US614573
申请日：1984-05-25
申请人： Earl K. Davis , James E. Drye , David J. Reed
发明人： Earl K. Davis , James E. Drye , David J. Reed
IPC分类号： C03C8/24 , C04B37/02 , H01L21/58 , H01L23/10 , H01L23/15 , C03C3/10 , C03C3/12
CPC分类号： H01L24/83 , C03C8/24 , C03C8/245 , C04B37/025 , H01L23/10 , H01L23/15 , H01L24/28 , H01L24/32 , C04B2237/10 , C04B2237/343 , C04B2237/402 , C04B2237/708 , C04B2237/84 , C04B2237/86 , H01L2224/2919 , H01L2224/8319 , H01L2224/8385 , H01L2224/8389 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15787 , H01L2924/19043 , H01L2924/3011
摘要： An improved semiconductor die bonding structure and method for electrical devices is described which utilizes a ductile foil between the semiconductor die and the base of the device package. The die is sealed to the foil with a die bonding material formed from a titania free base glass to which has been added 23.6 to 36.4 weight percent lead titanate powder to give a glass plus ceramic mixture consisting essentially of (by weight percent) 2.5-10.7% GeO.sub.2, 0-2.3% SiO.sub.2, 58.6-78.5% PbO, 0-5.3% PbF.sub.2, 7-13% B.sub.2 O.sub.3, 2.5-6.9% Al.sub.2 O.sub.3, 0-5.3% ZnO, 0.4-2.3% V.sub.2 O.sub.5, 0-5.3% CdO, and 6.2-9.6% TiO.sub.2. The ductile foil is bonded to the ceramic package base directly without intermediate layers or alternatively by means of an improved foil bonding glass material consisting essentially of (by weight percent) 10-15% SiO.sub.2, 45-55% PbO, 8-12% ZnO, 2-5% Al.sub.2 O.sub.3, and 25-30% B.sub.2 O.sub.3.
摘要翻译：描述了一种用于电气设备的改进的半导体管芯接合结构和方法，其利用半导体管芯和器件封装的基极之间的延性箔。模具通过由二氧化钛游离基础玻璃形成的管芯接合材料密封到其上，向其中加入23.6至36.4重量％的钛酸铅粉末，得到基本上由（重量百分比）2.5-10.7组成的玻璃加陶瓷混合物％GeO 2，0-2.3％SiO 2，58.6-78.5％PbO，0-5.3％PbF 2，7-13％B 2 O 3，2.5-6.9％Al 2 O 3，0-5.3％ZnO，0.4-2.3％V 2 O 5，0-5.3％CdO ，和6.2-9.6％的TiO2。延展性箔片直接连接到陶瓷封装基材上，无中间层，或者通过改进的箔结合玻璃材料，基本上由（重量百分比）10-15％的SiO2，45-55％的PbO，8-12％的ZnO ，2-5％Al2O3和25-30％B2O3。

3. 发明授权

US4592794A Glass bonding method 失效
标题翻译：玻璃粘合法
公开(公告)号：US4592794A
公开(公告)日：1986-06-03
申请号：US696219
申请日：1985-01-29
申请人： Earl K. Davis , James E. Drye , David J. Reed
发明人： Earl K. Davis , James E. Drye , David J. Reed
IPC分类号： C03C8/24 , C04B37/02 , H01L21/58 , H01L23/10 , H01L23/15 , B32B31/06 , B32B31/20
CPC分类号： H01L24/83 , C03C8/24 , C03C8/245 , C04B37/025 , H01L23/10 , H01L23/15 , H01L24/28 , H01L24/32 , C04B2237/10 , C04B2237/343 , C04B2237/402 , C04B2237/708 , C04B2237/84 , C04B2237/86 , H01L2224/2919 , H01L2224/8319 , H01L2224/8385 , H01L2224/8389 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15173 , H01L2924/15787 , H01L2924/19043 , H01L2924/3011
摘要： An improved semiconductor die bonding structure and method for electrical devices is described which utilizes a ductile foil between the semiconductor die and the base of the device package. The die is sealed to the foil with a die bonding material formed from a titania free base glass to which has been added 23.6 to 36.4 weight percent lead titanate powder to give a glass plus ceramic mixture consisting essentially of (by weight percent) 2.5-10.7% GeO.sub.2, 0-2.3% SiO.sub.2, 58.6-78.5% PbO, 0-5.3% PbF.sub.2, 7-13% B.sub.2 O.sub.3, 2.5-6.9% Al.sub.2 O.sub.3, 0-5.3% ZnO, 0.4-2.3% V.sub.2 O.sub.5, 0-5.3% CdO, and 6.2-9.6% TiO.sub.2. The ductile foil is bonded to the ceramic package base directly without intermediate layers or alternatively by means of an improved foil bonding glass material consisting essentially of (by weight percent) 10-15% SiO.sub.2, 45-55% PbO, 8-12% ZnO, 2-5% Al.sub.2 O.sub.3, and 25-30% B.sub.2 O.sub.3.
摘要翻译：描述了一种用于电气设备的改进的半导体管芯接合结构和方法，其利用半导体管芯和器件封装的基极之间的延性箔。模具通过由二氧化钛游离基础玻璃形成的管芯接合材料密封到其上，向其中加入23.6至36.4重量％的钛酸铅粉末，得到基本上由（重量百分比）2.5-10.7组成的玻璃加陶瓷混合物％GeO 2，0-2.3％SiO 2，58.6-78.5％PbO，0-5.3％PbF 2，7-13％B 2 O 3，2.5-6.9％Al 2 O 3，0-5.3％ZnO，0.4-2.3％V 2 O 5，0-5.3％CdO ，和6.2-9.6％的TiO2。延展性箔片直接连接到陶瓷封装基材上，无中间层，或者通过改进的箔结合玻璃材料，基本上由（重量百分比）10-15％的SiO2，45-55％的PbO，8-12％的ZnO ，2-5％Al2O3和25-30％B2O3。

4. 发明授权

US5164885A Electronic package having a non-oxide ceramic bonded to metal and method for making 失效
标题翻译：具有与金属结合的非氧化物陶瓷的电子封装及其制造方法
公开(公告)号：US5164885A
公开(公告)日：1992-11-17
申请号：US795441
申请日：1991-11-21
申请人： James E. Drye , David J. Reed , Vern H. Winchell, II
发明人： James E. Drye , David J. Reed , Vern H. Winchell, II
IPC分类号： H01L23/15 , H01L23/367 , H01L23/495
CPC分类号： H01L23/15 , H01L23/367 , H01L23/49541 , H01L24/49 , H01L2224/48091 , H01L2224/49 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/30105 , Y10T29/49002 , Y10T29/49144
摘要： A non-oxide ceramic (16) for electronic packages and a method of producing electronic packages using a non-oxide ceramic is provided. In accordance with the present invention, the non-oxide ceramic (16) is coated with silicon dioxide (15) and a bonding glass (14) having diboron trioxide is used to attach other package components such as semiconductor chips (18), leadframes (13), and heatsinks (11) to the non-oxide ceramic (16).
摘要翻译：提供一种用于电子封装的非氧化物陶瓷（16）和使用非氧化物陶瓷生产电子封装的方法。根据本发明，非氧化物陶瓷（16）涂覆有二氧化硅（15），并且使用具有三氧化二硼的粘合玻璃（14）来附接其它封装部件，例如半导体芯片（18），引线框架 13）和散热器（11）到非氧化物陶瓷（16）。

5. 发明申请

US20090243629A1 METHOD AND APPARATUS FOR MINI MODULE EMI SHIELDING EVALUATION 有权
标题翻译：用于微型模块EMI屏蔽评估的方法和装置
公开(公告)号：US20090243629A1
公开(公告)日：2009-10-01
申请号：US12059012
申请日：2008-03-31
申请人： Jinbang Tang , James E. Drye , Scott M. Hayes
发明人： Jinbang Tang , James E. Drye , Scott M. Hayes
IPC分类号： G01R27/28
CPC分类号： G01R29/0878 , G01R31/002
摘要： A method for mini module EMI shielding effectiveness evaluation comprises providing a test vehicle including at least one test platform. The test platform includes at least one mini emitter, a mini receiver with a reference shield, and a mini receiver with a shield under test. EMI shielding effectiveness transmission signals are applied to the at least one mini emitter. Signals received by the mini receiver with a shield under test and the mini receiver with the reference shield are evaluated. The mini emitter, mini receiver with the reference shield, and mini receiver with the shield under test comprise components fabricated concurrently and under fabrication conditions used for fabrication of the test platform of the test vehicle. As used herein, a mini emitter and mini receiver may be interchanged according to the requirements of a given EMI shielding effectiveness evaluation.
摘要翻译：一种用于迷你模块EMI屏蔽效能评估的方法包括提供包括至少一个测试平台的测试车辆。测试平台包括至少一个迷你发射器，具有参考屏蔽的迷你接收器和具有被测屏蔽的迷你接收器。 EMI屏蔽效能传输信号被施加到至少一个迷你发射器。由具有被测屏蔽的迷你接收器接收的信号和具有参考屏蔽的迷你接收机进行评估。具有参考屏蔽的迷你发射器，迷你接收器和被测屏蔽的迷你接收器包括同时制造并用于制造测试车辆测试平台的制造条件下的部件。如本文所使用的，迷你发射器和迷你接收器可以根据给定EMI屏蔽效能评估的要求而互换。

6. 发明授权

US07969164B2 Method and apparatus for mini module EMI shielding evaluation 有权
标题翻译：小型模块EMI屏蔽评估方法和装置
公开(公告)号：US07969164B2
公开(公告)日：2011-06-28
申请号：US12059012
申请日：2008-03-31
申请人： Jinbang Tang , James E. Drye , Scott M. Hayes
发明人： Jinbang Tang , James E. Drye , Scott M. Hayes
IPC分类号： G01R27/28
CPC分类号： G01R29/0878 , G01R31/002
摘要： A method for mini module EMI shielding effectiveness evaluation comprises providing a test vehicle including at least one test platform. The test platform includes at least one mini emitter, a mini receiver with a reference shield, and a mini receiver with a shield under test. EMI shielding effectiveness transmission signals are applied to the at least one mini emitter. Signals received by the mini receiver with a shield under test and the mini receiver with the reference shield are evaluated. The mini emitter, mini receiver with the reference shield, and mini receiver with the shield under test comprise components fabricated concurrently and under fabrication conditions used for fabrication of the test platform of the test vehicle. As used herein, a mini emitter and mini receiver may be interchanged according to the requirements of a given EMI shielding effectiveness evaluation.
摘要翻译：一种用于迷你模块EMI屏蔽效能评估的方法包括提供包括至少一个测试平台的测试车辆。测试平台包括至少一个迷你发射器，具有参考屏蔽的迷你接收器和具有被测屏蔽的迷你接收器。 EMI屏蔽效能传输信号被施加到至少一个迷你发射器。由具有被测屏蔽的迷你接收器接收的信号和具有参考屏蔽的迷你接收机进行评估。具有参考屏蔽的迷你发射器，迷你接收器和被测屏蔽的迷你接收器包括同时制造的用于制造测试车辆测试平台的制造条件下的部件。如本文所使用的，迷你发射器和迷你接收器可以根据给定EMI屏蔽效能评估的要求而互换。

7. 发明授权

US06906406B2 Multiple dice package 失效
标题翻译：多骰包
公开(公告)号：US06906406B2
公开(公告)日：2005-06-14
申请号：US10324533
申请日：2002-12-19
申请人： Lih-Tyng Hwang , James E. Drye , Shun Meen Kuo
发明人： Lih-Tyng Hwang , James E. Drye , Shun Meen Kuo
IPC分类号： H01L23/057 , H01L23/538 , H01L25/065 , H01L21/44
CPC分类号： H01L23/5386 , H01L23/057 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L2224/05554 , H01L2224/05599 , H01L2224/45099 , H01L2224/48137 , H01L2224/49171 , H01L2224/854 , H01L2924/00014 , H01L2924/01019 , H01L2924/09701 , H01L2924/14 , H01L2924/3011 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device for multiple dice is provided that reduces insertion loss and return loss. In an example embodiment, the semiconductor device comprises: a package 20 comprising a mount surface 14 to which dice 61 and 65 are mounted, and a bond pad surface 25 defining at least a first die area 27 and a second die area 29, wherein the second die area 29 is different in form from the first die area 27.
摘要翻译：提供了一种用于多个骰子的半导体器件，其减少了插入损耗和回波损耗。在一个示例性实施例中，半导体器件包括：封装件20，其包括安装表面14，芯片61和65被安装到该安装表面14以及限定至少第一管芯区域27和第二管芯区域29的接合焊盘表面25，第二管芯区域29的形状与第一管芯区域27不同。

8. 发明授权

US4722914A Method of making a high density IC module assembly 失效
标题翻译：制造高密度IC模块组件的方法
公开(公告)号：US4722914A
公开(公告)日：1988-02-02
申请号：US896356
申请日：1986-08-13
申请人： James E. Drye , Jack A. Schroeder , Vern H. Winchell, II
发明人： James E. Drye , Jack A. Schroeder , Vern H. Winchell, II
IPC分类号： H01L23/053 , H01L23/14 , H01L23/538 , H01L29/06 , H01L21/56 , H01L23/30
CPC分类号： H01L23/147 , H01L23/053 , H01L23/538 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L29/0657 , H01L2924/01079 , H01L2924/10158 , H01L2924/10253 , H01L2924/14 , H01L2924/3011 , Y10T29/4913 , Y10T29/53178
摘要： An electronic module having a high density of silicon IC chips is provided by mounting the chips in tapered through-holes in a silicon substrate, filling the edge gaps between the chips and the substrate with a glass so that the chips, the filler glass, and the substrate have a smooth upper surface adapted to receive monolithic interconnections formed by planar metalization methods. The resulting assembly is enclosed in a housing also formed substantially from silicon, which contains electrically isolated pins for contacting the input-output electrodes of the assembly. Preferential etching is used to form the through-holes in the substrate as well as various alignment means on the substrate and other parts of the housing so that they are self-aligning during assembly. Improved performance, reliability, and low cost is obtained.
摘要翻译：通过将芯片安装在硅基板中的锥形通孔中来提供具有高密度硅IC芯片的电子模块，用玻璃填充芯片和基板之间的边缘间隙，使得芯片，填充玻璃和衬底具有适于接收由平面金属化方法形成的单片互连的平滑上表面。所得到的组件封装在基本上由硅形成的壳体中，该壳体包含用于接触组件的输入 - 输出电极的电隔离的销。使用优先蚀刻在基板中形成通孔以及在基板和壳体的其它部分上的各种对准装置，使得它们在组装期间自对准。获得了改进的性能，可靠性和低成本。

9. 发明授权

US4630096A High density IC module assembly 失效
标题翻译：高密度IC模块组装
公开(公告)号：US4630096A
公开(公告)日：1986-12-16
申请号：US615499
申请日：1984-05-30
申请人： James E. Drye , Jack A. Schroeder , Vern H. Winchell, II
发明人： James E. Drye , Jack A. Schroeder , Vern H. Winchell, II
IPC分类号： H05K3/30 , H01L23/053 , H01L23/14 , H01L23/538 , H01L25/04 , H01L25/18 , H01L29/06 , H01L23/12 , H01L23/18 , H01L23/40
CPC分类号： H01L23/053 , H01L23/147 , H01L23/538 , H01L24/24 , H01L2224/24137 , H01L2224/24227 , H01L2224/48091 , H01L2224/48472 , H01L2224/73265 , H01L24/48 , H01L29/0657 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10158 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15312 , H01L2924/18162 , H01L2924/19041 , H01L2924/3011 , H01L2924/351
摘要： An electronic module having a high density of silicon IC chips is provided by mounting the chips in tapered through-holes in a silicon substrate, filling the edge gaps between the chips and the substrate with a glass so that the chips, the filler glass, and the substrate have a smooth upper surface adapted to receive monolithic interconnections formed by planar metallization methods. The resulting assembly is enclosed in a housing also formed substantially from silicon, which contains electrically isolated pins for contacting the input-output electrodes of the assembly. Preferential etching is used to form the through-holes in the substrate as well as various alignment means on the substrate and other parts of the housing so that they are self-aligning during assembly. Improved performance, reliability, and low cost is obtained.
摘要翻译：通过将芯片安装在硅基板中的锥形通孔中来提供具有高密度硅IC芯片的电子模块，用玻璃填充芯片和基板之间的边缘间隙，使得芯片，填充玻璃和衬底具有适于接收由平面金属化方法形成的单片互连的平滑上表面。所得到的组件封装在基本上由硅形成的壳体中，该壳体包含用于接触组件的输入 - 输出电极的电隔离的销。使用优先蚀刻在基板中形成通孔以及在基板和壳体的其它部分上的各种对准装置，使得它们在组装期间自对准。获得了改进的性能，可靠性和低成本。

10. 发明授权

US5198963A Multiple integrated circuit module which simplifies handling and testing 失效
标题翻译：多集成电路模块，简化了处理和测试
公开(公告)号：US5198963A
公开(公告)日：1993-03-30
申请号：US795440
申请日：1991-11-21
申请人： Debabrata Gupta , James E. Drye
发明人： Debabrata Gupta , James E. Drye
IPC分类号： G01R31/28 , H01L21/66 , H01L23/538 , H01L25/065
CPC分类号： G01R31/2863 , G01R31/2886 , H01L22/20 , H01L23/5385 , H01L25/0655 , H01L2224/16 , H01L2224/24227 , H01L2924/01014 , H01L2924/014 , H01L2924/15192
摘要： A multi-chip module (26) used to interconnect and house a plurality of integrated circuits (10). The module (26) employs an intermediate structure referred to, herein, as a bridge chip (12). The bridge chip (12) connects the integrated circuit (10) to the module substrate (19). The integrated circuit (10) is attached to the bridge chip (12) and forms a composite structure (18) which can be burned-in and tested as an individual unit. The bridge chip (12) has interconnects to bring out the inputs and outputs of the integrated circuit (10). The composite structure (18) is mounted to the module substrate (19) such that, the integrated circuit (10) has a thermal pathway to the module substrate (19), and the bridge chip (12) connects to the module substrate (19). The module substrate (19) has interconnects to connect the plurality of composite structures (18).
摘要翻译：用于互连和容纳多个集成电路（10）的多芯片模块（26）。模块（26）采用这里称为桥芯片（12）的中间结构。桥芯片（12）将集成电路（10）连接到模块基板（19）。集成电路（10）附接到桥芯片（12）并形成可以作为单独单元进行燃烧和测试的复合结构（18）。桥芯片（12）具有互连以便输出集成电路（10）的输入和输出。复合结构（18）安装到模块基板（19），使得集成电路（10）具有到模块基板（19）的热通路，桥接芯片（12）连接到模块基板（19））。模块基板（19）具有互连以连接多个复合结构（18）。

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