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    • 5. 发明授权
    • Germanium phototransistor with floating body
    • 具有浮体的锗光电晶体管
    • US07675056B2
    • 2010-03-09
    • US11891574
    • 2007-08-10
    • Jong-Jan LeeSheng Teng HsuJer-Shen MaaDouglas J. Tweet
    • Jong-Jan LeeSheng Teng HsuJer-Shen MaaDouglas J. Tweet
    • H01L29/06H01L31/072H01L31/109H01L31/0328H01L31/062H01L31/113H01L31/0232
    • H01L31/1136H01L31/028H01L31/1808Y02E10/547
    • A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.
    • 提出了一种浮体锗(Ge)光电晶体管及其制造工艺。 该方法包括:提供硅(Si)衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延(LPE)工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质,栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge,并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括:形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge,将外延生长前沿从下面的Si衬底表面横向传播到Ge中。
    • 6. 发明申请
    • Gallium nitride-on-silicon interface
    • 氮化镓在硅界面
    • US20080280426A1
    • 2008-11-13
    • US11801210
    • 2007-05-09
    • Tingkai LiDouglas J. TweetJer-Shen MaaSheng Teng Hsu
    • Tingkai LiDouglas J. TweetJer-Shen MaaSheng Teng Hsu
    • H01L29/739H01L21/20
    • C30B29/406C30B25/183H01L21/02381H01L21/02458H01L21/02505H01L21/0254H01L21/02642H01L21/02647H01L29/2003H01L29/267
    • A method is provided for forming a matching thermal expansion interface between silicon (Si) and gallium nitride (GaN) films. The method provides a (111) Si substrate and forms a first aluminum (Al)-containing film in compression overlying the Si substrate. Nano-column holes are formed in the first Al-containing film, which exposes regions of the underlying Si substrate. A layer of GaN layer is selectively grown from the exposed regions, covering the first Al-containing film. The GaN is grown using a lateral nanoheteroepitaxy overgrowth (LNEO) process. The above-mentioned processes are reiterated, forming a second Al-containing film in compression, forming nano-column holes in the second Al-containing film, and selectively growing a second GaN layer. Film materials such as Al2O3, Si1-xGex, InP, GaP, GaAs, AlN, AlGaN, or GaN, may be initially grown at a low temperature. By increasing the growth temperatures, a compressed layer of epitaxial GaN can be formed on a Si substrate.
    • 提供了一种在硅(Si)和氮化镓(GaN)膜之间形成匹配的热膨胀界面的方法。 该方法提供(111)Si衬底并且在压缩覆盖Si衬底上形成第一含铝(Al)的膜。 在第一含Al膜中形成纳米柱孔,其暴露下面的Si衬底的区域。 从暴露区域选择性地生长GaN层,覆盖第一含Al膜。 使用横向纳米外延生长(LNEO)工艺生长GaN。 重复上述过程,在压缩中形成第二含Al膜,在第二含Al膜中形成纳米柱孔,并选择性地生长第二GaN层。 可以最初在低温下生长诸如Al 2 O 3 3,Si 1-x Ge x,InP,GaP,GaAs,AlN,AlGaN或GaN的膜材料。 通过增加生长温度,可以在Si衬底上形成外延GaN的压缩层。
    • 7. 发明授权
    • Floating body germanium phototransistor having a photo absorption threshold bias region
    • 具有光吸收阈值偏置区域的浮体锗光电晶体管
    • US07351995B2
    • 2008-04-01
    • US11894938
    • 2007-08-22
    • Sheng Teng HsuJong-Jan LeeJer-Shen MaaDouglas J. Tweet
    • Sheng Teng HsuJong-Jan LeeJer-Shen MaaDouglas J. Tweet
    • H01L29/06H01L31/072H01L31/109H01L31/0328H01L31/062H01L31/113H01L31/0232
    • H01L31/1136
    • A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.
    • 提出了具有光吸收阈值偏置区域的浮体锗(Ge)光电晶体管,以及相关的制造工艺。 该方法包括:提供p掺杂硅(Si)衬底; 选择性地形成覆盖在所述Si衬底的第一表面上的绝缘体层; 形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成栅极电介质,栅电极和栅极间隔物; 在Ge层中形成源极/漏极(S / D)区域; 并且在Ge层中形成邻近沟道区的光吸收阈值偏置区域。 在一个方面,第二S / D区域具有比第一S / D长度更长的长度。 光吸收阈值偏置区域位于第二S / D区域的下方。 或者,第二S / D区域与沟道分离偏移,光吸收阈值偏置区域是在光p掺杂之后的Ge层中的偏移。
    • 8. 发明授权
    • Method of fabricating a nickel silicide on a substrate
    • 在衬底上制造硅化镍的方法
    • US06720258B2
    • 2004-04-13
    • US10319313
    • 2002-12-12
    • Jer-shen MaaDouglas J. TweetYoshi OnoFengyan ZhangSheng Teng Hsu
    • Jer-shen MaaDouglas J. TweetYoshi OnoFengyan ZhangSheng Teng Hsu
    • H01L2144
    • H01L21/28518H01L29/456
    • An integrated circuit device, and a method of manufacturing the same, comprises an epitaxial nickel silicide on (100) Si, or a stable nickel silicide on amorphous Si, fabricated with a cobalt interlayer. In one embodiment the method comprises depositing a cobalt (Co) interface layer between the Ni and Si layers prior to the silicidation reaction. The cobalt interlayer regulates the flux of the Ni atoms through the cobalt/nickel/silicon alloy layer formed from the reaction of the cobalt interlayer with the nickel and the silicon so that the Ni atoms reach the Si interface at a similar rate, i.e., without any orientation preference, so as to form a uniform layer of nickel silicide. The nickel silicide may be annealed to form a uniform crystalline nickel disilicide. Accordingly, a single crystal nickel silicide on (100) Si or on amorphous Si is achieved wherein the nickel silicide has improved stability and may be utilized in ultra-shallow junction devices.
    • 集成电路器件及其制造方法包括在(100)Si上的外延硅化镍,或者由钴中间层制造的在非晶Si上的稳定的硅化镍。 在一个实施方案中,该方法包括在硅化反应之前在Ni和Si层之间沉积钴(Co)界面层。 钴中间层通过由钴中间层与镍和硅的反应形成的钴/镍/硅合金层调节Ni原子的通量,使得Ni原子以相似的速率到达Si界面,即没有 任何取向偏好,从而形成均匀的硅化镍层。 可以将镍硅化物退火以形成均匀的结晶二硅化镍。 因此,实现了(100)Si或非晶Si上的单晶硅化镍,其中硅化镍具有改进的稳定性并可用于超浅结结器件中。
    • 10. 发明授权
    • Method of fabricating a low, dark-current germanium-on-silicon pin photo detector
    • 制造低,暗电流硅 - 硅引脚光电探测器的方法
    • US07811913B2
    • 2010-10-12
    • US11312967
    • 2005-12-19
    • Jong-Jan LeeDouglas J. TweetJer-Shen MaaSheng Teng Hsu
    • Jong-Jan LeeDouglas J. TweetJer-Shen MaaSheng Teng Hsu
    • H01L21/265
    • H01L31/105H01L31/1808H01L31/1864Y02E10/50Y02P70/521Y10S438/933
    • A method of fabricating a low, dark-current germanium-on-silicon PIN photo detector includes preparing a P-type silicon wafer; implanting the P-type silicon wafer with boron ions; activating the boron ions to form a P+ region on the silicon wafer; forming a boron-doped germanium layer on the P+ silicon surface; depositing an intrinsic germanium layer on the boron-doped germanium layer; cyclic annealing, including a relatively high temperature first anneal step and a relatively low temperature second anneal step; repeating the first and second anneal steps for about twenty cycles, thereby forcing crystal defects to the P+ germanium layer; implanting ions in the surface of germanium layer to form an N+ germanium surface layer and a PIN diode; activating the N+ germanium surface layer by thermal anneal; and completing device according to known techniques to form a low dark-current germanium-on-silicon PIN photodetector.
    • 制造低,暗电流锗硅PIN光检测器的方法包括制备P型硅晶片; 用硼离子注入P型硅晶片; 激活硼离子以在硅晶片上形成P +区; 在P +硅表面上形成硼掺杂锗层; 在硼掺杂的锗层上沉积本征锗层; 循环退火,包括相对高温的第一退火步骤和相对低温的第二退火步骤; 重复第一和第二退火步骤约20个循环,由此迫使晶体缺陷到P +锗层; 在锗层表面注入离子以形成N +锗表面层和PIN二极管; 通过热退火来活化N +锗表面层; 并根据已知技术完成器件以形成低暗电流锗硅PIN光电探测器。