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1. 发明授权

US5457311A Integrated circuit fan-in for semiconductor transducer devices 失效
标题翻译：用于半导体传感器器件的集成电路引入
公开(公告)号：US5457311A
公开(公告)日：1995-10-10
申请号：US092640
申请日：1993-07-16
申请人： Donald J. Drake , William G. Hawkins , Thomas A. Tellier
发明人： Donald J. Drake , William G. Hawkins , Thomas A. Tellier
IPC分类号： B41J2/45 , H01L27/146 , H01J40/14 , H01L27/14
CPC分类号： B41J2/45 , H01L27/146
摘要： A wide semiconductor transducer device comprises a linear array of semiconductor chips. Each of the semiconductor chips has a plurality of transducer elements arranged on it along a front edge at a constant spacing, the constant spacing being maintained across the semiconductor chip boundaries. Each of the semiconductor chips also includes associated transducer circuits which are each connected one of the plurality of transducer elements formed on the semiconductor chip. While the requirement that the transducer elements maintain the constant spacing requires them to be located within a damage zone created during the dicing and/or thermally induced compression of the semiconductor chip, the associated transducer circuits can be located within an interior portion of the semiconductor chip. The interior portion of the semiconductor chip is located a sufficient distance from the edges of the semiconductor chip such that it does not encroach on the damage zone.
摘要翻译：宽的半导体传感器装置包括半导体芯片的线性阵列。每个半导体芯片具有沿着前边缘以恒定间隔布置在其上的多个换能器元件，恒定间隔保持在半导体芯片边界两边。每个半导体芯片还包括相关联的换能器电路，它们各自连接形成在半导体芯片上的多个换能器元件中的一个。虽然传感器元件保持恒定间隔的要求要求它们位于在半导体芯片的切割和/或热诱导压缩期间产生的损伤区域内，但是相关联的换能器电路可以位于半导体芯片的内部部分内。半导体芯片的内部部分位于与半导体芯片的边缘足够的距离处，使得它不会侵入损伤区域。

2. 发明授权

US4961821A Ode through holes and butt edges without edge dicing 失效
标题翻译：通过孔和对接边缘没有边缘切割
公开(公告)号：US4961821A
公开(公告)日：1990-10-09
申请号：US440296
申请日：1989-11-22
申请人： Donald J. Drake , William G. Hawkins , Michael R. Campanelli , Thomas A. Tellier
发明人： Donald J. Drake , William G. Hawkins , Michael R. Campanelli , Thomas A. Tellier
IPC分类号： B41J2/05 , B41J2/135 , B41J2/16 , H01L21/301 , H01L21/306 , H01L21/308 , H01L21/768
CPC分类号： B41J2/1603 , B41J2/1628 , B41J2/1629 , H01L21/30608 , H01L21/3081 , H01L21/76898
摘要： At least one through opening of predetermined location and dimensions is fabricated in a (100) silicon wafer by orientation dependent etching method after completion of integrated circuits on the wafer, the opening extending through the wafer between a circuit surface of the wafer and an opposite parallel base surface of the wafer and having a predetermined location relative to the integrated circuit on the circuit surface of the wafer. The method includes the steps of fabricating the integrated circuit on the circuit surface of the wafer; applying an etch resistant layer of plasma solicon nitride on the circuit and base surfaces of the wafer; patterning the etch resistant plasma silicon nitride layer on the circuit surface to define an upper etch opening having a location and dimensions which define the predetermined location and dimensions of the through opening; and patterning the plasma silicon nitride layer on the base surface to produce a lower etch opening aligned with the upper etch opening within a predetermined tolerance. The wafer is then anisotropically etched to produce a first recess corresponding to the upper etch opening in the circuit surface and a second recess corresponding to the lower etch opening in the base surface, each of the first and second recesses being bounded by (111) plane side walls. The anisotropic etching of the second recess intersects the first recess to form the through opening bounded by (111) plane side walls and has its predetermined dimensions and location defined by the patterning of the upper etch opening.

3. 发明授权

US4975143A Keyway alignment substrates 失效
标题翻译：键槽对准基板
公开(公告)号：US4975143A
公开(公告)日：1990-12-04
申请号：US440211
申请日：1989-11-22
申请人： Donald J. Drake , Michael R. Campanelli , Thomas A. Tellier
发明人： Donald J. Drake , Michael R. Campanelli , Thomas A. Tellier
IPC分类号： B41J2/05 , H01L21/68 , H01L31/02 , H04N1/028
CPC分类号： H01L21/68 , H01L2224/16 , H01L2924/01014 , H01L2924/10253 , Y10T156/1092 , Y10T156/1744
摘要： The vacuum hold down alignment substrate is formed as an array of precisely aligned alignment substrate subunits. Each subunit is formed with an alignment pattern formed in a photo-patternable or electroformable material. When the plurality of alignment substrate subunits are formed into an array to produce the alignment substrate, the alignment patterns are aligned to receive corresponding patterns in discrete subunit devices which are aligned into an array on the alignment substrate.
摘要翻译：真空压紧对准基板形成为精确对准的对准衬底子单元的阵列。每个子单元形成有形成在可光图案化或可电铸材料中的对准图案。当多个对准衬底子单元形成为阵列以产生对准衬底时，对准图案对齐以在离散子单元器件中接收对准到对准衬底上的阵列中的对应图案。

4. 发明授权

US5201987A Fabricating method for silicon structures 失效
标题翻译：硅结构的制造方法
公开(公告)号：US5201987A
公开(公告)日：1993-04-13
申请号：US899597
申请日：1992-06-18
申请人： William G. Hawkins , Donald J. Drake , James F. O'Neill
发明人： William G. Hawkins , Donald J. Drake , James F. O'Neill
IPC分类号： H01L21/308
CPC分类号： H01L21/3081
摘要： A precision etched, three dimensional device is fabricated from a silicon wafer by etching from one side of the wafer. A chemical masking layer, such as silicon nitride, is first deposited on all sides of the wafer, followed by the deposition of a robust mechanical layer, such as polycrystalline silicon, over the masking layer on all sides of the wafer. The two layers are sequentially patterned on one side of the wafer and then the wafer is placed into an etchant bath which etches the exposed surface of the wafer and concurrently removes the protective layer, leaving a defect-free masking layer that prevents unintentional etching that would reduce yields of fabricated devices.
摘要翻译：通过从晶片的一侧进行蚀刻从硅晶片制造精密蚀刻的三维器件。首先在晶片的所有侧面上沉积诸如氮化硅的化学掩蔽层，然后在晶片的所有侧面上的掩模层上沉积坚固的机械层，例如多晶硅。这两层在晶片的一侧依次构图，然后将晶片放入蚀刻液中，蚀刻晶片的暴露表面并同时去除保护层，留下无缺陷的掩模层，防止无意蚀刻，降低制造装置的产量。

5. 发明授权

US5124717A Ink jet printhead having integral filter 失效
标题翻译：具有整体式过滤器的喷墨打印头
公开(公告)号：US5124717A
公开(公告)日：1992-06-23
申请号：US624390
申请日：1990-12-06
申请人： Michael R. Campanelli , William G. Hawkins , Donald J. Drake , James F. O'Neill
发明人： Michael R. Campanelli , William G. Hawkins , Donald J. Drake , James F. O'Neill
IPC分类号： B41J2/05 , B41J2/16
CPC分类号： B41J2/1604 , B41J2/1623 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1632 , B41J2/1635 , B41J2/1642 , B41J2002/14403
摘要： An ink jet printhead having an integral membrane filter fabricated over the surface of the printhead containing the ink inlet is disclosed. The individual printheads are obtained by a sectioning operation which cuts aligned and bonded channel and heater wafers. The mated wafers contain a plurality of printheads and must be separated. The integral membrane filter is formed on the channel wafer after it is anisotropically etched incorporating the etch resistant mask layer and prior to mating with the heater wafer. A patternable layer is deposited over the etch resistant masking layer and exposed, patterned and developed to establish the mesh filter. In one embodiment, the side of the channel wafer not patterned and etched is heavily doped to form an etch stop which increases the robustness of the membrane filter by ensuring that the masking layer remains intact during subsequent fabricating steps. This doped region beneath the patternable layer is then etched using the membrane filter as a mask to open the filter pores through the doped layer of the channel wafer, thereby increasing the filter thickness and its overall strength.
摘要翻译：公开了一种在包含墨水入口的打印头的表面上制造的具有整体膜过滤器的喷墨打印头。单个打印头通过切割对准和粘合的通道和加热器晶片的切片操作获得。配对的晶片包含多个打印头，必须分开。整体膜过滤器在其各向异性蚀刻之后形成在通道晶片上，其包含耐蚀刻掩模层并且在与加热器晶片配合之前。将可图案层沉积在抗蚀刻掩模层上，并进行曝光，图案化和显影以建立网状过滤器。在一个实施例中，未图案化和蚀刻的沟道晶片的侧面被重掺杂以形成蚀刻停止件，其通过确保掩模层在随后的制造步骤期间保持完整而增加了膜过滤器的鲁棒性。然后使用膜过滤器作为掩模蚀刻可图案层下面的该掺杂区域，以通过通道晶片的掺杂层打开过滤器孔，从而增加过滤器厚度及其整体强度。

6. 发明授权

US4875968A Method of fabricating ink jet printheads 失效
标题翻译：制造喷墨打印头的方法
公开(公告)号：US4875968A
公开(公告)日：1989-10-24
申请号：US305046
申请日：1989-02-02
申请人： James F. O'Neill , Donald J. Drake , William G. Hawkins
发明人： James F. O'Neill , Donald J. Drake , William G. Hawkins
IPC分类号： B41J2/05 , B41J2/16
CPC分类号： B41J2/1631 , B41J2/1604 , B41J2/1623 , B41J2/1629 , B41J2/1635
摘要： An improved method of fabricating a thermal ink jet printhead of the type produced by the mating of an anisotropically etched silicon substrate containing ink flow directing recesses with a substrate having heating elements and addressing electrodes is disclosed. An etch resistant material on one surface of a (100) silicon substrate is patterned to form at least two sets of vias therein having predetermined sizes, shapes, and predetermined spacing therebetween. The predetermined spacing permits selected complete undercutting by an anisotropic etchant within a predetermined etching time period. The patterned silicon substrate is anisotropically etched for the predetermined time period to form at least two sets of separate recesses, each recess being separated from each other by a wall, the surfaces of the walls being {111} crystal planes of the silicon substrate, whereby certain predetermined separately etched recesses are selectively placed into communication with each other by the selective undercutting while the remainder of the undercut walls provide strengthening reinforcement to the printhead, so that larger printheads may be fabricated which are more robust without relinquishing resolution or reducing tolerances.
摘要翻译：公开了一种改进的制造热喷墨打印头的方法，该喷墨打印头是通过将含有墨流动引导凹槽的各向异性蚀刻的硅基底与具有加热元件和寻址电极的基底配合而制造的。对（100）硅衬底的一个表面上的耐蚀刻材料进行图案化，以形成其中具有预定尺寸，形状和预定间隔的至少两组通孔。预定间隔允许在预定蚀刻时间段内由各向异性蚀刻剂选择的完全底切。图案化的硅衬底在预定的时间周期内被各向异性蚀刻以形成至少两组分离的凹槽，每个凹槽彼此被壁分离，壁的表面是硅衬底的{111}晶面，由此某些预定的单独蚀刻的凹槽通过选择性底切而选择性地彼此连通，而其余的底切壁为打印头提供加强增强，使得可以制造更大的打印头，其更坚固，而不放弃分辨率或减小公差。

7. 发明授权

US4638328A Printhead for an ink jet printer 失效
标题翻译：打印头用于喷墨打印机
公开(公告)号：US4638328A
公开(公告)日：1987-01-20
申请号：US858143
申请日：1986-05-01
申请人： Donald J. Drake , William G. Hawkins , Roger G. Markham , Richard V. LaDonna
发明人： Donald J. Drake , William G. Hawkins , Roger G. Markham , Richard V. LaDonna
IPC分类号： B41J2/015 , B41J2/02 , B41J2/075 , G01D15/18
CPC分类号： B41J2/02 , B41J2002/14379 , B41J2202/16
摘要： A continuous stream type ink jet printhead utilizing constant thermal pulses to perturbate the ink streams emitted through a plurality of nozzles to break up the ink streams into droplets at a fixed distance from the nozzles whereat the drops are individually charged by a charging electrode in accordance with digitized data signals. Each printhead has a manifold, a plurality of ink channels communicating at one end with the manifold and terminating at the other end with nozzles, and at least one resistor addressed by a predetermined frequency of current pulses for applying thermal pulses to the ink. In one embodiment, a resistor is positioned in each of the channels adjacent the nozzles and in another embodiment, a single resistor is located in the ink manifold. The resistors are pulsed at low power to generate a perturbation of ink properties such as density, viscosity, or surface tension without producing a phase change in the ink.
摘要翻译：连续流式喷墨打印头，其使用恒定的热脉冲来扰动通过多个喷嘴发射的油墨流，以将墨水流从与喷嘴相距固定距离的液滴分散成液滴，在该喷嘴处，液滴由充电电极根据数字化数据信号。每个打印头具有歧管，多个墨水通道在一端与歧管连通并且在另一端处以喷嘴终止，并且至少一个电阻器由预定频率的电流脉冲寻址，以将热脉冲施加到墨水。在一个实施例中，电阻器位于与喷嘴相邻的每个通道中，并且在另一个实施例中，单个电阻器位于墨水歧管中。电阻器以低功率脉冲以产生油墨性质（例如密度，粘度或表面张力）的扰动，而不会导致油墨中的相变。

8. 发明授权

US5030971A Precisely aligned, mono- or multi-color, `roofshooter` type printhead 失效
标题翻译：精确对齐，单色或多色，“屋顶运动”型打印头
公开(公告)号：US5030971A
公开(公告)日：1991-07-09
申请号：US442574
申请日：1989-11-29
申请人： Donald J. Drake , William G. Hawkins
发明人： Donald J. Drake , William G. Hawkins
IPC分类号： B41J2/05 , B41J2/14 , B41J2/16 , B41J2/21
CPC分类号： B41J2/2103 , B41J2/14072 , B41J2/14129 , B41J2/1603 , B41J2/1628 , B41J2/1629 , B41J2/1642
摘要： A multi-color roofshooter type thermal ink jet printhead includes a common heater substrate having at least two arrays of heating elements and a corresponding number of elongated feed slots, each heater array being located adjacent its corresponding feed slot. A common channel substrate is layered above a heater substrate and includes arrays of nozzles corresponding in number to the arrays of heating elements, each nozzle array communicating with one of the feed slots on the heater substrate. Each nozzle array is isolated from an adjacent nozzle array and each nozzle of each nozzle array is aligned above a respective heating element of a corresponding heater array. Each of the heater arrays is individually addressed and driven by switching circuitry located on the heater substrate adjacent to its corresponding heater array. The switching circuitry can be active driver matrices corresponding in number to the arrays of heating elements. The locations of the driver matrices preferably alternate with locations of the feed slots. With this construction, multi-color printheads can be efficiently arranged on a single wafer, so that silicon real estate is conserved. The switching circuitry can also be used to address an array of heating elements in a mono-color thermal inkjet printhead. In a preferred embodiment, inputs of the switching circuitry extend from sides of the switching circuitry whereby distances between adjacent feed slots are minimized.
摘要翻译：多色屋顶拍摄型热喷墨打印头包括具有至少两个加热元件阵列和相应数量的细长进给槽的公共加热器基板，每个加热器阵列位于其相应的进料槽附近。公共通道基板层叠在加热器基板的上方，并且包括与加热元件阵列相对应的喷嘴阵列，每个喷嘴阵列与加热器基板上的一个进料槽连通。每个喷嘴阵列与相邻的喷嘴阵列隔离，并且每个喷嘴阵列的每个喷嘴对准在相应加热器阵列的相应加热元件的上方。每个加热器阵列由位于加热器基板上的与其对应的加热器阵列相邻的切换电路单独寻址和驱动。开关电路可以是与加热元件阵列相对应的有源驱动器矩阵。驱动器矩阵的位置优选地与馈送槽的位置交替。利用这种结构，可以将多色打印头有效地布置在单个晶片上，从而保持硅的空间。开关电路还可用于解决单色热喷墨打印头中的加热元件阵列。在优选实施例中，开关电路的输入从开关电路的侧面延伸，从而相邻进料槽之间的距离最小化。

9. 发明授权

US5006202A Fabricating method for silicon devices using a two step silicon etching process 失效
标题翻译：使用两步硅蚀刻工艺的硅器件的制造方法
公开(公告)号：US5006202A
公开(公告)日：1991-04-09
申请号：US533204
申请日：1990-06-04
申请人： William G. Hawkins , Donald J. Drake , James F. O'Neill
发明人： William G. Hawkins , Donald J. Drake , James F. O'Neill
IPC分类号： B41J2/16 , B81B1/00 , C23F1/00 , C23F1/02 , H01L21/302 , H01L21/306 , H01L21/3065 , H01L21/308
CPC分类号： B41J2/1642 , B41J2/1601 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1645 , B81B1/004 , B81C1/00896 , H01L21/30608 , H01L21/3085 , B81B2201/052 , B81C2201/053
摘要： Disclosed is a method of fabricating a precision etched, three dimensional device from a silicon wafer, wherein the etching is done from one side of the wafer using a two step silicon etching process. A two-sided deposition of a robust protective layer, such as polycrystalline silicon, is placed over a two-sided deposition of a chemical masking layer such as silicon dioxide. The two layers are concurrently patterned with first and second sets of vias on one side of the wafer, while the opposite side is protected by the protective layer. The protective layer is removed to permit deposition of a second masking layer such as silicon nitride, followed by deposition of a second protective layer. Again, the second protective layer prevents damage to the fragile second masking layer on the wafer backside while its frontside is patterned with a similar set of vias aligned with the first set of vias in the first masking layer. This similar set of vias is sequentially formed in both the second protective layer and the underlying second masking layers. Then the wafer is placed in an etchant bath so that the first set of recesses is anisotropically etched in the wafer frontside side. Next, the second protective layer and second masking layer are removed to permit anisotropic etching of the second set of recesses through the second set of vias in the first masking layer. If the protective layer is polycrystalline silicon, it is concurrently etch-removed during the initial etching of the silicon wafer.
摘要翻译：公开了一种从硅晶片制造精密蚀刻的三维器件的方法，其中使用两步硅蚀刻工艺从晶片的一侧进行蚀刻。坚固的保护层（例如多晶硅）的双面沉积置于诸如二氧化硅的化学掩蔽层的双面沉积上。两层同时用晶片一侧的第一组和第二组通孔构图，而相对侧被保护层保护。去除保护层以允许沉积诸如氮化硅的第二掩蔽层，随后沉积第二保护层。再次，第二保护层防止损坏晶片背面上的脆弱的第二掩蔽层，同时其前侧用与第一掩蔽层中的第一组通孔对准的相似的一组通孔构图。在第二保护层和下面的第二掩蔽层中顺序地形成这种类似的通孔。然后将晶片放置在蚀刻剂浴中，使得第一组凹陷在晶片前侧被各向异性地蚀刻。接下来，去除第二保护层和第二掩蔽层，以允许通过第一掩模层中的第二组通孔对第二组凹陷进行各向异性蚀刻。如果保护层是多晶硅，则在硅晶片的初始蚀刻期间同时进行蚀刻去除。

10. 发明授权

US4829324A Large array thermal ink jet printhead 失效
标题翻译：大阵列热喷墨打印头
公开(公告)号：US4829324A
公开(公告)日：1989-05-09
申请号：US137283
申请日：1987-12-23
申请人： Donald J. Drake , William G. Hawkins
发明人： Donald J. Drake , William G. Hawkins
IPC分类号： B41J2/175 , B41J2/05 , B41J2/16
CPC分类号： B41J2/1623 , B41J2/1604 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1632 , B41J2/1635 , B41J2202/20
摘要： A large array ink jet printhead is disclosed having two basic parts, one containing an array of heating elements and addressing electrodes on the surface thereof, and the other containing the liquid ink handling system. At least the part containing the ink handling system is silicon and is assembled from generally identical sub-units aligned and bonded side-by-side on the part surface having the heating element array. Each channel plate sub-unit has an etched manifold with means for supplying ink thereto and a plurality of parallel ink channel grooves open on one end and communicating with the manifold at the other. The surfaces of the channel plate sub-units contacting each other are {111} planes formed by anisotropic etching. The channel plate sub-units appear to have a parallelogram shape when viewed from a direction parallel with and confronting the ink channel groove open ends. The heating element array containing part may also be assembled from etched silicon sub-units with their abutting surfaces being {111} planes. In another embodiment, a plurality of channel plate sub-units are anisotropically etched in a silicon wafer and a plurality of heating element sub-units are formed on another silicon wafer. The heating element wafer is also anisotropically etched with elongated slots. The wafers are aligned and bonded together, then diced into complete printhead sub-units which have abutting side surfaces that are {111} planes for accurate side-by-side assembly.

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