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1. 发明申请

US20060007181A1 Electrical touch sensor and human interface device using the same 有权
公开(公告)号：US20060007181A1
公开(公告)日：2006-01-12
申请号：US11145332
申请日：2005-06-03
申请人： Deok-Young Jung , Jae-Surk Hong , Young-Ho Shin
发明人： Deok-Young Jung , Jae-Surk Hong , Young-Ho Shin
IPC分类号： G09G5/00
CPC分类号： G06F3/0383 , G06F3/03543 , G06F3/03547 , G06F2203/0339
摘要： An electrical touch sensor is provided. The electrical touch sensor includes: a touch detection part having at least one touch pad and generating a first signal having a same delay time regardless of whether the object is in contact with the touch pad and a second signal having a varied delay time according to whether the object is in contact with the touch pad; and a contact signal generator generating a contact signal in response to the delay time-difference between the first and second signals. Therefore, it is possible to increase operation reliability by precisely determining whether the object is in contact with the pad, when the object has charge accumulation characteristics more than a certain level, although its conductive is insufficient. In addition, the electrical touch sensor can determine whether the object is in contact with the pad using only one pad to reduce a layout area of a product.

2. 发明授权

US07605805B2 Electrical touch sensor and human interface device using the same 有权
标题翻译：电触摸传感器和人机界面设备使用相同
公开(公告)号：US07605805B2
公开(公告)日：2009-10-20
申请号：US11145332
申请日：2005-06-03
申请人： Deok-Young Jung , Jae-Surk Hong , Young-Ho Shin
发明人： Deok-Young Jung , Jae-Surk Hong , Young-Ho Shin
IPC分类号： G09G5/00
CPC分类号： G06F3/0383 , G06F3/03543 , G06F3/03547 , G06F2203/0339
摘要： An electrical touch sensor is provided. The electrical touch sensor includes: a touch detection part having at least one touch pad and generating a first signal having a same delay time regardless of whether the object is in contact with the touch pad and a second signal having a varied delay time according to whether the object is in contact with the touch pad; and a contact signal generator generating a contact signal in response to the delay time-difference between the first and second signals.Therefore, it is possible to increase operation reliability by precisely determining whether the object is in contact with the pad, when the object has charge accumulation characteristics more than a certain level, although its conductive is insufficient. In addition, the electrical touch sensor can determine whether the object is in contact with the pad using only one pad to reduce a layout area of a product.
摘要翻译：提供电触摸传感器。电触摸传感器包括：触摸检测部分，具有至少一个触摸板，并且产生具有相同延迟时间的第一信号，而不管对象是否与触摸板接触，以及根据是否具有变化的延迟时间的第二信号物体与触摸板接触; 以及接触信号发生器，响应于第一和第二信号之间的延迟时间差产生接触信号。因此，虽然其导电性不足，但是当物体的电荷累积特性大于一定水平时，可以通过精确地确定物体是否与焊盘接触来提高操作可靠性。此外，电触摸传感器可以使用仅一个垫来确定物体是否与垫接触以减少产品的布局面积。

3. 发明申请

US20150243637A1 SEMICONDUCTOR DEVICES HAVING THROUGH-VIAS AND METHODS FOR FABRICATING THE SAME 审中-公开
标题翻译：具有通孔的半导体器件及其制造方法
公开(公告)号：US20150243637A1
公开(公告)日：2015-08-27
申请号：US14709840
申请日：2015-05-12
申请人： Pil-Kyu Kang , Taeyeong Kim , Byung Lyul Park , Jumyong Park , Jinho Park , Kyu-Ha Lee , Deok-Young Jung , Gilheyun Choi
发明人： Pil-Kyu Kang , Taeyeong Kim , Byung Lyul Park , Jumyong Park , Jinho Park , Kyu-Ha Lee , Deok-Young Jung , Gilheyun Choi
IPC分类号： H01L25/065 , G11C8/00 , G11C16/08 , H01L23/544
摘要： A conductive via of a semiconductor device is provided extending in a vertical direction through a substrate, a first end of the conductive via extending through a first surface of the substrate, so that the first end protrudes in the vertical direction relative to the first surface of the substrate. An insulating layer is provided on the first end of the conductive via and on the first surface of the substrate. An upper portion of a mask layer pattern is removed so that a capping portion of the insulating layer that is on the first end of the conductive via is exposed. A portion of the insulating layer at a side of, and spaced apart from, the conductive via, is removed, to form a recess in the insulating layer. The capping portion of the insulating layer on the first end of the conductive via is simultaneously removed.
摘要翻译：提供半导体器件的导电通孔，其沿垂直方向穿过衬底延伸，导电通孔的第一端延伸穿过衬底的第一表面，使得第一端相对于衬底的第一表面在垂直方向上突出底物。绝缘层设置在导电通孔的第一端和基板的第一表面上。除去掩模层图案的上部，使得在导电通孔的第一端上的绝缘层的封盖部分露出。去除绝缘层的与导电通孔相隔一定距离的一部分，以在绝缘层中形成凹陷。同时去除导电通孔第一端上的绝缘层的封盖部分。

4. 发明申请

US20120039564A1 Photoelectric Integrated Circuit Devices And Methods Of Forming The Same 审中-公开
标题翻译：光电集成电路器件及其形成方法
公开(公告)号：US20120039564A1
公开(公告)日：2012-02-16
申请号：US13191874
申请日：2011-07-27
申请人： Pil-Kyu Kang , GilHeyun Choi , Sukchul Bang , Daelok Bae , Byung-Lyul Park , KwangJin Moon , Dong-Chan Lim , Deok-Young Jung
发明人： Pil-Kyu Kang , GilHeyun Choi , Sukchul Bang , Daelok Bae , Byung-Lyul Park , KwangJin Moon , Dong-Chan Lim , Deok-Young Jung
IPC分类号： G02B6/12
CPC分类号： G02B6/131 , G02B6/132 , G02B6/136 , G02B2006/12061
摘要： A photoelectric integrated circuit device may include a substrate including an electronic device region and an on die optical input/output device region, the substrate having a trench in the on die optical input/output device region; a lower clad layer provided in the trench, the lower clad layer having an upper surface lower than a surface of the substrate; a core provided on the lower clad layer; an insulating pattern provided on the core; an optical detection pattern provided on the insulating pattern, the optical detection pattern having at least a portion provided in the trench; and at least one transistor provided on the substrate of the electronic device region.
摘要翻译：光电集成电路器件可以包括包括电子器件区域和裸片上的光输入/输出器件区域的衬底，所述衬底在管芯光输入/输出器件区域中具有沟槽; 设置在所述沟槽中的下包层，所述下包层具有比所述基板的表面低的上表面; 设置在下包层上的芯; 设置在芯上的绝缘图案; 设置在所述绝缘图案上的光学检测图案，所述光学检测图案具有设置在所述沟槽中的至少一部分; 以及设置在电子器件区域的衬底上的至少一个晶体管。

5. 发明申请

US20110318923A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME INCLUDING A CONDUCTIVE STRUCTURE IS FORMED THROUGH AT LEAST ONE DIELECTRIC LAYER AFTER FORMING A VIA STRUCTURE 有权
标题翻译：半导体器件及其制造方法，包括导电结构在形成一个结构之后通过至少一个介电层形成
公开(公告)号：US20110318923A1
公开(公告)日：2011-12-29
申请号：US12913753
申请日：2010-10-27
申请人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
发明人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L21/76801 , H01L25/0657 , H01L25/18 , H01L2224/16 , H01L2225/06513 , H01L2225/06541
摘要： For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized.
摘要翻译：为了形成半导体器件，通过至少一个电介质层和至少一部分衬底形成通孔结构。此外，在通孔结构上形成保护缓冲层。此外，在形成通孔结构和保护缓冲层之后，在衬底上形成用于集成电路的导电结构，其中导电结构不在过孔结构上形成。因此，导电和通孔结构的劣化被最小化。

6. 发明授权

US07129463B2 Photocurrent sensing circuit having stabilized feedback loop 失效
标题翻译：光电流检测电路具有稳定的反馈回路
公开(公告)号：US07129463B2
公开(公告)日：2006-10-31
申请号：US10968535
申请日：2004-10-19
申请人： Deok-Young Jung
发明人： Deok-Young Jung
IPC分类号： H03F3/08
CPC分类号： H01L31/02019 , H03F3/082
摘要： A photocurrent sensing circuit having a stabilized feedback loop comprises a photocurrent generator including a photodiode generating the photocurrent in proportion to an amount of incident light and applying the photocurrent to an output node, a switching unit applying the photocurrent applied to a control node to a voltage-generating capacitor when a shutter signal is in a first state, and applying a predetermined current to the control node when the shutter signal is in a second state, and a circuit stabilizer applying the photocurrent applied to the output node to the control node, and always forming a feedback loop of the photodiode through the photocurrent applied to the output node, wherein the circuit stabilizer comprises a first NMOS transistor forming the feedback loop of the photodiode in response to the photocurrent input to the output node when the predetermined current is applied to the control node, breaking the feedback loop and applying the photocurrent applied to the output node to the control node when the predetermined current is not applied to the control node, a second NMOS transistor always forming the feedback loop of the photodiode in response to the photocurrent applied to the output node, and a third NMOS transistor connected to the first and second transistors and the photodiode, and providing a current path for forming the feedback loop.
摘要翻译：具有稳定的反馈回路的光电流检测电路包括光电流发生器，其包括光电二极管，其产生与入射光量成比例的光电流并将光电流施加到输出节点;开关单元，将施加到控制节点的光电流施加到电压当快门信号处于第一状态时，产生电容器，并且当快门信号处于第二状态时将预定电流施加到控制节点;以及电路稳压器，将施加到输出节点的光电流施加到控制节点，以及总是通过施加到输出节点的光电流形成光电二极管的反馈回路，其中电路稳压器包括第一NMOS晶体管，当预定电流被施加到第一NMOS晶体管时，该第一NMOS晶体管响应于光电流输入到输出节点，形成光电二极管的反馈回路控制节点，断开反馈回路并施加光电流当所述预定电流不被施加到所述控制节点时，输出节点到所述控制节点;响应于施加到所述输出节点的光电流总是形成所述光电二极管的反馈回路的第二NMOS晶体管，以及连接到所述第一NMOS晶体管的第三NMOS晶体管以及第二晶体管和光电二极管，并提供用于形成反馈回路的电流路径。

7. 发明申请

US20120142185A1 METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120142185A1
公开(公告)日：2012-06-07
申请号：US13240040
申请日：2011-09-22
申请人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
发明人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L21/6835 , H01L23/3128 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L2221/68327 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/036 , H01L2224/0401 , H01L2224/05009 , H01L2224/05018 , H01L2224/05556 , H01L2224/05557 , H01L2224/05558 , H01L2224/05559 , H01L2224/05609 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/16145 , H01L2224/16148 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/81191 , H01L2224/81815 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/01029 , H01L2924/01327 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2224/05655 , H01L2924/00 , H01L2924/00012
摘要： In methods of manufacturing a semiconductor device, a substrate having a first surface and a second surface opposite to the first surface is prepared. A sacrificial layer pattern is formed in a region of the substrate that a through electrode will be formed. The sacrificial layer pattern extends from the first surface of the substrate in a thickness direction of the substrate. An upper wiring layer is formed on the first surface of the substrate. The upper wiring layer includes a wiring on the sacrificial layer pattern. The second surface of the substrate is partially removed to expose the sacrificial layer pattern. The sacrificial layer pattern is removed from the second surface of the substrate to form an opening that exposes the wiring. A through electrode is formed in the opening to be electrically connected to the wiring.
摘要翻译：在制造半导体器件的方法中，制备具有与第一表面相对的第一表面和第二表面的衬底。在基板的形成有通孔的区域中形成牺牲层图案。牺牲层图案在基板的厚度方向上从基板的第一表面延伸。在衬底的第一表面上形成上部布线层。上部布线层包括在牺牲层图案上的布线。部分去除衬底的第二表面以暴露牺牲层图案。牺牲层图案从基板的第二表面移除以形成露出布线的开口。通孔形成在开口中以与布线电连接。

8. 发明申请

US20120119376A1 SEMICONDUCTOR CHIPS AND METHODS OF FORMING THE SAME 审中-公开
标题翻译：半导体器件及其形成方法
公开(公告)号：US20120119376A1
公开(公告)日：2012-05-17
申请号：US13289624
申请日：2011-11-04
申请人： Dong-Chan Lim , Gilheyun Choi , Kwangjin Moon , Deok-Young Jung , Byung-Lyul Park , Dosun Lee
发明人： Dong-Chan Lim , Gilheyun Choi , Kwangjin Moon , Deok-Young Jung , Byung-Lyul Park , Dosun Lee
IPC分类号： H01L23/48
CPC分类号： H01L21/76802 , H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05025 , H01L2224/1147 , H01L2224/13025 , H01L2224/13082 , H01L2224/13099 , H01L2224/13124 , H01L2224/13147 , H01L2224/13155 , H01L2924/0001 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： Provided are a semiconductor chip and a method of manufacturing the same. The semiconductor chip includes a substrate having a first side and a second side facing each other, and a through electrode being disposed in a hole penetrating the substrate, wherein an opening surrounded by the through electrode is disposed in the hole, wherein the opening comprises a first end adjacent to the first side of the substrate and a second end adjacent to the second side of the substrate
摘要翻译：提供一种半导体芯片及其制造方法。半导体芯片包括具有彼此相对的第一侧和第二侧的基板，以及设置在穿透基板的孔中的贯通电极，其中，由贯通电极包围的开口设置在孔中，其中，开口包括与基板的第一侧相邻的第一端和与基板的第二侧相邻的第二端

9. 发明申请

US20120043666A1 Semiconductor Device and Method of Fabricating the Same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120043666A1
公开(公告)日：2012-02-23
申请号：US13287317
申请日：2011-11-02
申请人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
发明人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
IPC分类号： H01L23/48
CPC分类号： H01L21/76898 , H01L21/76801 , H01L25/0657 , H01L25/18 , H01L2224/16 , H01L2225/06513 , H01L2225/06541
摘要： For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized.
摘要翻译：为了形成半导体器件，通过至少一个电介质层和至少一部分衬底形成通孔结构。此外，在通孔结构上形成保护缓冲层。此外，在形成通孔结构和保护缓冲层之后，在衬底上形成用于集成电路的导电结构，其中导电结构不在过孔结构上形成。因此，导电和通孔结构的劣化被最小化。

10. 发明授权

US08076234B1 Semiconductor device and method of fabricating the same including a conductive structure is formed through at least one dielectric layer after forming a via structure 有权
标题翻译：在形成通孔结构之后，通过至少一个电介质层形成包括导电结构的半导体器件及其制造方法
公开(公告)号：US08076234B1
公开(公告)日：2011-12-13
申请号：US12913753
申请日：2010-10-27
申请人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
发明人： Byung-Lyul Park , Gil-Heyun Choi , Suk-Chul Bang , Kwang-Jin Moon , Dong-Chan Lim , Deok-Young Jung
IPC分类号： H01L21/4763 , H01L21/302 , H01L21/461
CPC分类号： H01L21/76898 , H01L21/76801 , H01L25/0657 , H01L25/18 , H01L2224/16 , H01L2225/06513 , H01L2225/06541
摘要： For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized.
摘要翻译：为了形成半导体器件，通过至少一个电介质层和至少一部分衬底形成通孔结构。此外，在通孔结构上形成保护缓冲层。此外，在形成通孔结构和保护缓冲层之后，在衬底上形成用于集成电路的导电结构，其中导电结构不在过孔结构上形成。因此，导电和通孔结构的劣化被最小化。

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