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    • 2. 发明授权
    • Distributed disk array architecture
    • 分布式磁盘阵列架构
    • US5787459A
    • 1998-07-28
    • US579553
    • 1995-12-27
    • David C. StallmoWilliam A. BrantRandy Hall
    • David C. StallmoWilliam A. BrantRandy Hall
    • G06F3/06G06F13/368
    • G06F3/0689G06F3/0608G06F3/0634G06F3/0658G06F3/067
    • A RAID-compatible data storage system which allows incremental increases in storage capacity at a cost that is proportional to the increase in capacity. The system does not require changes to the host system. The control and interface functions previously performed by a single (or redundant) central data storage device controller are distributed among a number of modular control units (MCUs). Each MCU is preferably physically coupled to a data storage device to form a basic, low-cost integrated storage node. One of two bus ports interfaces an MCU with the host computer on a host bus, and the other bus port interfaces an MCU with one or more data storage devices coupled to the MCU by a data storage device bus. The serial interface ports provide a means by which each of the MCUs may communicate with each other MCU to facilitate the implementation of a memory array architecture. The entire data storage array may appear as a single device capable of responding to a single identification number on the host bus, or may appear as a number of independent device. A controlling MCU receives a command and notifies the other MCUs that are involved in a read or write operation. Control of the host bus is transferred from one MCU to the next MCU in sequence so that the data is received by the host computer, or written to each data storage device, in the proper order.
    • RAID兼容的数据存储系统允许以与容量增加成正比的成本来增加存储容量。 系统不需要更改主机系统。 先前由单个(或冗余)中央数据存储设备控制器执行的控制和接口功能分布在多个模块化控制单元(MCU)中。 每个MCU优选地物理耦合到数据存储设备以形成基本的,低成本的集成存储节点。 两个总线端口中的一个将MCU与主机在主机总线上接口,另一个总线端口将MCU与通过数据存储设备总线耦合到MCU的一个或多个数据存储设备进行接口。 串行接口端口提供了每个MCU可以彼此通信的手段,以便于实现存储器阵列架构。 整个数据存储阵列可以显示为能够响应主机总线上的单个标识号的单个设备,或者可以显示为多个独立设备。 控制MCU接收到一个命令,并通知其他参与读或写操作的MCU。 主机总线的控制顺序从一个MCU传送到下一个MCU,以便主机接收数据,或以正确的顺序写入每个数据存储设备。
    • 3. 发明授权
    • On-line restoration of redundancy information in a redundant array system
    • 在冗余阵列系统中冗余信息的在线恢复
    • US5613059A
    • 1997-03-18
    • US349766
    • 1994-12-01
    • David C. StallmoWilliam A. BrantDavid Gordon
    • David C. StallmoWilliam A. BrantDavid Gordon
    • G06F3/06G06F11/08G06F11/10G06F11/14G06F12/00G06F12/16G06F11/34
    • G06F11/1076G06F11/1435
    • A method for on-line restoration of redundancy information in a redundant array storage system. The invention provides alternative methods of restoring valid data to a storage unit after a Write failure caused by a temporary storage unit fault. In the first preferred method, a valid redundancy block is generated for the corresponding data blocks on all storage units. Resubmitting the interrupted Write operation causes the old (and potentially corrupted) data block to be "subtracted" out of the re-computed redundancy block. The uncorrupted new data block is written over the old data block, and is "added" into the re-computed redundancy block to create a new, corrected redundancy block. The new, corrected redundancy block is written to the appropriate storage unit. In the second preferred method, a new redundancy block is generated from all valid data blocks and the new data block. The new redundancy block and the new data block are then written to the appropriate storage units. In both cases, the entire method is done on-line, with insignificant interruption of normal operation of the redundant array system, and without requiring added processing during normal operation.
    • 一种冗余阵列存储系统中冗余信息的在线恢复方法。 本发明提供了在由临时存储单元故障引起的写入故障之后将有效数据恢复到存储单元的替代方法。 在第一优选方法中,为所有存储单元上的相应数据块生成有效的冗余块。 重新提交中断的写入操作会导致旧的(可能被破坏的)数据块从重新计算的冗余块中“减去”。 未破坏的新数据块被写入旧的数据块,并被“添加”到重新计算的冗余块中以创建新的校正的冗余块。 新的校正冗余块被写入适当的存储单元。 在第二优选方法中,从所有有效数据块和新数据块生成新的冗余块。 然后将新的冗余块和新的数据块写入适当的存储单元。 在这两种情况下,整个方法都是在线完成的,冗余阵列系统的正常运行中断,并且在正常运行期间不需要额外的处理。
    • 5. 发明授权
    • Storage device array architecture with copyback cache
    • 存储设备阵列架构与副本缓存
    • US5617530A
    • 1997-04-01
    • US579545
    • 1995-12-27
    • David C. StallmoWilliam A. Brant
    • David C. StallmoWilliam A. Brant
    • G06F3/06G06F11/10G06F11/14G06F11/20G06F12/08G06F12/16G11B20/18
    • G06F11/1666G06F11/1076G06F11/1435G06F11/2087G06F11/2094G06F12/0804G11B20/1833G06F11/1441G06F11/20G06F11/2089G06F12/0866G06F2211/1019G06F2211/1059
    • A fault-tolerant storage device array using a copyback cache storage unit for temporary storage. When a Write occurs to the RAID system, the data is immediately written to the first available location in the copyback cache storage unit. Upon completion of the Write to the copyback cache storage unit, the host CPU is immediately informed that the Write was successful. Thereafter, further storage unit accesses by the CPU can continue without waiting for an error-correction block update for the data just written. In a first embodiment of the invention, Read-Modify-Write operations are performed during idle time. In a second embodiment of the invention, normal Read-Modify-Write operation by the RAID system controller continue use Write data in the controller's buffer memory. In a third embodiment, at least two controllers, each associated with one copyback cache storage unit, copy Write data from controller buffers to the associated copyback cache storage unit. If a copyback cache storage unit fails, more than one controller share a single copyback storage unit. In a fourth embodiment, Write data is copied from a controller buffer to a reserved area of each storage unit comprising the array.
    • 使用用于临时存储的副本缓存存储单元的容错存储设备阵列。 当RAID系统发生写入时,数据将立即写入拷贝缓存存储单元中的第一个可用位置。 完成写回到高速缓存存储单元后,主机CPU立即通知写入成功。 此后,可以继续CPU的进一步存储单元访问,而不用等待刚刚写入的数据的纠错块更新。 在本发明的第一实施例中,在空闲时间期间执行读 - 修改 - 写操作。 在本发明的第二实施例中,RAID系统控制器的正常读 - 修改 - 写操作继续使用控制器缓冲存储器中的写数据。 在第三实施例中,每个与一个拷贝高速缓存存储单元相关联的至少两个控制器将从控制器缓冲器写入数据复制到相关联的副本缓存存储单元。 如果副本缓存存储单元出现故障,则多个控制器共享单个副本存储单元。 在第四实施例中,将写入数据从控制器缓冲器复制到包括阵列的每个存储单元的保留区域。
    • 7. 发明授权
    • Distributed storage array system having plurality of storage devices which each of devices including a modular control unit for exchanging configuration information over a communication link
    • 具有多个存储装置的分布式存储阵列系统,每个存储装置包括用于通过通信链路交换配置信息的模块化控制单元
    • US06289398B1
    • 2001-09-11
    • US09123176
    • 1998-07-27
    • David C. StallmoWilliam A. BrantRandy Hall
    • David C. StallmoWilliam A. BrantRandy Hall
    • G06F300
    • G06F3/0689G06F3/0608G06F3/0634G06F3/0658G06F3/067
    • A RAID-compatible data storage system which allows incremental increases in storage capacity at a cost that is proportional to the increase in capacity. The system does not require changes to the host system. The control and interface functions previously performed by a single (or redundant) central data storage device controller are distributed among a number of modular control units (MCUs). Each MCU is preferably physically coupled to a data storage device to form a basic, low-cost integrated storage node. One of two bus ports interfaces an MCU with the host computer on a host bus, and the other bus port interfaces an MCU with one or more data storage devices coupled to the MCU by a data storage device bus. The serial interface ports provide a means by which each of the MCUs may communicate with each other MCU to facilitate the implementation of a memory array architecture. The entire data storage array may appear as a single device capable of responding to a single identification number on the host bus, or may appear as a number of independent devices. A controlling MCU receives a command and notifies the other MCUs that are involved in a read or write operation. Control of the host bus is transferred from one MCU to the next MCU in sequence so that the data is received by the host computer, or written to each data storage device, in the proper order.
    • RAID兼容的数据存储系统允许以与容量增加成正比的成本来增加存储容量。 系统不需要更改主机系统。 先前由单个(或冗余)中央数据存储设备控制器执行的控制和接口功能分布在多个模块化控制单元(MCU)中。 每个MCU优选地物理耦合到数据存储设备以形成基本的,低成本的集成存储节点。 两个总线端口中的一个将MCU与主机在主机总线上接口,另一个总线端口将MCU与通过数据存储设备总线耦合到MCU的一个或多个数据存储设备进行接口。 串行接口端口提供了每个MCU可以彼此通信的手段,以便于实现存储器阵列架构。 整个数据存储阵列可以显示为能够响应主机总线上的单个标识号的单个设备,或者可以显示为多个独立设备。 控制MCU接收到一个命令,并通知其他参与读或写操作的MCU。 主机总线的控制顺序从一个MCU传送到下一个MCU,以便主机接收数据,或以正确的顺序写入每个数据存储设备。
    • 8. 发明授权
    • Distributed storage array system having a plurality of modular control
units
    • 具有多个模块化控制单元的分布式存储阵列系统
    • US5689678A
    • 1997-11-18
    • US415157
    • 1995-03-31
    • David C. StallmoWilliam A. BrantRandy Hall
    • David C. StallmoWilliam A. BrantRandy Hall
    • G06F3/06G06F11/00
    • G06F3/0689G06F3/0608G06F3/0634G06F3/0658G06F3/067
    • A RAID-compatible data storage system which allows incremental increases in storage capacity at a cost that is proportional to the increase in capacity. The system does not require changes to the host system. The control and interface functions previously performed by a single (or redundant) central data storage device controller are distributed among a number of modular control units (MCUs). Each MCU is preferably physically coupled to a data storage device to form a basic, low-cost integrated storage node. One of two bus ports interfaces an MCU with the host computer on a host bus, and the other bus port interfaces an MCU with one or more data storage devices coupled to the MCU by a data storage device bus. The serial interface ports provide a means by which each of the MCUs may communicate with each other MCU to facilitate the implementation of a memory array architecture. The entire data storage array may appear as a single device capable of responding to a single identification number on the host bus, or may appear as a number of independent devices. A controlling MCU receives a command and notifies the other MCUs that are involved in a read or write operation. Control of the host bus is transferred from one MCU to the next MCU in sequence so that the data is received by the host computer, or written to each data storage device, in the proper order.
    • RAID兼容的数据存储系统允许以与容量增加成正比的成本来增加存储容量。 系统不需要更改主机系统。 先前由单个(或冗余)中央数据存储设备控制器执行的控制和接口功能分布在多个模块化控制单元(MCU)中。 每个MCU优选地物理耦合到数据存储设备以形成基本的,低成本的集成存储节点。 两个总线端口中的一个将MCU与主机在主机总线上接口,另一个总线端口将MCU与通过数据存储设备总线耦合到MCU的一个或多个数据存储设备进行接口。 串行接口端口提供了每个MCU可以彼此通信的手段,以便于实现存储器阵列架构。 整个数据存储阵列可以显示为能够响应主机总线上的单个标识号的单个设备,或者可以显示为多个独立设备。 控制MCU接收到一个命令,并通知其他参与读或写操作的MCU。 主机总线的控制顺序从一个MCU传送到下一个MCU,以便主机接收数据,或以正确的顺序写入每个数据存储设备。
    • 10. 发明授权
    • Storage device array architecture with copyback cache
    • 存储设备阵列架构与副本缓存
    • US5911779A
    • 1999-06-15
    • US825625
    • 1997-03-31
    • David C. StallmoWilliam A. Brant
    • David C. StallmoWilliam A. Brant
    • G06F3/06G06F11/10G06F11/14G06F11/20G06F12/08G06F12/16G11B20/18
    • G06F11/1666G06F11/1076G06F11/1435G06F11/2087G06F11/2094G06F12/0804G11B20/1833G06F11/1441G06F11/20G06F11/2089G06F12/0866G06F2211/1019G06F2211/1059
    • A fault-tolerant storage device array using a copyback cache storage unit for temporary storage. When a Write occurs to the RAID system, the data is immediately written to the first available location in the copyback cache storage unit. Upon completion of the Write to the copyback cache storage unit, the host CPU is immediately informed that the Write was successful. Thereafter, further storage unit accesses by the CPU can continue without waiting for an error-correction block update for the data just written. In a first embodiment of the invention, Read-Modify-Write operations are performed during idle time. In a second embodiment of the invention, normal Read-Modify-Write operation by the RAID system controller continue use Write data in the controller's buffer memory. In a third embodiment, at least two controllers, each associated with one copyback cache storage unit, copy Write data from controller buffers to the associated copyback cache storage unit. If a copyback cache storage unit fails, more than one controller share a single copyback storage unit. In a fourth embodiment, Write data is copied from a controller buffer to a reserved area of each storage unit comprising the array.
    • 使用用于临时存储的副本缓存存储单元的容错存储设备阵列。 当RAID系统发生写入时,数据将立即写入拷贝缓存存储单元中的第一个可用位置。 完成写回到高速缓存存储单元后,主机CPU立即通知写入成功。 此后,可以继续CPU的进一步存储单元访问,而不用等待刚刚写入的数据的纠错块更新。 在本发明的第一实施例中,在空闲时间期间执行读 - 修改 - 写操作。 在本发明的第二实施例中,RAID系统控制器的正常读 - 修改 - 写操作继续使用控制器缓冲存储器中的写数据。 在第三实施例中,每个与一个拷贝高速缓存存储单元相关联的至少两个控制器将从控制器缓冲器写入数据复制到相关联的副本缓存存储单元。 如果副本缓存存储单元出现故障,则多个控制器共享单个副本存储单元。 在第四实施例中,将写入数据从控制器缓冲器复制到包括阵列的每个存储单元的保留区域。