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    • 4. 发明申请
    • Method and apparatus for identifying false cache line sharing
    • 识别虚拟高速缓存行共享的方法和装置
    • US20050154839A1
    • 2005-07-14
    • US10757249
    • 2004-01-14
    • Jimmie DeWittFrank LevineChristopher RichardsonRobert Urquhart
    • Jimmie DeWittFrank LevineChristopher RichardsonRobert Urquhart
    • G06F12/00G06F12/08
    • G06F12/0806G06F12/0815
    • A method, apparatus, and computer instructions in a data processing system for processing instructions are provided. Instructions are received at a processor in the data processing system. If a selected indicator is associated with the instruction, counting of each event associated with the execution of the instruction is enabled. In some embodiments, the performance indicators may be utilized to obtain information regarding the nature of the cache hits and reloads of cache lines within the instruction or data cache. These embodiments may be used to determine whether processors of a multiprocessor system, such as a symmetric multiprocessor (SMP) system, are truly sharing a cache line or if there is false sharing of a cache line. This determination may then be used as a means for determining how to better store the instructions/data of the cache line to prevent false sharing of the cache line.
    • 提供了用于处理指令的数据处理系统中的方法,装置和计算机指令。 在数据处理系统的处理器处接收指令。 如果所选择的指示符与指令相关联,则启用与执行指令相关联的每个事件的计数。 在一些实施例中,性能指示符可用于获得关于高速缓存命中的性质和指令或数据高速缓存内的高速缓存行的重新加载的信息。 这些实施例可以用于确定诸如对称多处理器(SMP)系统的多处理器系统的处理器是真正共享高速缓存行还是存在高速缓存行的虚假共享。 然后可以将该确定用作确定如何更好地存储高速缓存行的指令/数据以防止高速缓存行的虚假共享的手段。
    • 5. 发明申请
    • Apparatus and method for autonomic hardware assisted thread stack tracking
    • 自动硬件辅助线程堆栈跟踪的装置和方法
    • US20050102673A1
    • 2005-05-12
    • US10703658
    • 2003-11-06
    • Jimmie DeWittFrank LevineChristopher RichardsonRobert Urquhart
    • Jimmie DeWittFrank LevineChristopher RichardsonRobert Urquhart
    • G06F9/06G06F9/44G06F9/46
    • G06F11/3636
    • A method and apparatus for providing an autonomic mechanism for tracking thread stacks during a trace of a computer program. The method and apparatus include hardware assistance mechanisms that allow the processor to autonomically maintain a work area for each thread where a call stack is stored. With the apparatus and method, the operating system of the computing device informs the operating system of the size of the data area to allocate to a particular thread work area. In addition, when a trace of a computer program is to be performed, the trace software, via the operating system, informs the processor to begin maintaining the thread call stack information in the thread work area. For each thread in the computer program execution, the processor maintains a work area having a size that is determined based on the size communicated by the operating system. The work area is designated by address and length information stored in control registers of the processor. The processor contains microcode that is used to cause the processor to automatically store thread tracking information in the work areas designated by the control registers of the processor when the control bit is set.
    • 一种在计算机程序的跟踪期间提供用于跟踪线程栈的自主机制的方法和装置。 该方法和装置包括硬件辅助机制,其允许处理器自动维护存储调用堆栈的每个线程的工作区域。 利用该装置和方法,计算装置的操作系统向操作系统通知要分配给特定线程工作区的数据区的大小。 此外,当要执行跟踪计算机程序时,经由操作系统的跟踪软件通知处理器开始在线程工作区域中维护线程调用堆栈信息。 对于计算机程序执行中的每个线程,处理器维护具有基于由操作系统传送的大小确定的大小的工作区域。 工作区域由存储在处理器的控制寄存器中的地址和长度信息指定。 处理器包含微码,用于使处理器在设置控制位时,将线程跟踪信息自动存储在由处理器的控制寄存器指定的工作区域中。