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1. 发明授权

US06867127B1 Diamond metal-filled patterns achieving low parasitic coupling capacitance 有权
标题翻译：金刚石金属填充图案实现低寄生耦合电容
公开(公告)号：US06867127B1
公开(公告)日：2005-03-15
申请号：US10327283
申请日：2002-12-19
申请人： Chih-Ju Hung
发明人： Chih-Ju Hung
IPC分类号： H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/52 , H01L23/522 , H01L29/40
CPC分类号： H01L21/76819 , H01L23/5225 , H01L2924/0002 , H01L2924/00
摘要： Provided are methods and composition for forming diamond metal-filled patterns above an integrated circuit substrate. A metal layer is formed above the integrated circuit substrate, which is then patterned such that a metal line is created. A plurality of diamond-shaped metal regions are then formed at least one of above and adjacent to the metal line formed on the integrated circuit substrate such that the density of metal on the integrated circuit substrate is greater than a specified density, thereby ensuring that a surface of dielectric formed above the metal line remains substantially planar after application of CMP to the dielectric layer.
摘要翻译：提供了用于在集成电路基板上形成金刚石金属填充图案的方法和组合物。在集成电路基板上方形成金属层，然后将其图案化，从而形成金属线。然后，在形成在集成电路基板上的金属线的上方和邻近的至少一个上形成多个菱形金属区域，使得集成电路基板上的金属的密度大于规定的密度，从而确保在金属线之上形成的电介质的表面在对介电层施加CMP之后基本保持平坦。

2. 发明授权

US07409660B2 Method and end cell library for avoiding substrate noise in an integrated circuit 失效
标题翻译：用于避免集成电路中的衬底噪声的方法和端单元库
公开(公告)号：US07409660B2
公开(公告)日：2008-08-05
申请号：US11324105
申请日：2005-12-29
申请人： Chih-Ju Hung , Xiang Matthew Song , Hsiao-Hui Wu , Kai Lai , Fredrick Jen
发明人： Chih-Ju Hung , Xiang Matthew Song , Hsiao-Hui Wu , Kai Lai , Fredrick Jen
IPC分类号： G06F17/50 , G06F9/45
CPC分类号： G06F17/5068
摘要： A method of avoiding substrate noise in an integrated circuit includes steps of receiving as input an integrated circuit design that includes at least a portion of a block for placement and routing on a substrate and an outer boundary of the block. An end cell is selected from a set of end cells for terminating the block in an outer area that extends from the outer boundary to an end cell boundary outside the block. The selected end cell is placed in the outer area to isolate the block electrically from the substrate.
摘要翻译：避免集成电路中的衬底噪声的方法包括以下步骤：接收作为输入的集成电路设计，该集成电路设计包括块的至少一部分用于在衬底和衬底的外边界上放置和布线。从一组终端单元中选择一个终端单元，用于在从外部边界延伸到块外的端单元边界的外部区域中终止块。将选定的端电池放置在外部区域中以将电阻与基板隔离。

3. 发明申请

US20050098895A1 Diamond metal-filled patterns achieving low parasitic coupling capacitance 有权
公开(公告)号：US20050098895A1
公开(公告)日：2005-05-12
申请号：US11016468
申请日：2004-12-16
申请人： Chih-Ju Hung
发明人： Chih-Ju Hung
IPC分类号： H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/52 , H01L23/522 , H01L29/40
CPC分类号： H01L21/76819 , H01L23/5225 , H01L2924/0002 , H01L2924/00
摘要： Provided are methods and composition for forming diamond metal-filled patterns above an integrated circuit substrate. A metal layer is formed above the integrated circuit substrate, which is then patterned such that a metal line is created. A plurality of diamond-shaped metal regions are then formed at least one of above and adjacent to the metal line formed on the integrated circuit substrate such that the density of metal on the integrated circuit substrate is greater than a specified density, thereby ensuring that a surface of dielectric formed above the metal line remains substantially planar after application of CMP to the dielectric layer.

4. 发明申请

US20070157145A1 Method and end cell library for avoiding substrate noise in an integrated circuit 失效
标题翻译：用于避免集成电路中的衬底噪声的方法和端单元库
公开(公告)号：US20070157145A1
公开(公告)日：2007-07-05
申请号：US11324105
申请日：2005-12-29
申请人： Chih-Ju Hung , Xiang Song , Hsiao-Hui Wu , Kai Lai , Fredrick Jen
发明人： Chih-Ju Hung , Xiang Song , Hsiao-Hui Wu , Kai Lai , Fredrick Jen
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method of avoiding substrate noise in an integrated circuit includes steps of receiving as input from an integrated circuit design at least a portion of a block for placement and routing on a substrate and an outer boundary of the block, selecting an end cell from a set of end cells for terminating the block in an outer area that extends from the outer boundary to an end cell boundary outside the block, and placing the selected end cell in the outer area to isolate the block electrically from the substrate.
摘要翻译：避免集成电路中的衬底噪声的方法包括以下步骤：从集成电路设计接收块的至少一部分的输入，用于在衬底和块的外边界上放置和布线，从组中选择终端单元的终端单元，用于在从外部边界延伸到块外的端单元边界的外部区域中终止块，并将所选择的端单元放置在外部区域中以将该块与基板电隔离。

5. 发明授权

US06998716B2 Diamond metal-filled patterns achieving low parasitic coupling capacitance 有权
标题翻译：金刚石金属填充图案实现低寄生耦合电容
公开(公告)号：US06998716B2
公开(公告)日：2006-02-14
申请号：US11016468
申请日：2004-12-16
申请人： Chih-Ju Hung
发明人： Chih-Ju Hung
IPC分类号： H01L23/48
CPC分类号： H01L21/76819 , H01L23/5225 , H01L2924/0002 , H01L2924/00
摘要： Provided are methods and composition for forming diamond metal-filled patterns above an integrated circuit substrate. A metal layer is formed above the integrated circuit substrate, which is then patterned such that a metal line is created. A plurality of diamond-shaped metal regions are then formed at least one of above and adjacent to the metal line formed on the integrated circuit substrate such that the density of metal on the integrated circuit substrate is greater than a specified density, thereby ensuring that a surface of dielectric formed above the metal line remains substantially planar after application of CMP to the dielectric layer.
摘要翻译：提供了用于在集成电路基板上形成金刚石金属填充图案的方法和组合物。在集成电路基板上方形成金属层，然后将其图案化，从而形成金属线。然后，在形成在集成电路基板上的金属线的上方和邻近的至少一个上形成多个菱形金属区域，使得集成电路基板上的金属的密度大于规定的密度，从而确保在金属线之上形成的电介质的表面在对介电层施加CMP之后基本保持平坦。

6. 发明授权

US5504395A Lamp bulb having integrated RFI suppression and method of restricting RFI to selected level 失效
标题翻译：具有集成RFI抑制的灯泡和将RFI限制在选定电平的方法
公开(公告)号：US5504395A
公开(公告)日：1996-04-02
申请号：US202368
申请日：1994-03-04
申请人： Samuel A. Johnson , Patrick Roblin , Chih-Ju Hung , Veng-Chong Lau
发明人： Samuel A. Johnson , Patrick Roblin , Chih-Ju Hung , Veng-Chong Lau
IPC分类号： H01K1/62 , H01R33/945 , H05B39/08 , H05B39/04
CPC分类号： H05B39/08 , H01K1/62 , H01R33/9453 , Y10S323/908
摘要： An incandescent lamp bulb which is driven by an electronic control module (ECM) and method of manufacture characterized in that an inductor comprising a magnetic element and a winding thereon is disposed within a screw shell base of the lamp bulb and surrounds the lamp exhaust tube therein. One end of the winding on the magnetic element is connected to a filament wire within the screw shell base and the other end of the inductive winding is connected to an output terminal of the ECM control module. In this manner, the inductor significantly reduces the di/dt rise time of voltage and current when a triac within the ECM module is driven to conduction on each one half cycle of the applied AC line voltage. This operation in turn produces a substantial reduction in radio frequency interference, both of radiation transmitted into space from the lamp bulb and by direct DC coupling back into the AC line voltage source. In a preferred embodiment, the di/dt rise time is calculated mathematically based on a Fourier series transformation of the current conducted through the filament by the triac.
摘要翻译：一种由电子控制模块（ECM）驱动的白炽灯泡及其制造方法，其特征在于，包括磁性元件和绕组的电感器设置在灯泡的螺旋壳体底座内并围绕灯泡排气管。磁性元件上的绕组的一端连接到螺旋壳体底座内的细丝线，并且感应绕组的另一端连接到ECM控制模块的输出端子。以这种方式，当ECM模块中的三端双向可控硅开关在所施加的AC线路电压的每一个半周期被驱动为导通时，电感器显着地减小了电压和电流的di / dt上升时间。这种操作又产生射频干扰的显着降低，辐射从灯泡传播到空间中，并且通过直接DC耦合回到AC线路电压源。在优选实施例中，di / dt上升时间是基于通过三端双向可控硅开关导通的灯丝的电流的傅立叶级数变换而以数学方式计算的。

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