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1. 发明申请

US20120181620A1 Structure and Fabrication of Field-effect Transistor for Alleviating Short-channel Effects and/or Reducing Junction Capacitance 审中-公开
公开(公告)号：US20120181620A1
公开(公告)日：2012-07-19
申请号：US12833844
申请日：2010-07-09
申请人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala , Chih Sieh Teng , Chin-Miin Shyu
发明人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala , Chih Sieh Teng , Chin-Miin Shyu
IPC分类号： H01L27/092
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 μm deep into the body material but not more than 0.1 μm deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.

2. 发明授权

US07879669B1 Fabrication of field-effect transistor with reduced junction capacitance and threshold voltage of magnitude that decreases with increasing channel length 有权
标题翻译：具有减小的结电容和阈值电压的场效应晶体管的制造随着沟道长度的增加而减小
公开(公告)号：US07879669B1
公开(公告)日：2011-02-01
申请号：US11527265
申请日：2006-09-25
申请人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
发明人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L29/78
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： At least one source/drain zone (140, 142, 160, or 162) of an enhancement-mode insulated-gate field-effect transistor (120 or 122) is provided with graded junction characteristics to reduce junction capacitance, thereby increasing switching speed. Each graded junction source/drain zone contains a main portion (140M, 142M, 160M, or 162M) and a more lightly doped lower portion (140L, 142L, 160L, or 162L) underlying, and vertically continuous with, the main portion. The magnitudes of the threshold voltages of a group of such transistors fabricated under the same post-layout fabrication process conditions so as to be of different channel lengths reach a maximum absolute value VTAM when the channel length is at a value LC, are at least 0.03 volt less than VTAM when the channel length is approximately 0.3 μm greater than LC, and materially decrease with increasing channel length when the channel length is approximately 1.0 μm greater than LC.
摘要翻译：提供增强型绝缘栅场效应晶体管（120或122）的至少一个源极/漏极区（140,142,160或162）具有渐变结特征以减小结电容，从而提高开关速度。每个分级接点源极/漏极区域包含主要部分（140M，142M，160M或162M）和在主要部分下面并垂直连续的较轻掺杂的下部分（140L，142L，160L或162L）。在通道长度为LC时，在相同布局前制造工艺条件下制造的一组这样的晶体管的阈值电压的幅度达到最大绝对值VTAM至少为0.03 当沟道长度比LC大约0.3μm时，小于VTAM的伏特，并且当沟道长度大于LC时大约1.0μm时，随着沟道长度的增加而实质上减小。

3. 发明申请

US20120181614A1 Structure and Fabrication of Field-effect Transistor for Alleviating Short-channel Effects and/or Reducing Junction Capacitance 审中-公开
标题翻译：用于缓解短沟道效应和/或降低结电容的场效晶体管的结构和制造
公开(公告)号：US20120181614A1
公开(公告)日：2012-07-19
申请号：US13309473
申请日：2011-12-01
申请人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
发明人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L27/088
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 μm deep into the body material but not more than 0.1 μm deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.
摘要翻译： IGFET（40或42）具有位于主体材料（50）中的通道区（64或84）。通过设置通道区域中的净掺杂剂浓度以在IGFET的源极/漏极区域（60和62或80和82）之间的位置处纵向达到局部表面最小值来减轻短通道阈值电压滚降和穿透，以及通过排列主体材料中的净掺杂剂浓度达到主体材料深度超过0.1μm的局部表面最大深度，但不超过体积材料的0.1μm深。 p沟道IGFET（120或122）的源极/漏极区（140和142或160和162）具有渐变结特征以减小结电容，从而提高开关速度。

4. 发明授权

US06797576B1 Fabrication of p-channel field-effect transistor for reducing junction capacitance 有权
标题翻译：用于减小结电容的p沟道场效应晶体管的制造
公开(公告)号：US06797576B1
公开(公告)日：2004-09-28
申请号：US10327352
申请日：2002-12-20
申请人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
发明人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L21336
CPC分类号： H01L29/66492 , H01L21/26586 , H01L21/823807 , H01L21/823892 , H01L29/1045 , H01L29/105 , H01L29/665
摘要： An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.1 &mgr;m deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.
摘要翻译： IGFET（40或42）具有位于主体材料（50）中的通道区（64或84）。通过设置通道区域中的净掺杂剂浓度以在IGFET的源极/漏极区域（60和62或80和82）之间的位置处纵向达到局部表面最小值来减轻短通道阈值电压滚降和穿透，以及通过布置主体材料中的净掺杂剂浓度达到主体材料深度超过0.1μm的局部地下最大深度，但不超过0.1μm深的主体材料。 p沟道IGFET（120或122）的源极/漏极区（140和142或160和162）具有渐变结特征以减小结电容，从而提高开关速度。

5. 发明申请

US20120273880A1 Structure and Fabrication of Field-effect Transistor for Alleviating Short-channel Effects and/or Reducing Junction Capacitance 审中-公开
公开(公告)号：US20120273880A1
公开(公告)日：2012-11-01
申请号：US12912612
申请日：2010-10-26
申请人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
发明人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L27/088 , H01L21/336 , H01L21/8234 , H01L29/78
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 μm deep into the body material but not more than 0.1 μm deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.

6. 发明授权

US07145191B1 P-channel field-effect transistor with reduced junction capacitance 有权
标题翻译：具有减小的结电容的P沟道场效应晶体管
公开(公告)号：US07145191B1
公开(公告)日：2006-12-05
申请号：US10922035
申请日：2004-08-18
申请人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
发明人： Chih Sieh Teng , Constantin Bulucea , Chin-Miin Shyu , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L29/76
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed. Each source/drain zone contains a main portion (140M, 142M, 160M, or 162M) and a more lightly doped lower portion (140L, 142L, 160L, or 162L) underlying, and vertically continuous with, the main portion.
摘要翻译： p沟道IGFET（120或122）的源极/漏极区（140和142或160和162）具有渐变结特征以减小结电容，从而提高开关速度。每个源极/漏极区域包含主要部分（140M，142M，160M，或162M）和较轻掺杂的下部分（140L，142L，160L或162L），并且垂直连续，主要部分。

7. 发明授权

US07700980B1 Structure and fabrication of field-effect transistor for alleviating short-channel effects 有权
标题翻译：用于减轻短沟道效应的场效晶体管的结构和制造
公开(公告)号：US07700980B1
公开(公告)日：2010-04-20
申请号：US11975278
申请日：2007-10-17
申请人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
发明人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L31/112
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： Each of a pair of like-polarity IGFETs (40 or 42 and 240 or 242) has a channel zone (64 or 84) situated in body material (50). Short-channel effects are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 μm deep into the body material but not more than 0.4 μm deep into the body material. A pocket portion (100/102 or 104) extends along both source drain zones of one of the IGFETs. A pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other IGFET so that it is an asymmetrical device.
摘要翻译：一对相同极性的IGFET（40或42和240或242）中的每一个具有位于主体材料（50）中的通道区（64或84）。通过设置沟道区域中的净掺杂剂浓度以在IGFET的源极/漏极区域（60和62或80和82）之间的位置处纵向达到局部表面最小值并且通过布置净掺杂剂来缓解短沟道效应在身体材料中的浓度达到局部地下最大超过0.1μm深的身体材料，但不超过0.4μm深入身体材料。袋部分（100/102或104）沿着IGFET之一的两个源极漏极区延伸。袋部分（244或246）沿着另一个IGFET的源极/漏极区域中的一个较大地延伸，使得它是不对称的装置。

8. 发明授权

US07701005B1 Semiconductor structure in which like-polarity insulated-gate field-effect transistors have multiple vertical body dopant concentration maxima and different halo pocket characteristics 有权
标题翻译：其中类似极性绝缘栅场效应晶体管具有多个垂直体掺杂浓度最大值和不同晕圈特征的半导体结构
公开(公告)号：US07701005B1
公开(公告)日：2010-04-20
申请号：US11974751
申请日：2007-10-15
申请人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
发明人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L29/80
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： Each of a pair of differently configured like-polarity insulated-gate field-effect transistors (40 or 42 and 240 or 242) in a semiconductor structure has a channel zone of semiconductor body material, a gate dielectric layer overlying the channel zone, and a gate electrode overlying the gate dielectric layer. For each transistor, the net dopant concentration of the body material reaches multiple local subsurface maxima below a channel surface depletion region and below largely all gate-electrode material overlying the channel zone. The transistors have source/drain zones (60 or 80) of opposite conductivity type to, and halo pocket portions of the same conductivity type as, the body material. One pocket portion (100/102 or 104) extends along both source/drain zones of one of the transistors. Another pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other transistor so that it is asymmetrical.
摘要翻译：半导体结构中的一对不同构造的相同极性的绝缘栅场效应晶体管（40或42和240或242）中的每一个具有半导体主体材料的沟道区，覆盖沟道区的栅介质层和覆盖栅介电层的栅电极。对于每个晶体管，主体材料的净掺杂剂浓度在沟道表面耗尽区下方达到多个局部地下极大值，并且大部分覆盖在沟道区上方的所有栅电极材料。晶体管具有与主体材料相同的导电类型的源极/漏极区域（60或80）以及与主体材料相同的导电类型的卤素口袋部分。一个口袋部分（100/102或104）沿着一个晶体管的源极/漏极区域延伸。另一个口袋部分（244或246）沿着另一个晶体管的源极/漏极区域中的一个较大地延伸，使得它是不对称的。

9. 发明授权

US07595244B1 Fabrication of like-polarity insulated-gate field-effect transistors having multiple vertical body dopant concentration maxima and different halo pocket characteristics 有权
标题翻译：具有多个垂直体掺杂浓度最大值和不同晕圈特征的同极性绝缘栅场效应晶体管的制造
公开(公告)号：US07595244B1
公开(公告)日：2009-09-29
申请号：US11975042
申请日：2007-10-16
申请人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
发明人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L21/336
CPC分类号： H01L29/1083 , H01L21/823807 , H01L21/823814 , H01L29/105
摘要： Fabrication of two differently configured like-polarity insulated-gate field-effect transistors (40 or 42 and 240 or 242) entails introducing multiple body-material semiconductor dopants of the same conductivity type into a semiconductor body. Gate electrodes (74 or 94) are defined such that each body-material dopant reaches a maximum concentration below the channel surface depletion regions, below all gate-electrode material overlying the channel zones (64 or 84), and at a different depth than each other body-material dopant. The transistors are provided with source/drain zones (60 or 80) of opposite conductivity type to, and with halo pocket portions of the same conductivity type as, the body-material dopants. One pocket portion (100/102 or 104) extends along both source/drain zones of one of the transistors. Another pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other transistor so that it is asymmetrical.
摘要翻译：两个不同构造的同极性绝缘栅场效应晶体管（40或42和240或242）的制造需要将相同导电类型的多个体材料半导体掺杂剂引入半导体本体。限定栅电极（74或94），使得每个主体材料掺杂剂在沟道表面耗尽区下方达到最大浓度，低于覆盖沟道区（64或84）的所有栅电极材料，并且在不同于每个其他体材料掺杂剂。晶体管具有与体材料掺杂剂相同的导电类型的源极/漏极区（60或80）以及具有相同导电类型的卤素口袋部分。一个口袋部分（100/102或104）沿着一个晶体管的源极/漏极区域延伸。另一个口袋部分（244或246）沿着另一个晶体管的源极/漏极区域中的一个较大地延伸，使得它是不对称的。

10. 发明授权

US06599804B2 Fabrication of field-effect transistor for alleviating short-channel effects 有权
标题翻译：用于减轻短沟道效应的场效晶体管的制造
公开(公告)号：US06599804B2
公开(公告)日：2003-07-29
申请号：US09947012
申请日：2001-09-04
申请人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
发明人： Constantin Bulucea , Fu-Cheng Wang , Prasad Chaparala
IPC分类号： H01L21336
CPC分类号： H01L29/66492 , H01L21/26586 , H01L21/823807 , H01L21/823892 , H01L29/1045 , H01L29/105 , H01L29/665
摘要： Short-channel threshold voltage roll-off and punchthrough in an IGFET (40 or 42) having a channel zone (64 or 84) situated in body material (50) are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.4 &mgr;m deep into the body material.
摘要翻译：通过设置通道区域中的净掺杂剂浓度以纵向到达，减轻了具有位于主体材料（50）中的通道区（64或84）的IGFET（40或42）中的短通道阈值电压滚降和穿通在IGFET源极/漏极区（60和62或80和82）之间的位置处的局部表面最小值，并且通过布置主体材料中的净掺杂剂浓度达到超过0.1μm深的主体材料的局部地下最大值但不超过0.4 mum深入身材。

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