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1. 发明授权

US08785995B2 Ferroelectric semiconductor transistor devices having gate modulated conductive layer 有权
标题翻译：具有栅极调制导电层的铁电半导体晶体管器件
公开(公告)号：US08785995B2
公开(公告)日：2014-07-22
申请号：US13108340
申请日：2011-05-16
申请人： Catherine A. Dubourdieu , David J. Frank , Martin M. Frank , Vijay Narayanan , Paul M. Solomon , Thomas N. Theis
发明人： Catherine A. Dubourdieu , David J. Frank , Martin M. Frank , Vijay Narayanan , Paul M. Solomon , Thomas N. Theis
IPC分类号： H01L21/02 , H01L21/00
CPC分类号： H01L29/4232 , H01L29/42316 , H01L29/812
摘要： Ferroelectric semiconductor switching devices are provided, including field effect transistor (FET) devices having gate stack structures formed with a ferroelectric layer disposed between a gate contact and a thin conductive layer (“quantum conductive layer”). The gate contact and ferroelectric layer serve to modulate an effective work function of the thin conductive layer. The thin conductive layer with the modulated work function is coupled to a semiconductor channel layer to modulate current flow through the semiconductor and achieve a steep sub-threshold slope.
摘要翻译：提供了铁电半导体开关器件，包括具有栅极叠层结构的场效应晶体管（FET）器件，栅极叠层结构形成有设置在栅极接触和薄导电层（“量子传导层”）之间的铁电层。栅极接触和铁电层用于调制薄导电层的有效功函数。具有调制功函数的薄导电层耦合到半导体沟道层，以调制通过半导体的电流，并实现陡峭的子阈值斜率。

2. 发明授权

US08890112B2 Controlling ferroelectricity in dielectric films by process induced uniaxial strain 有权
标题翻译：通过工艺诱导的单轴应变控制电介质薄膜的铁电性
公开(公告)号：US08890112B2
公开(公告)日：2014-11-18
申请号：US13557385
申请日：2012-07-25
申请人： Catherine A. Dubourdieu , Martin M. Frank
发明人： Catherine A. Dubourdieu , Martin M. Frank
IPC分类号： H01L21/02 , H01L29/66 , H01L49/02 , H01L29/78 , H01L21/28
CPC分类号： H01L21/28291 , H01L28/55 , H01L29/66636 , H01L29/6684 , H01L29/7804 , H01L29/78391 , H01L29/7843 , H01L29/7848
摘要： A method of controlling ferroelectric characteristics of integrated circuit device components includes forming a ferroelectrically controllable dielectric layer over a substrate; and forming a stress exerting structure proximate the ferroelectrically controllable dielectric layer such that a substantially uniaxial strain is induced in the ferroelectrically controllable dielectric layer by the stress exerting structure; wherein the ferroelectrically controllable dielectric layer comprises one or more of: a ferroelectric oxide layer and a normally non-ferroelectric material layer that does not exhibit ferroelectric properties in the absence of an applied stress.
摘要翻译：控制集成电路器件部件的铁电特性的方法包括在衬底上形成铁电可控的电介质层; 以及在所述铁电可控电介质层附近形成应力施加结构，使得通过所述应力施加结构在所述铁电可控电介质层中诱发基本上单轴应变; 其中所述铁电可控介电层包括以下中的一种或多种：在没有施加应力的情况下不表现出铁电性能的铁电氧化物层和正常非铁电材料层。

3. 发明授权

US08389300B2 Controlling ferroelectricity in dielectric films by process induced uniaxial strain 有权
标题翻译：通过工艺诱导的单轴应变控制电介质薄膜的铁电性
公开(公告)号：US08389300B2
公开(公告)日：2013-03-05
申请号：US12753270
申请日：2010-04-02
申请人： Catherine A. Dubourdieu , Martin M. Frank
发明人： Catherine A. Dubourdieu , Martin M. Frank
IPC分类号： H01L21/00
CPC分类号： H01L21/28291 , H01L28/55 , H01L29/66636 , H01L29/6684 , H01L29/7804 , H01L29/78391 , H01L29/7843 , H01L29/7848
摘要： A method of controlling ferroelectric characteristics of integrated circuit device components includes forming a ferroelectrically controllable dielectric layer over a substrate; and forming a stress exerting structure proximate the ferroelectrically controllable dielectric layer such that a substantially uniaxial strain is induced in the ferroelectrically controllable dielectric layer by the stress exerting structure; wherein the ferroelectrically controllable dielectric layer comprises one or more of: a ferroelectric oxide layer and a normally non-ferroelectric material layer that does not exhibit ferroelectric properties in the absence of an applied stress.
摘要翻译：控制集成电路器件部件的铁电特性的方法包括在衬底上形成铁电可控的电介质层; 以及在所述铁电可控电介质层附近形成应力施加结构，使得通过所述应力施加结构在所述铁电可控电介质层中诱发基本上单轴应变; 其中所述铁电可控介电层包括以下中的一种或多种：在没有施加应力的情况下不表现出铁电性能的铁电氧化物层和正常非铁电材料层。

4. 发明授权

US08559217B2 Phase change material cell with stress inducer liner 有权
标题翻译：相变材料电池与应力诱导衬管
公开(公告)号：US08559217B2
公开(公告)日：2013-10-15
申请号：US12964980
申请日：2010-12-10
申请人： Catherine A. Dubourdieu , Martin M. Frank , Bipin Rajendran , Alejandro G. Schrott
发明人： Catherine A. Dubourdieu , Martin M. Frank , Bipin Rajendran , Alejandro G. Schrott
IPC分类号： G11C11/00
CPC分类号： H01L45/1608 , G11C11/22 , G11C13/0004 , G11C13/0069 , G11C2013/0095 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/143 , H01L45/144
摘要： An example embodiment disclosed is a phase change memory cell. The memory cell includes a phase change material and a transducer positioned proximate the phase change material. The phase change material is switchable between at least an amorphous state and a crystalline state. The transducer is configured to activate when the phase change material is changed from the amorphous state to the crystalline state. In a particular embodiment, the transducer is ferroelectric material.
摘要翻译：所公开的示例实施例是相变存储单元。存储单元包括相变材料和位于相变材料附近的换能器。相变材料可在至少非晶状态和结晶状态之间切换。换能器被配置为当相变材料从非晶状态转变为结晶状态时激活。在特定实施例中，换能器是铁电材料。

5. 发明申请

US20120292677A1 FERROELECTRIC SEMICONDUCTOR TRANSISTOR DEVICES HAVING GATE MODULATED CONDUCTIVE LAYER 有权
标题翻译：具有门控调制导电层的电磁半导体晶体管器件
公开(公告)号：US20120292677A1
公开(公告)日：2012-11-22
申请号：US13108340
申请日：2011-05-16
申请人： Catherine A. Dubourdieu , David J. Frank , Martin M. Frank , Vijay Narayanan , Paul M. Solomon , Thomas N. Theis
发明人： Catherine A. Dubourdieu , David J. Frank , Martin M. Frank , Vijay Narayanan , Paul M. Solomon , Thomas N. Theis
IPC分类号： H01L29/772
CPC分类号： H01L29/4232 , H01L29/42316 , H01L29/812
摘要： Ferroelectric semiconductor switching devices are provided, including field effect transistor (FET) devices having gate stack structures formed with a ferroelectric layer disposed between a gate contact and a thin conductive layer (“quantum conductive layer”) . The gate contact and ferroelectric layer serve to modulate an effective work function of the thin conductive layer. The thin conductive layer with the modulated work function is coupled to a semiconductor channel layer to modulate current flow through the semiconductor and achieve a steep sub-threshold slope.
摘要翻译：提供了铁电半导体开关器件，包括具有栅极叠层结构的场效应晶体管（FET）器件，栅极堆叠结构形成有设置在栅极接触和薄导电层（量子导电层）之间的铁电层。栅极接触和铁电层用于调制薄导电层的有效功函数。具有调制功函数的薄导电层耦合到半导体沟道层，以调制通过半导体的电流，并实现陡峭的子阈值斜率。

6. 发明申请

US20120286340A1 CONTROLLING FERROELECTRICITY IN DIELECTRIC FILMS BY PROCESS INDUCED UNIAXIAL STRAIN 有权
标题翻译：通过过程诱导的单相菌株控制电介质膜中的电磁
公开(公告)号：US20120286340A1
公开(公告)日：2012-11-15
申请号：US13557385
申请日：2012-07-25
申请人： Martin M. Frank , Catherine A. Dubourdieu
发明人： Martin M. Frank , Catherine A. Dubourdieu
IPC分类号： H01L29/24
CPC分类号： H01L21/28291 , H01L28/55 , H01L29/66636 , H01L29/6684 , H01L29/7804 , H01L29/78391 , H01L29/7843 , H01L29/7848
摘要： A method of controlling ferroelectric characteristics of integrated circuit device components includes forming a ferroelectrically controllable dielectric layer over a substrate; and forming a stress exerting structure proximate the ferroelectrically controllable dielectric layer such that a substantially uniaxial strain is induced in the ferroelectrically controllable dielectric layer by the stress exerting structure; wherein the ferroelectrically controllable dielectric layer comprises one or more of: a ferroelectric oxide layer and a normally non-ferroelectric material layer that does not exhibit ferroelectric properties in the absence of an applied stress.
摘要翻译：控制集成电路器件部件的铁电特性的方法包括在衬底上形成铁电可控的电介质层; 以及在所述铁电可控电介质层附近形成应力施加结构，使得通过所述应力施加结构在所述铁电可控电介质层中诱发基本上单轴应变; 其中所述铁电可控介电层包括以下中的一种或多种：在没有施加应力的情况下不表现出铁电性能的铁电氧化物层和正常非铁电材料层。

7. 发明申请

US20120147666A1 PHASE CHANGE MATERIAL CELL WITH STRESS INDUCER LINER 有权
标题翻译：相变材料细胞与应力诱导器衬里
公开(公告)号：US20120147666A1
公开(公告)日：2012-06-14
申请号：US12964980
申请日：2010-12-10
申请人： Catherine A. Dubourdieu , Martin M. Frank , Bipin Rajendran , Alejandro G. Schrott
发明人： Catherine A. Dubourdieu , Martin M. Frank , Bipin Rajendran , Alejandro G. Schrott
IPC分类号： G11C11/21 , H01L21/02
CPC分类号： H01L45/1608 , G11C11/22 , G11C13/0004 , G11C13/0069 , G11C2013/0095 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/143 , H01L45/144
摘要： An example embodiment disclosed is a phase change memory cell. The memory cell includes a phase change material and a transducer positioned proximate the phase change material. The phase change material is switchable between at least an amorphous state and a crystalline state. The transducer is configured to activate when the phase change material is changed from the amorphous state to the crystalline state. In a particular embodiment, the transducer is ferroelectric material.
摘要翻译：所公开的示例实施例是相变存储单元。存储单元包括相变材料和位于相变材料附近的换能器。相变材料可在至少非晶状态和结晶状态之间切换。换能器被配置为当相变材料从非晶状态转变为结晶状态时激活。在特定实施例中，换能器是铁电材料。

8. 发明申请

US20110241091A1 CONTROLLING FERROELECTRICITY IN DIELECTRIC FILMS BY PROCESS INDUCED UNIAXIAL STRAIN 有权
标题翻译：通过过程诱导的单相菌株控制电介质膜中的电磁
公开(公告)号：US20110241091A1
公开(公告)日：2011-10-06
申请号：US12753270
申请日：2010-04-02
申请人： Catherine A. Dubourdieu , Martin M. Frank
发明人： Catherine A. Dubourdieu , Martin M. Frank
IPC分类号： H01L29/82 , H01L21/283 , H01L29/92
CPC分类号： H01L21/28291 , H01L28/55 , H01L29/66636 , H01L29/6684 , H01L29/7804 , H01L29/78391 , H01L29/7843 , H01L29/7848
摘要： A method of controlling ferroelectric characteristics of integrated circuit device components includes forming a ferroelectrically controllable dielectric layer over a substrate; and forming a stress exerting structure proximate the ferroelectrically controllable dielectric layer such that a substantially uniaxial strain is induced in the ferroelectrically controllable dielectric layer by the stress exerting structure; wherein the ferroelectrically controllable dielectric layer comprises one or more of: a ferroelectric oxide layer and a normally non-ferroelectric material layer that does not exhibit ferroelectric properties in the absence of an applied stress.
摘要翻译：控制集成电路器件部件的铁电特性的方法包括在衬底上形成铁电可控的电介质层; 以及在所述铁电可控电介质层附近形成应力施加结构，使得通过所述应力施加结构在所述铁电可控电介质层中诱发基本上单轴应变; 其中所述铁电可控介电层包括以下中的一种或多种：在没有施加应力的情况下不表现出铁电性能的铁电氧化物层和正常非铁电材料层。

9. 发明授权

US08941169B2 Floating gate device with oxygen scavenging element 有权
标题翻译：带除氧元件的浮闸装置
公开(公告)号：US08941169B2
公开(公告)日：2015-01-27
申请号：US13550102
申请日：2012-07-16
申请人： Martin M. Frank
发明人： Martin M. Frank
IPC分类号： H01L29/788 , H01L21/28 , H01L27/115
CPC分类号： H01L21/28273 , H01L27/11521
摘要： A floating gate device is provided. A tunnel oxide layer is formed over the channel. A floating gate is formed over the tunnel oxide layer. A high-k dielectric layer is formed over the floating gate. A control gate is formed over the high-k dielectric layer. At least one of the control gate and/or the floating gate includes an oxygen scavenging element. The oxygen scavenging element is configured to decrease an oxygen density at least one of at a first interface between the control gate and the high-k dielectric layer, at a second interface between the high-k dielectric layer and the floating gate, at a third interface between the floating gate and the tunnel oxide layer, and at a fourth interface between the tunnel oxide layer and the channel responsive to annealing.
摘要翻译：提供浮动门装置。在通道上形成隧道氧化物层。在隧道氧化物层上形成浮栅。在浮栅上形成高k电介质层。在高k电介质层上形成控制栅极。控制栅极和/或浮动栅极中的至少一个包括氧气清除元件。氧清除元件被配置为在第k个高k介电层和浮动栅极之间的第二界面处，在第三个控制栅极和高k电介质层之间的第一界面处的至少一个处降低氧气密度界面在浮动栅极和隧道氧化物层之间，并且在隧道氧化物层和沟道之间的第四界面响应于退火。

10. 发明授权

US08674456B2 High-K transistors with low threshold voltage 有权
标题翻译：具有低阈值电压的高K晶体管
公开(公告)号：US08674456B2
公开(公告)日：2014-03-18
申请号：US13442090
申请日：2012-04-09
申请人： Martin M. Frank
发明人： Martin M. Frank
IPC分类号： H01L29/66 , H01L27/12 , H01L21/02
CPC分类号： H01L21/28247 , H01L21/2807 , H01L21/28079 , H01L21/28088 , H01L21/28176 , H01L21/3105 , H01L21/326 , H01L21/823842 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： An apparatus includes a wafer annealing tool and a plurality of electrodes coupled to the wafer annealing tool, wherein the electrodes are configured to be in physical contact with a wafer so that, when the wafer is annealed, a negative electrical bias is formed across one or more gate stacks of the wafer.
摘要翻译：一种设备包括晶片退火工具和耦合到晶片退火工具的多个电极，其中电极被配置为与晶片物理接触，使得当晶片退火时，负电偏压跨越一个或更多的晶片堆叠。

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