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1. 发明授权

US4099137A High speed phase lock control for frequency switching 失效
标题翻译：用于频率切换的高速锁相控制
公开(公告)号：US4099137A
公开(公告)日：1978-07-04
申请号：US805498
申请日：1977-06-10
申请人： Benjamin C. Alm, Jr. , Francis W. Hopwood , Robert A. Jelen , John P. Muhlbaier , Joseph F. Wright, Jr.
发明人： Benjamin C. Alm, Jr. , Francis W. Hopwood , Robert A. Jelen , John P. Muhlbaier , Joseph F. Wright, Jr.
IPC分类号： G01S7/28 , H03L7/189 , H03B3/08
CPC分类号： H03L7/189 , G01S7/28
摘要： A digitally controlled microwave phase lock loop for switching rapidly from one lock frequency to another is disclosed. A digital word corresponding to a desired input voltage for a selected frequency is converted to an analog voltage for application to the coarse tuning port of the loop's voltage controlled oscillator. Prior to switching to another frequency, the error voltage for the fine tuning port is compared with a zero error reference voltage. The least significant bit of the digital word for such frequency is increased or decreased by one depending on the direction difference between the compared voltages. This incrementally changed word controls the coarse tuning voltage during the next selection of the particular frequency. The system is initialized by repetitively selecting each of the possible frequencies until the digital word for each selected frequency is within one increment of the zero error reference voltage for the fine tuning port.
摘要翻译：公开了一种用于从一个锁定频率快速切换到另一个锁定频率的数字控制的微波相位锁定环。对应于所选频率的期望输入电压的数字字转换为模拟电压，以供应给环路压控振荡器的粗调端口。在切换到另一个频率之前，将微调端口的误差电压与零误差参考电压进行比较。这种频率的数字字的最低有效位根据所比较的电压之间的方向差增加或减小一个。这个增量变化的字在下一次特定频率的选择期间控制粗调谐电压。通过重复选择每个可能的频率来初始化系统，直到每个选定频率的数字字都在微调端口的零误差参考电压的一个增量内。

2. 发明授权

US4318055A Digitally controlled phase lock distillator system 失效
标题翻译：数字控制相锁系统
公开(公告)号：US4318055A
公开(公告)日：1982-03-02
申请号：US70232
申请日：1979-08-27
申请人： Francis W. Hopwood , John P. Muhlbaier , Jeffrey T. Oakes , James T. Haynes
发明人： Francis W. Hopwood , John P. Muhlbaier , Jeffrey T. Oakes , James T. Haynes
IPC分类号： H03L7/08 , H03L7/16
CPC分类号： H03L7/16 , H03L7/08
摘要： A system for comparing the frequency of a voltage controlled oscillator to a stable reference oscillator to generate control signals which maintain the voltage controlled oscillator in phase lock with the reference oscillator. The circuit utilizes a digital frequency comparator to determine whether the output frequency of the voltage controlled oscillator is above or below the reference frequency. When the frequency of the oscillator is either above or below the desired value, pulses are generated which are integrated to produce a DC signal which changes the frequency of the oscillator to achieve the desired value. Additionally, a continuous electrical signal is generated when the output of the voltage controlled oscillator is in phase with the reference signal. When phase lock is achieved the output of the frequency determining circuit goes to zero and phase lock is maintained by the continuous electrical signal.
摘要翻译：用于将压控振荡器的频率与稳定的参考振荡器进行比较以产生控制信号的系统，该控制信号使压控振荡器与参考振荡器锁相。电路利用数字频率比较器来确定压控振荡器的输出频率是否高于或低于参考频率。当振荡器的频率高于或低于期望值时，产生脉冲，其被积分以产生改变振荡器频率以获得期望值的DC信号。此外，当压控振荡器的输出与参考信号同相时，产生连续的电信号。当实现锁相时，频率确定电路的输出变为零，并通过连续的电信号保持相位锁定。

3. 发明授权

US4096445A Electromechanical vibration filter for radar master oscillators 失效
标题翻译：雷达主振荡器的机电振动滤波器
公开(公告)号：US4096445A
公开(公告)日：1978-06-20
申请号：US789487
申请日：1977-04-21
申请人： Francis W. Hopwood , John P. Muhlbaier , Herman Rossman
发明人： Francis W. Hopwood , John P. Muhlbaier , Herman Rossman
IPC分类号： G01S7/28 , H03L1/00 , H03L7/06 , H03B3/04
CPC分类号： G01S7/28 , H03L1/00 , H03L7/06
摘要： A vibration noise filtering system for use in airborne radar master oscillator, RMO, systems is disclosed. Master and slave crystal oscillators are used, the slave oscillator being phase locked to the master oscillator governed by a phase locked loop, PLL, having a predetermined low frequency bandwidth. The master oscillator is structurally coupled directly to a source of vibration of the aircraft, while the slave oscillator is isolated and supported from the vibration source by a mechanical passive isolator having a resonant frequency well within the low frequency bandwidth of the PLL. The output of the slave oscillator which is the source of the RMO signal has a phase spectral density within the phase stability requirements of a typical RMO across the operating modulating frequency ranges of both air-to-ground and air-to-air radar modes.
摘要翻译：公开了一种用于机载雷达主振荡器，RMO系统的振动噪声滤波系统。使用主从晶体振荡器，从振荡器被锁相到由具有预定低频带宽的锁相环（PLL）控制的主振荡器。主振荡器在结构上直接耦合到飞行器的振动源，而从振荡器通过在PLL的低频带宽内具有谐振频率的机械无源隔离器从振动源隔离和支撑。作为RMO信号源的从属振荡器的输出在空对地和空对空雷达模式的操作调制频率范围内具有典型RMO的相位稳定性要求内的相位频谱密度。

4. 发明授权

US5166629A Direct frequency synthesizer 失效
标题翻译：直接频率合成器
公开(公告)号：US5166629A
公开(公告)日：1992-11-24
申请号：US714403
申请日：1991-04-26
申请人： Grant H. Watkins , John P. Muhlbaier
发明人： Grant H. Watkins , John P. Muhlbaier
IPC分类号： H03B21/01 , H03B21/04
CPC分类号： H03B21/01 , H03B21/04
摘要： A direct frequency synthesizer is provided with a single stage or multiple cascaded stages. Each stage includes a fixed frequency input channel and a selectable frequency input channel which are coupled respectively to the I and L ports of a mixer. The input channel includes a divider having a divisor equal to N. The selectable frequencies range from f.sub.1 to f.sub.1 +j.theta.. Single-pole-multiple-throw switches selectively connect the fixed and selectable frequencies to the mixer to generate output frequency signals through an output filter bank. Specific relationships among N, n and .theta. are used to establish continuous output frequency coverage, stage cascadability and other synthesizer operating features.
摘要翻译：直接频率合成器具有单级或多级联级。每个级包括分别耦合到混频器的I和L端口的固定频率输入通道和可选频率输入通道。输入通道包括具有等于N的除数的分频器。可选择的频率范围从f1到f1 + j。单极多掷开关选择性地将固定和可选择的频率连接到混频器，以通过输出滤波器组产生输出频率信号。 N，n和theta之间的具体关系用于建立连续的输出频率覆盖，阶段级联和其他合成器的操作特性。

5. 发明授权

US5661439A Method and apparatus for cancelling phase noise 失效
标题翻译：消除相位噪声的方法和装置
公开(公告)号：US5661439A
公开(公告)日：1997-08-26
申请号：US680287
申请日：1996-07-11
申请人： Grant H. Watkins , Stephen P. Caldwell , Matthew Martello , John P. Muhlbaier
发明人： Grant H. Watkins , Stephen P. Caldwell , Matthew Martello , John P. Muhlbaier
IPC分类号： H03B1/04 , H03L7/02 , H03B28/00 , H03L7/00
CPC分类号： H03B1/04 , H03L7/02 , H03B2202/027 , H03B2202/076
摘要： A frequency oscillator and a frequency multiplier multiplying the signals from the oscillator contain inherent phase noise. A phase noise canceller removes phase noise, due to both the oscillator and the multiplier, by inserting a delay in one path and comparing phases of the delayed signal and the undelayed signal. This comparison may be either fed back to the tuning port of the oscillator or fed forward to a phase shifter which shakes off the phase noise. The delay may include a delay line, a cavity or any other suitable device which produces a phase shift. The phase noise canceller may also be designed to remove the total phase noise of the system, including additive phase noise from sources other than the oscillator and multiplier. The canceller may be calibrated and may be designed to reduce periodic response thereof.
摘要翻译：将来自振荡器的信号相乘的频率振荡器和倍频器包含固有的相位噪声。相位噪声消除器通过在一个路径中插入延迟并且比较延迟信号和未延迟信号的相位来消除由于振荡器和乘法器两者引起的相位噪声。该比较可以被反馈到振荡器的调谐端口，或者被馈送到移相器，其移除相位噪声。延迟可以包括延迟线，空腔或产生相移的任何其它合适的装置。相位噪声消除器还可以被设计为去除系统的总相位噪声，包括来自振荡器和乘法器之外的源的相位相位噪声。消除器可以被校准，并且可以被设计为减少其周期性响应。

6. 发明授权

US5596290A Direct frequency synthesizer having moderate bandwidth 失效
标题翻译：直接频率合成器具有中等带宽
公开(公告)号：US5596290A
公开(公告)日：1997-01-21
申请号：US607924
申请日：1996-02-28
申请人： Grant H. Watkins , Norman G. Matthews , Aldez C. Hazzard , John P. Muhlbaier
发明人： Grant H. Watkins , Norman G. Matthews , Aldez C. Hazzard , John P. Muhlbaier
IPC分类号： H03B21/02 , H03B21/04 , H03B21/00 , H03B19/00 , H03K21/00
CPC分类号： H03B21/025 , H03B21/04
摘要： A low cost direct frequency synthesizer is structured to operate with moderate bandwidth, good noise performance, superior spurious performance, and fast switching. The direct frequency synthesizer employs a starter frequency signal f.sub.o (33-1) and a set of LO frequency signals f.sub.1 through f.sub.n (35-1) spaced from each other by a frequency increment .delta.. A mixer circuit (34-1) generates a product of the starter frequency signal and the LO frequency signals. A divider (31-1) has a divider ratio equal to N. The number of LO frequency signals is equal to or less than N. The starter frequency f.sub.o has a value equal to .delta. times (N+x) where x is equal to 0 or a positive integer. The LO frequency f.sub.1 has a value equal to (N+1)f.sub.o. An intermediate nonswitchable band pass filter (36-1) passes a difference portion of the mixer product to the divider, and a nonswitchable output band pass filter (38-1) receives an output from the divider to generate a moderate bandwidth output.
摘要翻译：低成本的直接频率合成器被构造为以适中带宽，良好的噪声性能，优异的杂散性能和快速切换运行。直接频率合成器采用启动频率信号fo（33-1）和一组LO频率信号f1至fn（35-1），彼此间隔一个频率增量delta。混频器电路（34-1）产生起动频率信号和LO频率信号的乘积。分频器（31-1）具有等于N的分频比.L0频率信号的数量等于或小于N.起动器频率fo具有等于Δ时间（N + x）的值，其中x等于 0或正整数。 LO频率f1具有等于（N + 1）fo的值。中间不可切换带通滤波器（36-1）将混频器产品的差分部分传递到分频器，并且不可切换输出带通滤波器（38-1）接收来自分频器的输出以产生中等带宽输出。

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