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1. 发明申请

US20160300955A1 THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME, DISPLAY SUBSTRATE, AND DISPLAY APPARATUS 有权
标题翻译：薄膜晶体管及其制造方法，显示基板和显示装置
公开(公告)号：US20160300955A1
公开(公告)日：2016-10-13
申请号：US14653134
申请日：2014-08-19
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Jingfei FANG , Chunsheng JIANG
IPC分类号： H01L29/786 , H01L21/477 , H01L27/12 , H01L29/24 , H01L29/66
CPC分类号： H01L29/78618 , H01L21/477 , H01L27/1225 , H01L27/127 , H01L29/24 , H01L29/42384 , H01L29/66969 , H01L29/786 , H01L29/78603 , H01L29/7869 , H01L29/78696
摘要： The present invention discloses a thin film transistor, a method of manufacturing the thin film transistor, a display substrate and a display apparatus. The method comprising steps of: forming an active material layer on a substrate; forming an etch barrier material layer on the active material layer, wherein the etch barrier material layer being made of a conductive material capable of blocking a source and drain etching liquid; forming an active layer pattern and an initial etch barrier layer pattern by performing a single patterning process on the active material layer and the etch barrier material layer, wherein the initial etch barrier layer pattern comprising a first region, a second region and a third region, the first region and the third region being regions for forming a source and a drain, respectively, the second region being a region of the initial etch barrier layer pattern except the first and third regions; forming the source and the drain in the first region and the third region, respectively, by a patterning process; converting the conductive material in the second region of the initial etch barrier layer pattern into an insulation material by an annealing process, so as to form an etch barrier layer.
摘要翻译：本发明公开了薄膜晶体管，薄膜晶体管的制造方法，显示基板和显示装置。该方法包括以下步骤：在衬底上形成活性材料层; 在所述活性材料层上形成蚀刻阻挡材料层，其中所述蚀刻阻挡材料层由能够阻挡源极和漏极蚀刻液体的导电材料制成; 通过在所述活性材料层和所述蚀刻阻挡材料层上执行单一图案化工艺来形成有源层图案和初始蚀刻阻挡层图案，其中所述初始蚀刻阻挡层图案包括第一区域，第二区域和第三区域，所述第一区域和所述第三区域分别是用于形成源极和漏极的区域，所述第二区域是除了所述第一和第三区域之外的所述初始蚀刻阻挡层图案的区域; 通过图案化工艺分别在第一区域和第三区域中形成源极和漏极; 通过退火处理将初始蚀刻阻挡层图案的第二区域中的导电材料转化为绝缘材料，以形成蚀刻阻挡层。

2. 发明申请

US20160043228A1 THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY APPARATUS 有权
标题翻译：薄膜晶体管，其制造方法，阵列基板和显示设备
公开(公告)号：US20160043228A1
公开(公告)日：2016-02-11
申请号：US14770369
申请日：2014-11-21
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Chunsheng JIANG , Lung Pao HSIN
IPC分类号： H01L29/786 , H01L21/441 , H01L21/02 , H01L27/12 , H01L21/425 , H01L29/06 , H01L21/768 , H01L23/522 , H01L29/66 , H01L29/24
CPC分类号： H01L29/7869 , H01L21/02565 , H01L21/425 , H01L21/441 , H01L21/76829 , H01L21/76877 , H01L23/5226 , H01L27/1225 , H01L27/124 , H01L27/127 , H01L29/0684 , H01L29/24 , H01L29/66969 , H01L29/78696 , H01L2924/0002 , H01L2924/00
摘要： A thin film transistor, a manufacturing method thereof, an array substrate and a display apparatus are disclosed. The manufacturing method includes forming a gate electrode (2), a gate insulating layer (3), an active region (4), a source electrode (5) and a drain electrode (6) on a base substrate (1) with the active region being formed of ZnON material, and implanting the active region (4) with nitrogen ion while it being formed, so as to make the sub-threshold swing amplitude of the thin film transistor less than or equal to 0.5 mV/dec. The manufacturing method reduces the sub-threshold swing amplitude of the thin film transistor and improves the semiconductor characteristics of the thin film transistor.
摘要翻译：公开了一种薄膜晶体管，其制造方法，阵列基板和显示装置。制造方法包括在基板（1）上形成栅电极（2），栅极绝缘层（3），有源区（4），源电极（5）和漏电极（6）区域由ZnON材料形成，并且在形成有源区域（4）时形成氮离子，以使薄膜晶体管的次阈值摆动振幅小于或等于0.5mV / dec。制造方法降低了薄膜晶体管的次阈摆幅，提高了薄膜晶体管的半导体特性。

3. 发明申请

US20170250076A1 Thin Film Transistor and Manufacturing Method Thereof, Array Substrate and Manufacturing Method Thereof, Display Apparatus 审中-公开
公开(公告)号：US20170250076A1
公开(公告)日：2017-08-31
申请号：US14905982
申请日：2015-08-12
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Wei LIU , Chunsheng JIANG
IPC分类号： H01L21/02 , H01L29/45 , H01L29/66 , H01L29/786 , H01L29/49 , H01L29/40
CPC分类号： H01L21/02614 , H01L21/02565 , H01L27/1225 , H01L29/408 , H01L29/45 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66969 , H01L29/7869
摘要： The present invention provides a thin film transistor and a manufacturing method thereof, an array substrate comprising the thin film transistor and a manufacturing method thereof, and a display apparatus comprising the array substrate. The manufacturing method of the thin film transistor comprises steps of forming a gate, a gate insulating layer, a semiconductor active layer, a source and a drain on a substrate, wherein the steps of forming the gate insulating layer and the semiconductor active layer comprise: preparing an insulating film, the insulating film comprises metal oxide insulating material; performing ion implantation on a predefined region of the insulating film, so that the metal oxide insulating material of partial-thickness of the insulating film in the predefined region is transformed into metal oxide semiconductor material to form the semiconductor active layer, and the rest of the insulating film forms the gate insulating layer.

4. 发明申请

US20170133403A1 ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME, AND DISPLAY DEVICE 审中-公开
公开(公告)号：US20170133403A1
公开(公告)日：2017-05-11
申请号：US15321812
申请日：2016-03-03
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Chunsheng JIANG
IPC分类号： H01L27/12 , H01L29/786 , H01L21/321 , H01L29/45
CPC分类号： H01L27/124 , H01L21/321 , H01L27/1248 , H01L27/1259 , H01L29/45 , H01L29/78618
摘要： The present disclose provides in some embodiments an array substrate and a method for fabricating the same, and a display device. The array substrate includes a source-drain metal layer formed on a base substrate and including copper, an alloy layer formed on the source-drain metal layer and including copper alloy, non-copper metal in the copper alloy being easier to be oxidized than copper in the copper alloy, a passivation layer formed on the alloy layer, and an oxide layer formed between the alloy layer and the passivation layer.

5. 发明申请

US20160343864A1 Thin-Film Transistor and Manufacturing Method Thereof, Array Substrate and Manufacturing Method Thereof, and Display Apparatus 有权
标题翻译：薄膜晶体管及其制造方法，阵列基板及其制造方法以及显示装置
公开(公告)号：US20160343864A1
公开(公告)日：2016-11-24
申请号：US14785816
申请日：2015-06-19
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Chunsheng JIANG , Xuyuan LI , Wei LIU
IPC分类号： H01L29/786 , H01L27/12 , H01L29/49 , H01L29/417 , H01L29/66 , H01L29/51
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/41733 , H01L29/4908 , H01L29/517 , H01L29/66969 , H01L29/786
摘要： A thin-film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display apparatus are provided. The method for manufacturing the TFT includes: forming a gate electrode, a gate insulating layer, a metal oxide semiconductor active layer, a source electrode and a drain electrode on a substrate; the forming the metal oxide semiconductor active layer includes: forming the metal oxide semiconductor active layer by electrochemical reaction. The method for manufacturing the TFT is applied in the production of the TFT and the array substrate and the display apparatus comprising the TFTs and provides a new method for forming the metal oxide semiconductor active layer.
摘要翻译：提供薄膜晶体管及其制造方法，阵列基板及其制造方法以及显示装置。 TFT的制造方法包括：在基板上形成栅电极，栅极绝缘层，金属氧化物半导体有源层，源电极和漏电极; 形成金属氧化物半导体活性层包括：通过电化学反应形成金属氧化物半导体活性层。制造TFT的方法适用于TFT和阵列基板的制造以及包括TFT的显示装置，并提供了形成金属氧化物半导体活性层的新方法。

6. 发明申请

US20160013453A1 OLED BACKPLANE AND FABRICATION METHOD THEREOF 有权
标题翻译： OLED背板及其制造方法
公开(公告)号：US20160013453A1
公开(公告)日：2016-01-14
申请号：US14429047
申请日：2014-07-25
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Chunsheng JIANG , Jingfei FANG , Wei LIU
IPC分类号： H01L51/56 , H01L51/52 , H01L27/32
CPC分类号： H01L51/56 , H01L27/3244 , H01L27/3246 , H01L27/3258 , H01L51/5206 , H01L51/5237
摘要： Disclosed are an OLED backplane and fabrication method. The fabrication method comprises: forming a pattern including a TFT on a substrate; forming a passivation layer on the substrate including the TFT pattern; forming a color filter on the substrate including the passivation layer; forming a resin layer on the substrate including the color filter; heavily doping the resin layer of a first region in each sub-pixel on the substrate including the resin layer, the resin layer in the first region being conductive, the first region including a passivation layer via-hole region, a pixel electrode region and a connecting region between the passivation layer via-hole region and the pixel electrode region, the passivation-layer via-hole region being a position where a drain electrode of the TFT is located; and forming an organic light-emitting layer and a cathode sequentially on the substrate after the resin layer of the first region is heavily doped.
摘要翻译：公开了OLED背板和制造方法。制造方法包括：在基板上形成包括TFT的图案; 在包括TFT图案的衬底上形成钝化层; 在包括钝化层的基板上形成滤色器; 在包括所述滤色器的所述基板上形成树脂层; 在包括树脂层的基板上的每个子像素中重掺杂第一区域的树脂层，第一区域中的树脂层是导电的，第一区域包括钝化层通孔区域，像素电极区域和所述钝化层通孔区域是所述TFT的漏极位于所述钝化层通孔区域和所述像素电极区域之间的所述钝化层通孔区域。在第一区域的树脂层重掺杂之后，在衬底上依次形成有机发光层和阴极。

7. 发明申请

US20160254339A1 PIXEL UNIT, ARRAY SUBSTRATE, DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：像素单元，阵列基板，显示装置及其制造方法
公开(公告)号：US20160254339A1
公开(公告)日：2016-09-01
申请号：US14769456
申请日：2014-12-25
申请人： BOE Technology Group Co., Ltd.
发明人： Chunsheng JIANG , Jingfei FANG , Baojiang ZHANG
IPC分类号： H01L27/32 , H01L51/56
CPC分类号： H01L27/3274 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L27/3276 , H01L29/4908 , H01L29/7869 , H01L51/56
摘要： A pixel unit is used in an array substrate of a display device. In one embodiment, it comprises a gate line, a source-drain line and a thin-film transistor; and the gate line is in an overlapped structure comprising a first MoW layer, a Cu layer and a second MoW layer overlapped successively; and a gate of the thin-film transistor is formed of the first MoW layer. In another embodiment, the source-drain line is in a same overlapped structure; and a source and a drain of the thin-film transistor are formed of the first MoW layer. The first embodiment is achieved by means of a halftone process while the second embodiment is achieved by means of a lift off process. Diffusion of Cu in the gate layer or in the source-drain layer towards the oxide active layer is prevented. Also disclosed is a method for manufacturing the abovementioned pixel unit, an array substrate comprising the abovementioned pixel unit, a display device comprising the abovementioned pixel unit, and a method for manufacturing abovementioned array substrate and display device.
摘要翻译：在显示装置的阵列基板中使用像素单元。在一个实施例中，其包括栅极线，源极 - 漏极线和薄膜晶体管; 并且栅极线处于重叠结构，其包括第一MoW层，Cu层和第二MoW层，并且薄膜晶体管的栅极由第一MoW层形成。在另一个实施例中，源极 - 漏极线处于相同的重叠结构; 并且薄膜晶体管的源极和漏极由第一MoW层形成。第一实施例通过半色调处理实现，而第二实施例通过剥离过程来实现。防止了栅极层或源极 - 漏极层中的Cu朝向氧化物活性层的扩散。还公开了制造上述像素单元的方法，包括上述像素单元的阵列基板，包括上述像素单元的显示装置，以及用于制造上述阵列基板和显示装置的方法。

8. 发明申请

US20160027811A1 THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开
标题翻译：薄膜晶体管，阵列基板和显示器件
公开(公告)号：US20160027811A1
公开(公告)日：2016-01-28
申请号：US14430138
申请日：2014-05-12
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Yanzhao LI , Gang WANG , Chunsheng JIANG , Jingfei FANG , Jingang FANG
IPC分类号： H01L27/12 , H01L29/04 , H01L29/24 , H01L29/786 , H01L29/06
CPC分类号： H01L27/1229 , H01L27/1225 , H01L29/04 , H01L29/0684 , H01L29/24 , H01L29/242 , H01L29/7869 , H01L29/78693 , H01L29/78696
摘要： Disclosed are a thin film transistor, an array substrate and a display device. The thin film transistor comprises a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode, wherein the active layer comprises at least two layers of semiconductor thin films, and the at least two layers of semiconductor thin films comprise at least one layer of monocrystalline semiconductor thin film.
摘要翻译：公开了一种薄膜晶体管，阵列基板和显示装置。薄膜晶体管包括栅电极，栅绝缘层，有源层，源电极和漏电极，其中有源层包括至少两层半导体薄膜，并且至少两层半导体薄膜包括至少一层单晶半导体薄膜。

9. 发明申请

US20170031193A1 MANUFACTURING METHOD OF TFT ARRAY SUBSTRATE, TFT ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开
标题翻译： TFT阵列基板，TFT阵列基板和显示装置的制造方法
公开(公告)号：US20170031193A1
公开(公告)日：2017-02-02
申请号：US15290492
申请日：2016-10-11
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Shi SHU , Guanbao HUI , Teng YE , Chunsheng JIANG , Cuili GAI
IPC分类号： G02F1/1368 , H01L29/786 , H01L27/12 , G02F1/1362
CPC分类号： H01L27/1262 , G02F1/136209 , G02F1/136227 , G02F2001/136231 , H01L27/1248 , H01L29/41733 , H01L29/78633
摘要： Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The TFT array substrate comprises a thin film transistor and a pixel electrode formed on a base substrate, the pixel electrode is electrically connected with a drain electrode of the thin film transistor. The array substrate further comprises an light-shielding pattern provided above the thin film transistor.
摘要翻译：本发明的实施例提供了TFT阵列基板，TFT阵列基板和显示装置的制造方法。 TFT阵列基板包括薄膜晶体管和形成在基底基板上的像素电极，像素电极与薄膜晶体管的漏极电连接。阵列基板还包括设置在薄膜晶体管上方的遮光图案。

10. 发明申请

US20160359054A1 ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME, DISPLAY PANEL AND DISPLAY DEVICE 审中-公开
标题翻译：阵列基板及其制造方法，显示面板和显示装置
公开(公告)号：US20160359054A1
公开(公告)日：2016-12-08
申请号：US15022274
申请日：2015-11-11
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Jingang FANG , Yanzhao LI , Chunsheng JIANG , Wulin SHEN
IPC分类号： H01L29/786 , H01L27/12
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/1248 , H01L27/322 , H01L27/3272 , H01L29/7869
摘要： The present invention provides an array substrate and a method of fabricating the same, a display panel and a display device. The array substrate array substrate includes a thin film transistor and a zinc oxide layer provided above and/or below an active layer of the thin film transistor, and a vertical projection of the zinc oxide layer on the array substrate is at least overlapped with the vertical projection of the active layer on the array substrate The zinc oxide layer has good absorption on UV light, so that adverse effects of UV light irradiation on a threshold voltage of the TFT of the array substrate are effectively avoided.
摘要翻译：本发明提供一种阵列基板及其制造方法，显示面板和显示装置。阵列基板阵列基板包括设置在薄膜晶体管的有源层上方和/或下方的薄膜晶体管和氧化锌层，并且阵列基板上的氧化锌层的垂直投影至少与垂直方向重叠活性层在阵列基板上的投影氧化锌层对紫外光具有良好的吸收，因此有效地避免了紫外线照射对阵列基板的TFT的阈值电压的不良影响。

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