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1. 发明授权

US08105453B2 Method for producing multilayer ceramic substrate 有权
标题翻译：多层陶瓷基板的制造方法
公开(公告)号：US08105453B2
公开(公告)日：2012-01-31
申请号：US12029545
申请日：2008-02-12
申请人： Akiyoshi Kawamura , Takayuki Tsukizawa , Tetsuya Ikeda
发明人： Akiyoshi Kawamura , Takayuki Tsukizawa , Tetsuya Ikeda
IPC分类号： C03B29/00 , B32B13/04 , B32B3/14
CPC分类号： H05K3/0052 , H01L21/4807 , H05K1/0272 , H05K1/0306 , H05K3/4614 , H05K3/4629 , H05K2201/0909 , H05K2201/09163 , H05K2201/09781 , Y10T428/166
摘要： In a method for producing a multilayer ceramic substrate, a green ceramic laminate includes green conductive patterns arranged on a plurality of ceramic green sheets and portions to be formed into a plurality of multilayer ceramic substrates. Boundary-defining conductive patterns are arranged on the ceramic green sheets and along boundaries of the multilayer ceramic substrates. The boundary-defining conductive patterns have firing shrinkage characteristics that are different from those of the ceramic green sheets. During firing of the green ceramic laminate, cavities adjacent to edges of the boundary-defining conductive patterns are formed. A sintered ceramic laminate is divided at edges passing through the cavities.
摘要翻译：在多层陶瓷基板的制造方法中，生坯陶瓷层叠体包括布置在多个陶瓷生片上的绿色导电图案和形成多个多层陶瓷基板的部分。边界限定导电图案布置在陶瓷生片上并沿着多层陶瓷基片的边界。边界限定导电图案具有与陶瓷生片不同的焙烧收缩特性。在焙烧生坯陶瓷层压板期间，形成与边界限定导电图案的边缘相邻的空腔。烧结的陶瓷层压体在通过空腔的边缘处分开。

2. 发明授权

US07833370B2 Method for manufacturing a ceramic multi-layered substrate 有权
标题翻译：陶瓷多层基板的制造方法
公开(公告)号：US07833370B2
公开(公告)日：2010-11-16
申请号：US11951842
申请日：2007-12-06
申请人： Akiyoshi Kawamura , Takayuki Tsukizawa , Tetsuya Ikeda , Osamu Chikagawa
发明人： Akiyoshi Kawamura , Takayuki Tsukizawa , Tetsuya Ikeda , Osamu Chikagawa
IPC分类号： C03B29/00
CPC分类号： H05K3/0052 , H05K1/0272 , H05K1/0306 , H05K3/4611 , H05K3/4629 , H05K2203/302 , H05K2203/308
摘要： A method for manufacturing a ceramic multi-layered substrate includes a first step of forming a green ceramic laminate including a plurality of stacked green ceramic base layers, a second step of firing the green ceramic laminate to sinter the green ceramic layers, and a third step of separating the sintered ceramic laminate formed by firing the green ceramic laminate into a ceramic multi-layered substrate. The green ceramic base layers stacked in the first step include a separation pattern formed along separation lines, the separation pattern disappearing during firing. In the third step, the sintered ceramic laminate is separated into a plurality of ceramic multi-layered substrates separated through a cavity formed by the disappearance of the separation pattern during the firing in the second step.
摘要翻译：陶瓷多层基板的制造方法包括：形成包含多个层叠的生坯陶瓷基层的生坯陶瓷层叠体的第一工序;烧成生陶瓷层叠体烧结生坯陶瓷层的第二工序;第三工序通过将生坯陶瓷层压体烧制成陶瓷多层基板而形成的烧结陶瓷层叠体。在第一步骤中堆叠的绿色陶瓷基底层包括沿着分离线形成的分离图案，分离图案在焙烧期间消失。在第三步骤中，烧结的陶瓷层压体被分离成多个陶瓷多层基板，其通过在第二步骤中的烧制期间由分离图案消失形成的空腔分离。

3. 发明申请

US20080142147A1 METHOD FOR MANUFACTURING A CERAMIC MULTI-LAYERED SUBSTRATE 有权
标题翻译：制造陶瓷多层基板的方法
公开(公告)号：US20080142147A1
公开(公告)日：2008-06-19
申请号：US11951842
申请日：2007-12-06
申请人： Akiyoshi Kawamura , Takayuki Tsukizawa , Tetsuya Ikeda , Osamu Chikagawa
发明人： Akiyoshi Kawamura , Takayuki Tsukizawa , Tetsuya Ikeda , Osamu Chikagawa
IPC分类号： B32B37/06
CPC分类号： H05K3/0052 , H05K1/0272 , H05K1/0306 , H05K3/4611 , H05K3/4629 , H05K2203/302 , H05K2203/308
摘要： A method for accurately and easily manufacturing a ceramic multi-layered substrate includes a first step of forming a green ceramic laminate including a plurality of stacked green ceramic base layers, a second step of firing the green ceramic laminate to sinter the green ceramic layers, and a third step of separating the sintered ceramic laminate formed by firing the green ceramic laminate into a ceramic multi-layered substrate. The green ceramic base layers stacked in the first step include a separation pattern formed along separation lines, the separation pattern disappearing during firing. In the third step, the sintered ceramic laminate is separated into a plurality of ceramic multi-layered substrates separated through a cavity formed by the disappearance of the separation pattern during the firing in the second step.
摘要翻译：陶瓷多层基板的精确且容易地制造方法包括：形成包含多个堆叠的绿色陶瓷基底层的生坯陶瓷层叠体的第一工序;烧成生陶瓷层叠体烧结生坯陶瓷层的第二工序;以及将通过将生坯陶瓷层压体烧制成陶瓷多层基板形成的烧结陶瓷层叠体的第三步骤。在第一步骤中堆叠的绿色陶瓷基底层包括沿着分离线形成的分离图案，分离图案在焙烧期间消失。在第三步骤中，烧结的陶瓷层压体被分离成多个陶瓷多层基板，其通过在第二步骤中的烧制期间由分离图案消失形成的空腔分离。

4. 发明授权

US08503147B2 ESD protection device 有权
标题翻译： ESD保护装置
公开(公告)号：US08503147B2
公开(公告)日：2013-08-06
申请号：US13106960
申请日：2011-05-13
申请人： Takayuki Tsukizawa , Tetsuya Ikeda
发明人： Takayuki Tsukizawa , Tetsuya Ikeda
IPC分类号： H02H1/04 , H02H3/22
CPC分类号： H05K9/0067
摘要： An ESD protection device includes a ceramic multilayer substrate including a plurality of laminated insulating layers, an external electrode, at least one of an in-plane connecting conductor and an interlayer connecting conductor, and a mixture portion. The mixture portion is provided along a principal surface of one of the insulating layers and includes a dispersed material including at least one of metal and semiconductor; metal and ceramic; metal, semiconductor, and ceramic; semiconductor and ceramic; semiconductor; metal coated with an inorganic material; metal coated with an inorganic material and semiconductor; metal coated with an inorganic material and ceramic; and metal coated with an inorganic material, semiconductor, and ceramic. The mixture portion is connected to the external electrode and at least one of the in-plane connecting conductor and the interlayer connecting conductor.
摘要翻译： ESD保护装置包括：陶瓷多层基板，包括多个层叠绝缘层，外部电极，面内连接导体和层间连接导体中的至少一个以及混合部分。混合部分沿着绝缘层之一的主表面设置，并且包括包含金属和半导体中的至少一种的分散材料; 金属和陶瓷; 金属，半导体和陶瓷; 半导体和陶瓷; 半导体; 涂有无机材料的金属; 用无机材料和半导体涂覆的金属; 涂有无机材料和陶瓷的金属; 以及用无机材料，半导体和陶瓷涂覆的金属。混合部分连接到外部电极和面内连接导体和层间连接导体中的至少一个。

5. 发明申请

US20080223606A1 Ceramic Substrate and Method for Manufacturing the Same 审中-公开
标题翻译：陶瓷基板及其制造方法
公开(公告)号：US20080223606A1
公开(公告)日：2008-09-18
申请号：US10596312
申请日：2005-05-25
申请人： Takayuki Tsukizawa , Tetsuya Ikeda , Osamu Chikagawa
发明人： Takayuki Tsukizawa , Tetsuya Ikeda , Osamu Chikagawa
IPC分类号： H05K1/16 , H05K3/30
CPC分类号： H05K3/321 , H05K1/0306 , H05K1/092 , H05K1/183 , H05K3/305 , H05K3/4611 , H05K3/4629 , H05K3/4697 , H05K2201/10636 , H05K2203/0278 , H05K2203/1131 , H05K2203/1453 , H05K2203/308 , Y02P70/611 , Y10T29/4913 , Y10T29/49163 , Y10T29/49169
摘要： A chip-mounted substrate includes a chip electronic component on a ceramic substrate having surface electrodes. The chip electronic component includes a ceramic sintered compact defining an element assembly and terminal electrodes. The surface electrodes of the ceramic substrate are integrated with the corresponding external terminal electrodes by sintering.
摘要翻译：芯片安装基板包括具有表面电极的陶瓷基板上的芯片电子部件。芯片电子部件包括限定元件组件和端子电极的陶瓷烧结体。陶瓷基板的表面电极通过烧结与相应的外部端子电极集成。

6. 发明授权

US08847726B2 Method for manufacturing ESD protection device and ESD protection device 有权
标题翻译： ESD保护器件和ESD保护器件的制造方法
公开(公告)号：US08847726B2
公开(公告)日：2014-09-30
申请号：US13565878
申请日：2012-08-03
申请人： Tetsuya Ikeda , Takayuki Tsukizawa
发明人： Tetsuya Ikeda , Takayuki Tsukizawa
IPC分类号： H01C7/10 , H01C7/13 , H02H9/04 , H05K1/02 , H01T21/00 , H05F3/02 , H01T4/12 , H05K3/46 , H05K1/16
CPC分类号： H02H9/044 , H01T4/12 , H01T21/00 , H05F3/02 , H05K1/0259 , H05K1/026 , H05K1/16 , H05K3/4629 , H05K2201/096
摘要： In a method for manufacturing an ESD protection device and an ESD protection device, on sheets defining insulating layers, portions defining a first connection conductor and a second connection conductor and a portion defining a mixed portion are formed, then the sheets are laminated and heated. The mixed portion is formed using a mixed portion formation material containing a cavity formation material and a solid component containing at least one of (i) a metal and a semiconductor, (ii) a metal and ceramic, (iii) a metal, a semiconductor, and ceramic, (iv) a semiconductor and ceramic, (v) a semiconductor, (vi) a metal coated with an inorganic material, (vii) a metal coated with an inorganic material and a semiconductor, (viii) a metal coated with an inorganic material and ceramic, and (ix) a metal coated with an inorganic material, a semiconductor, and ceramic. The cavity formation material disappears during heating.
摘要翻译：在制造ESD保护器件和ESD保护器件的方法中，形成限定绝缘层的片材，形成限定第一连接导体和第二连接导体的部分以及限定混合部分的部分，然后层压和加热片材。混合部分使用包含空腔形成材料和含有（i）金属和半导体中的至少一种的固体成分的混合部分形成材料形成，（ii）金属和陶瓷，（iii）金属，半导体和（iv）半导体和陶瓷，（v）半导体，（vi）涂覆有无机材料的金属，（vii）涂有无机材料和半导体的金属，（viii）涂覆有无机材料和陶瓷，以及（ix）涂覆有无机材料，半导体和陶瓷的金属。加热过程中空腔形成材料消失。

7. 发明授权

US08618904B2 ESD protection device 有权
标题翻译： ESD保护装置
公开(公告)号：US08618904B2
公开(公告)日：2013-12-31
申请号：US13570277
申请日：2012-08-09
申请人： Takayuki Tsukizawa , Tetsuya Ikeda
发明人： Takayuki Tsukizawa , Tetsuya Ikeda
IPC分类号： H01C7/10
CPC分类号： H01T4/12
摘要： An ESD protection device includes a ceramic multilayer substrate in which a plurality of ceramic insulating layers are laminated; a first connecting conductor extending through the main surfaces of the insulating layer; a mixture portion extending along a main surface of the insulating layer including the first connecting conductor and connected to the first connecting conductor, the mixture portion including a material dispersed therein, the material including at least one selected from a metal and a semiconductor, a metal and a ceramic, a semiconductor and a ceramic, a semiconductor, and a metal coated with an inorganic material; and a second connecting conductor that has electrical conductivity and is connected to the mixture portion and extends along the main surface of the insulating layer on which the mixture portion is provided.
摘要翻译： ESD保护装置包括层叠有多个陶瓷绝缘层的陶瓷多层基板; 延伸穿过绝缘层的主表面的第一连接导体; 所述混合部分沿着包括所述第一连接导体并且连接到所述第一连接导体的所述绝缘层的主表面延伸，所述混合部分包括分散在其中的材料，所述材料包括选自金属和半导体中的至少一种，金属以及陶瓷，半导体和陶瓷，半导体和涂有无机材料的金属; 以及第二连接导体，其具有导电性并连接到混合部分并且沿着设置有混合部分的绝缘层的主表面延伸。

8. 发明授权

US08067995B2 Voltage controlled oscillator, and PLL circuit and wireless communication device each using the same 有权
标题翻译：压控振荡器，PLL电路和无线通信设备均使用相同
公开(公告)号：US08067995B2
公开(公告)日：2011-11-29
申请号：US12601621
申请日：2009-03-17
申请人： Takayuki Tsukizawa
发明人： Takayuki Tsukizawa
IPC分类号： H03B5/12
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B5/1293 , H03B2200/0048 , H03B2200/005 , H03L7/099 , H03L7/18 , H03L2207/06
摘要： A voltage controlled oscillator includes first and second variable capacitance circuits 120 and 130, and first and second capacitance switch circuits 140 and 150. A control voltage Vt is fixedly applied to the first variable capacitance circuit 120, and control signals Fsel2 and Fsel3 are fixedly applied to the first and second capacitance switch circuits 140 and 150, respectively. When both of the control signals Fsel2 and Fsel3 are at a low level, the control signal Fsel1 is applied to the second variable capacitance circuit 130. When the control signals Fsel2 and Fsel3 are both not at the low level, the control voltage Vt is applied to the second variable capacitance circuit 130. As a result of this control, a high-frequency variable range is divided into two variable ranges, one based on upper frequencies and the other based on lower frequencies. This enables suppression of a frequency sensitivity without narrowing the high-frequency variable range.
摘要翻译：压控振荡器包括第一和第二可变电容电路120和130以及第一和第二电容开关电路140和150.控制电压Vt固定地施加到第一可变电容电路120，并且控制信号Fsel2和Fsel3被固定地施加分别连接到第一和第二电容开关电路140和150。当控制信号Fsel2和Fsel3都处于低电平时，控制信号Fsel1被施加到第二可变电容电路130.当控制信号Fsel2和Fsel3都不处于低电平时，施加控制电压Vt 到第二可变电容电路130.作为该控制的结果，高频可变范围被分为两个可变范围，一个基于较高频率，另一个基于较低频率。这使得能够抑制频率灵敏度而不会使高频可变范围变窄。

9. 发明授权

US07701304B2 Voltage controlled oscillator, and PLL circuit and radio communication apparatus using the same 有权
标题翻译：压控振荡器，PLL电路及使用其的无线通信装置
公开(公告)号：US07701304B2
公开(公告)日：2010-04-20
申请号：US12035250
申请日：2008-02-21
申请人： Takayuki Tsukizawa , Koji Takinami
发明人： Takayuki Tsukizawa , Koji Takinami
IPC分类号： H03B5/18
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1243 , H03B5/1265 , H03B5/1293 , H03B2201/025 , H03J2200/10
摘要： A voltage controlled oscillator has a reference voltage generation section for generating a plurality of reference voltage based on a power supply voltage. Reference voltages Vref1, Vref2, and Vref3 are inputted to variable capacitance circuits A, B, and C, respectively. Reference voltages Vref1, Vref2, and Vref3 each has a fixed value, and a difference between the first reference voltage Vref1 and the second reference voltage Vref2 and a difference between the second reference voltage Vref2 and the third reference voltage Vref3 represent values different from each other. A control voltage Vt for feedback-controlling an oscillation frequency is inputted to each of the other of the terminals of the variable capacitance element of each of the n variable capacitance circuits such that the control voltage Vt having the same value is inputted to the each of the other of the terminals.
摘要翻译：压控振荡器具有用于基于电源电压产生多个参考电压的参考电压产生部分。参考电压Vref1，Vref2和Vref3分别输入到可变电容电路A，B和C. 参考电压Vref1，Vref2和Vref3各自具有固定值，并且第一参考电压Vref1和第二参考电压Vref2之间的差以及第二参考电压Vref2与第三参考电压Vref3之间的差表示彼此不同的值。将用于反馈控制振荡频率的控制电压Vt输入到n个可变电容电路中的每一个的可变电容元件的另一个端子中，使得具有相同值的控制电压Vt被输入到另一个终端。

10. 发明授权

US07567139B2 Voltage controlled oscillator, and PLL circuit and wireless communication apparatus using the same 有权
标题翻译：压控振荡器，PLL电路和使用该电路的无线通信装置
公开(公告)号：US07567139B2
公开(公告)日：2009-07-28
申请号：US11882945
申请日：2007-08-07
申请人： Takayuki Tsukizawa
发明人： Takayuki Tsukizawa
IPC分类号： H03B1/00
CPC分类号： H03L7/099 , H03B5/1215 , H03B5/1228 , H03B5/1253 , H03B5/1293 , H03B2200/005 , H03J5/00 , H03L2207/06
摘要： A voltage controlled oscillator including an inductor circuit including inductors 101, 102, a variable capacitance circuit 110 having variable capacitance elements 111, 112 changing a capacitance according to a voltage difference between two terminals thereof and having capacitive elements 113, 114 cutting a DC component, a negative resistance circuit including cross-coupled oscillating transistors 103, 104, and a time-switched level shift circuit 108 for shifting a reference voltage to two or more levels in a predetermined period. A connection point A of the variable capacitance elements is supplied with a control voltage Vt controlling an oscillation frequency, and connection points B, C of the variable capacitance elements and the capacitive elements are supplied with a reference voltage Vref output from the time-switched level shift circuit 108 via resistors 115, 116.
摘要翻译：一种压控振荡器，包括电感器电路，包括电感器101,102，具有可变电容元件111,112的可变电容电路110，根据其两个端子之间的电压差改变电容，并具有切割DC分量的电容元件113,114，负电阻电路包括交叉耦合振荡晶体管103,104和时间切换电平移位电路108，用于在预定周期内将参考电压移位到两个或更多个电平。可变电容元件的连接点A被提供控制振荡频率的控制电压Vt，可变电容元件和电容元件的连接点B，C被提供从时间切换电平输出的参考电压Vref 移位电路108经由电阻器115,116。

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