专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07590076B2 Switching apparatus 有权
标题翻译：开关装置
公开(公告)号：US07590076B2
公开(公告)日：2009-09-15
申请号：US10733187
申请日：2003-12-11
申请人： Satoshi Sumino , Kazuto Nishimura , Akihiro Hata
发明人： Satoshi Sumino , Kazuto Nishimura , Akihiro Hata
IPC分类号： H04L12/28
CPC分类号： H04L45/02
摘要： A switching apparatus for learning a source address set in a packet in an address learning table and delivering a packet on the basis of an address learned in the address learning table includes an address learning unit for limiting a number of learned addresses such that a number of learned addresses for each user group in the address learning table is equal to or less than an address learning upper limit value for the user group.
摘要翻译：一种用于学习在地址学习表中的分组中设置的源地址并基于在地址学习表中学习的地址传送分组的切换装置，包括：地址学习单元，用于限制学习地址的数量，地址学习表中的每个用户组的学习地址等于或小于用户组的地址学习上限值。

2. 发明申请

US20050100020A1 Packet switching device 审中-公开
标题翻译：分组交换设备
公开(公告)号：US20050100020A1
公开(公告)日：2005-05-12
申请号：US10826802
申请日：2004-04-16
申请人： Akihiro Hata , Satoshi Sumino , Kazuto Nishimura
发明人： Akihiro Hata , Satoshi Sumino , Kazuto Nishimura
IPC分类号： H04L12/801 , H04L12/823 , H04L12/851 , H04L12/911 , H04L29/06 , H04L12/56
CPC分类号： H04L47/10 , H04L47/12 , H04L47/13 , H04L47/15 , H04L47/2441 , H04L47/2458 , H04L47/30 , H04L49/201 , H04L49/351 , H04L49/354 , H04L63/1441
摘要： A packet switching device for receiving and forwarding a packet, comprises a counter for indicating a storage capacity of specified packets in stored packets, and means for starting a forwarding restriction of the specified packets if the counter exceeds a preset forwarding restriction start threshold value. The forwarding restriction is a process of, e.g., lowering a priority of the specified packets in the received packets. The packet switching device further comprises means for canceling the forwarding restriction when the counter becomes smaller than a preset forwarding restriction terminating threshold value.
摘要翻译：一种用于接收和转发分组的分组交换设备，包括：用于指示所存储的分组中指定分组的存储容量的计数器;以及如果所述计数器超过预设的转发限制开始阈值，则启动所述指定分组的转发限制的装置。转发限制是例如降低接收到的分组中的指定分组的优先级的过程。分组交换设备还包括当计数器变得小于预设的转发限制终止阈值时取消转发限制的装置。

3. 发明授权

US08432925B2 Apparatus and method for controlling buffering of an arrival packet 有权
标题翻译：用于控制到达分组的缓冲的装置和方法
公开(公告)号：US08432925B2
公开(公告)日：2013-04-30
申请号：US12404502
申请日：2009-03-16
申请人： Kazuto Nishimura , Hiroshi Tomonaga , Akihiro Hata , Masamichi Kasa
发明人： Kazuto Nishimura , Hiroshi Tomonaga , Akihiro Hata , Masamichi Kasa
IPC分类号： H04L12/56
CPC分类号： H04L47/283 , H04L47/10 , H04L47/32 , H04L49/505
摘要： An apparatus for controlling buffering of an arrival packet. The apparatus includes a packet buffer for temporarily storing each of one or more packets to be transmitted in association with an arrival time thereof, and a packet discard section for determining an arrival packet to be discarded or to be stored in the packet buffer, based on a discard condition defined by using a packet residence time that is calculated on the basis of one or more residence times of one or more packets staying in the packet buffer, wherein the arrival packet is defined as a packet that has newly arrived at the apparatus.
摘要翻译：一种用于控制到达分组的缓冲的装置。该装置包括：分组缓冲器，用于临时存储与其到达时间相关联的要发送的一个或多个分组中的每一个;以及分组丢弃部分，用于基于丢弃或要存储在分组缓冲器中的到达分组，基于通过使用基于停留在分组缓冲器中的一个或多个分组的一个或多个停留时间计算的分组停留时间定义的丢弃条件，其中到达分组被定义为新到达该设备的分组。

4. 发明申请

US20100232291A1 DATA TRANSMISSION DEVICE 有权
标题翻译：数据传输设备
公开(公告)号：US20100232291A1
公开(公告)日：2010-09-16
申请号：US12783754
申请日：2010-05-20
申请人： Masaki Hirota , Hiroshi Tomonaga , Akihiro Hata , Shigeyuki Kobayashi
发明人： Masaki Hirota , Hiroshi Tomonaga , Akihiro Hata , Shigeyuki Kobayashi
IPC分类号： H04L12/24 , H04L12/56
CPC分类号： H04L47/125 , H04L49/1523 , H04L49/557
摘要： In a data transmission device and method provided with e.g. duplexed switches outputting frames in the order of input for continuing the communication without instantaneous interruptions even though one of the switches are faulted, input interfaces generate frames in which every time data is inputted, input order information indicating the input order is added to the data together with unique information of each input interface and providing the frame generated to the switches in parallel. At least one output interface sequentially stores the frames outputted from the switches for every unique information and selects a first arrived frame among the frames stored with same input order information.
摘要翻译：在具有例如数据传输设备和方法的数据传输设备和方法中，双工开关以输入顺序输出帧，以便即使其中一个开关发生故障，继续进行通信也不会发生瞬时中断，输入接口产生每次输入数据的帧，将表示输入顺序的输入顺序信息添加到数据中具有每个输入接口的独特信息，并且并行地向交换机提供生成的帧。至少一个输出接口对于每个唯一信息顺序地存储从开关输出的帧，并且选择在具有相同输入顺序信息存储的帧中的第一到达帧。

5. 发明授权

US08594092B2 Packet relay method and device 有权
标题翻译：分组中继方法和设备
公开(公告)号：US08594092B2
公开(公告)日：2013-11-26
申请号：US11959615
申请日：2007-12-19
申请人： Satoshi Nemoto , Hiroshi Tomonaga , Akihiro Hata
发明人： Satoshi Nemoto , Hiroshi Tomonaga , Akihiro Hata
IPC分类号： H04L12/28
CPC分类号： H04L49/552 , H04L49/1515 , H04L49/205
摘要： In a packet relay method and device which can reduce a congestion of switching even when segment data are concentrated, segment data dividing portions respectively extract a destination address and a packet length from received packets, divide the packets into predetermined length data based on each packet length, and generates location information indicating locations in the packets respectively for the data. The segment data dividing portions add segment headers in which the location information, the destination address, and an address of its own device as a source address are set are added to each of the data, generate segment data, and provide the segment data to switches within a switch card in parallel.
摘要翻译：在分组中继方法和装置中，即使在分段数据集中的情况下也可以减少切换拥塞，分段数据分割部分从接收到的分组分别提取目的地址和分组长度，根据每个分组长度将分组划分成预定长度的数据并分别产生指示数据包中的位置的位置信息。分段数据分割部分添加分段报头，其中设置作为源地址的其自身设备的位置信息，目的地址和地址被设置为每个数据，生成分段数据，并将分段数据提供给切换在开关卡内并行。

6. 发明申请

US20060045091A1 Transmission device 审中-公开
标题翻译：传输设备
公开(公告)号：US20060045091A1
公开(公告)日：2006-03-02
申请号：US11062630
申请日：2005-02-23
申请人： Akihiro Hata
发明人： Akihiro Hata
IPC分类号： H04L12/56
CPC分类号： H04L49/555 , H04L45/18 , H04L49/351
摘要： A switching device provides a technique for detecting, in a switch equipped in a layer-2 network, frame forwarding loops in a network. The switching device comprises an interface part operable to input a frame, a switching part operable to switch in accordance with a destination address of the input frame, a comparing part operable to compare a switch identifier recorded in the input frame with its own switch identifier, and a notifying part operable to provide notification of a match when comparison results obtained by the comparing part match.
摘要翻译：交换设备提供了一种用于在配备在二层网络中的交换机中检测网络中的帧转发环路的技术。切换装置包括可操作以输入帧的接口部分，可操作以根据输入帧的目的地地址切换的切换部分，可操作以将记录在输入帧中的交换机标识符与其自己的交换机标识符进行比较的比较部分，以及通知部，用于当由所述比较部分获得的比较结果匹配时，提供匹配的通知。

7. 发明授权

US06010922A Semiconductor device with increased distance between channel edges and a gate electrode 失效
标题翻译：具有增加通道边缘与栅电极之间距离的半导体器件
公开(公告)号：US06010922A
公开(公告)日：2000-01-04
申请号：US996121
申请日：1997-12-22
申请人： Akihiro Hata , Takashi Funai , Masahiro Adachi
发明人： Akihiro Hata , Takashi Funai , Masahiro Adachi
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/336 , H01L29/423 , H01L29/786 , H01L21/00 , H01L21/84
CPC分类号： H01L29/66757 , H01L29/42384 , H01L29/78633
摘要： The semiconductor device of this invention includes a substrate having an insulating surface and a thin film transistor formed on the substrate, wherein the thin film transistor has a semiconductor island including a channel region and source/drain regions, a gate insulating film formed on the semiconductor island and a gate electrode covering the channel region of the semiconductor island interposing the gate insulating film therebetween, and wherein a distance between an edge of the channel region of the semiconductor island and the gate electrode is larger than a distance between a central portion of the channel region of the semiconductor island and the gate electrode.
摘要翻译：本发明的半导体器件包括具有绝缘表面的衬底和形成在衬底上的薄膜晶体管，其中薄膜晶体管具有包括沟道区和源极/漏极区的半导体岛，形成在半导体上的栅极绝缘膜岛和覆盖半导体岛的沟道区域的栅极电极，其间插入栅极绝缘膜，并且其中半导体岛的沟道区域的边缘与栅电极之间的距离大于所述半导体岛的中心部分之间的距离沟道区域和栅电极。

8. 发明授权

US08645593B2 Signal processor, transmission apparatus, and method for processing signal 失效
标题翻译：信号处理器，传输装置和处理信号的方法
公开(公告)号：US08645593B2
公开(公告)日：2014-02-04
申请号：US12830509
申请日：2010-07-06
申请人： Akihiro Hata
发明人： Akihiro Hata
IPC分类号： G06F13/00
CPC分类号： H04L43/02 , H04L43/16
摘要： A signal processor includes a processor that counts the number of input data pieces or a size of each of the input data pieces; a first memory that stores a result of the counting by the processor; and a second memory that records whether the result of the counting exceeds a capacity of the first memory.
摘要翻译：信号处理器包括对输入数据段的数量或每个输入数据段的大小进行计数的处理器; 存储处理器的计数结果的第一存储器; 以及第二存储器，其记录所述计数的结果是否超过所述第一存储器的容量。

9. 发明授权

US08098674B2 Queue selection method and scheduling device 有权
标题翻译：队列选择方法和调度设备
公开(公告)号：US08098674B2
公开(公告)日：2012-01-17
申请号：US11362522
申请日：2006-02-27
申请人： Mami Sekido , Akihiro Hata , Satoshi Nishimura , Yuuji Kubo
发明人： Mami Sekido , Akihiro Hata , Satoshi Nishimura , Yuuji Kubo
IPC分类号： H04L12/28
CPC分类号： H04L49/90 , H04L47/50 , H04L47/60 , H04L49/9047
摘要： A queue selection method for controlling selection of many queues without increasing the circuit scale is provided. Queues are organized into groups, and each group is created as a tree structure with a plurality of steps, and a queue is selected by selecting a group of each step. By this, even if the number of queues is enormous, it is sufficient to provide registers for managing the presence of packets only for the number of groups selected in each step, and it becomes unnecessary to provide registers for all of the queues, so an increase of registers can be suppressed even if the number of queues increases. It is preferable that group selection in each step is performed in parallel independently from pipeline processing so as to maintain high-speed operation.
摘要翻译：提供了一种用于在不增加电路规模的情况下控制许多队列的选择的队列选择方法。队列被组织成组，并且每个组被创建为具有多个步骤的树结构，并且通过选择每个步骤的组来选择队列。由此，即使队列数量庞大，仅仅为每个步骤中选择的组数量提供用于管理数据包存在的寄存器就足够了，因此不必为所有队列提供寄存器，因此，即使队列数量增加，也可以抑制寄存器的增加。优选地，独立于流水线处理并行地执行每个步骤中的组选择，以便保持高速操作。

10. 发明授权

US5953598A Thin film transistor and fabrication process of the same 失效
标题翻译：薄膜晶体管及其制造工艺相同
公开(公告)号：US5953598A
公开(公告)日：1999-09-14
申请号：US689892
申请日：1996-08-15
申请人： Akihiro Hata , Masahiro Adachi
发明人： Akihiro Hata , Masahiro Adachi
IPC分类号： H01L21/20 , H01L21/02 , H01L21/336 , H01L27/12 , H01L29/786 , H01L21/00
CPC分类号： H01L29/66757 , H01L29/78621
摘要： A fabrication sequence of a thin film transistor, in which a photoresist film is used as an ion doping mask to shield a portion of an amorphous semiconductor layer larger than a gate electrode formed above in width (gate length). The mask is designed by pre-calculating the accuracy of the alignment and etching, so that the gate electrode overlaps neither the source region nor drain region. Thus, it has become possible to form the gate electrode in such a manner not to overlap the source region or drain region while securing an impurity-free offset region. As a result, the present thin film transistor can reduce the OFF-state current and renders excellent OFF-state characteristics, and therefore, when employed in a liquid crystal display device, the resulting liquid crystal display device can prevent display defects, such as a flicker.
摘要翻译：一种薄膜晶体管的制造顺序，其中使用光致抗蚀剂膜作为离子掺杂掩模来屏蔽比在宽度（栅极长度）上形成的栅电极大的非晶半导体层的一部分。通过预先计算对准和蚀刻的精度来设计掩模，使得栅极电极不重叠源极区域和漏极区域。因此，在确保无杂质偏移区域的同时，可以以不重叠源极区域或漏极区域的方式形成栅极电极。结果，本发明的薄膜晶体管可以降低截止状态电流并且具有优异的截止状态特性，因此当用于液晶显示装置时，所得到的液晶显示装置可以防止显示缺陷，例如闪烁。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式