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1. 发明授权

US07068325B2 Video signal processor and video signal processing method 失效
标题翻译：视频信号处理器和视频信号处理方法
公开(公告)号：US07068325B2
公开(公告)日：2006-06-27
申请号：US10416673
申请日：2002-09-10
申请人： Yukinori Gengintani , Hisafumi Motoe
发明人： Yukinori Gengintani , Hisafumi Motoe
IPC分类号： H04N5/14
CPC分类号： H04N5/945 , H04N5/21 , H04N5/46 , H04N7/0135
摘要： The present invention relates to a video signal processing device for avoiding a phenomenon that noise is upwardly or downwardly shifted due to noise reducing operation when a non-standard signal is input. When a non-standard signal is input as an input video signal, coefficients of interpolating filters for carrying out interpolation on pixels of timely-sequential field video signals are fixed as a non-standard signal supporting signal processing. With this processing, interpolated pixels achieved by the interpolation processing are located at the same vertical spatial position, and pixels which are noise-reduced by the interpolated pixels are located at the same vertical spatial position as pixels before original noise is reduced, thereby locating the pixels at the same horizontal position.
摘要翻译：视频信号处理装置技术领域本发明涉及一种视频信号处理装置，用于避免在输入非标准信号时噪声降低操作时噪声向上或向下移位的现象。当非标准信号被输入作为输入视频信号时，用于对及时顺序的场视频信号的像素执行插值的内插滤波器的系数被固定为非标准信号支持信号处理。通过该处理，通过内插处理实现的内插像素位于相同的垂直空间位置，并且被内插像素噪声降低的像素位于与原始噪声降低之前的像素相同的垂直空间位置，从而定位像素在相同的水平位置。

2. 发明授权

US07092034B2 Video signal processing device and method, recording medium, and program 有权
标题翻译：视频信号处理装置和方法，记录介质和程序
公开(公告)号：US07092034B2
公开(公告)日：2006-08-15
申请号：US10482675
申请日：2003-04-28
申请人： Yukinori Gengintani , Hisafumi Motoe
发明人： Yukinori Gengintani , Hisafumi Motoe
IPC分类号： H04N5/46
CPC分类号： H04N5/46 , H04N5/10 , H04N5/21
摘要： The present invention is related to a video signal processing apparatus and method, a recording medium, and a program which are suitably for use in determining whether an input video signal is standard or nonstandard. In synchronization with the edge of an advance vertical sync signal xAVD, a free-running vertical sync edge counter 31 increments by 1 the count value which cycles between 0 through 7 and outputs the count value to a free-running field ID edge counter 32 and a comparator 33. In synchronization with the rising and falling edges of a field ID signal AFD, the free-running field ID edge counter 32 increments the count value by 1. The comparator 33 generates a nonstandard signal detection signal in correspondence with the FD edge count value with the V count value being 7 and a vertical sync signal xVD being at L level. The present invention is applicable to TV receivers for example.
摘要翻译：本发明涉及适用于确定输入视频信号是标准还是不标准的视频信号处理装置和方法，记录介质和程序。与前进垂直同步信号xAVD的边沿同步，自由运行的垂直同步边缘计数器31将从0到7之间循环的计数值递增1，并将计数值输出到自由运行的场ID边缘计数器32，比较器33。与场ID信号AFD的上升沿和下降沿同步，自由运行场ID边缘计数器32将计数值递增1.比较器33根据FD边缘计数值生成与FD边缘计数值对应的非标准信号检测信号， V计数值为7，垂直同步信号xVD为L电平。本发明例如适用于TV接收机。

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