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1. 发明授权

US08114714B2 Electronic device and production method thereof 有权
标题翻译：电子装置及其制造方法
公开(公告)号：US08114714B2
公开(公告)日：2012-02-14
申请号：US11837763
申请日：2007-08-13
申请人： Satoru Kuramochi , Yoshitaka Fukuoka
发明人： Satoru Kuramochi , Yoshitaka Fukuoka
IPC分类号： H01L21/82
CPC分类号： H01L21/6835 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/82 , H01L25/0657 , H01L2221/68345 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/32225 , H01L2224/73267 , H01L2224/82001 , H01L2224/92244 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06582 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/07802 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H05K1/185 , H05K3/4602 , H01L2924/00 , H01L2224/83005
摘要： An object is to provide an electronic device of a multilayer structure with high density and high reliability that can be reduced in size while incorporating an electronic component therein, and further provide a production method for easily producing such an electronic device. An electronic device of the present invention includes wiring layers and electrically insulating layers stacked on a core board and establishes predetermined electrical conduction between the wiring layers through upper-lower side conducting vias provided in the electrically insulating layers. An electronic component incorporating layer formed by directly forming a lower layer and insulating resin layer having a cutout portion for receiving an electronic component therein and upper-lower side conducting vias and by incorporating the electronic component in the cutout portion is provided at least between one of the wiring layers and one of the electrically insulating layers and/or between the core board and the electrically insulating layer. At least the uppermost-layer electronic component incorporating layer of electronic incorporating layers has a metal frame body surrounding the electronic component and the upper-lower side conducting vias, and a metal cap having a flange portion fixed to the metal frame body of the uppermost-layer electronic component incorporating layer is provided.
摘要翻译：本发明的目的是提供一种具有高密度和高可靠性的多层结构的电子器件，其可以在将电子元件并入的同时减小其尺寸，并且还提供了容易地制造这种电子器件的制造方法。本发明的电子器件包括堆叠在芯板上的布线层和电绝缘层，并且通过设置在电绝缘层中的上下侧导电孔而在布线层之间建立预定的导电。通过直接形成下层形成的电子部件结合层和具有用于接收电子部件的切口部分的绝缘树脂层和上下侧导电通孔以及通过将电子部件并入缺口部分而形成的电子部件结合层至少设置在布线层和电绝缘层之一和/或芯板与电绝缘层之间。至少具有电子结合层的最上层电子部件具有围绕电子部件和上下侧导电通孔的金属框体，金属盖具有固定在最上层的金属框体上的凸缘部，提供了层叠电子元件结合层。

2. 发明申请

US20100025082A1 ELECTRONIC COMPONENT BUILT-IN WIRING BOARD AND METHOD FOR RADIATING HEAT GENERATED AT THE SAME 有权
标题翻译：电子元器件内置导线板及其放射加热方法
公开(公告)号：US20100025082A1
公开(公告)日：2010-02-04
申请号：US12519745
申请日：2007-12-14
申请人： Kenji Sasaoka , Yoshitaka Fukuoka
发明人： Kenji Sasaoka , Yoshitaka Fukuoka
IPC分类号： H05K7/20 , H05K1/16 , H01S4/00
CPC分类号： H05K1/0206 , H01L2224/16225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H05K1/186 , H05K3/4069 , H05K3/4614 , H05K3/462 , H05K3/4647 , H05K2201/09527 , H05K2201/096 , H05K2203/061 , H05K2203/063 , Y10T29/49002 , H01L2224/0401
摘要： An electronic component built-in wiring board includes: at least a pair of wiring patterns; an insulating layer disposed between the pair of wiring board; an electronic component embedded in the insulating layer; and a metallic body provided at least on or above a main surface of the electronic component in the insulating layer and thermally contacted with the electronic component.
摘要翻译：电子部件内置布线板包括：至少一对布线图案; 绝缘层，设置在所述一对布线板之间; 嵌入绝缘层中的电子部件; 以及金属体，其设置在所述绝缘层中至少在所述电子部件的主表面上或上方，并与所述电子部件热接触。

3. 发明申请

US20080163486A1 Component built-in wiring board and manufacturing method of component built-in wiring board 失效
公开(公告)号：US20080163486A1
公开(公告)日：2008-07-10
申请号：US12007924
申请日：2008-01-17
申请人： Tatsuro Imamura , Yuji Yamaguchi , Kazuhiro Shinozaki , Satoshi Shibazaki , Yoshitaka Fukuoka , Hiroyuki Hirai , Osamu Shimada , Kenji Sasaoka , Kenichi Matsumura
发明人： Tatsuro Imamura , Yuji Yamaguchi , Kazuhiro Shinozaki , Satoshi Shibazaki , Yoshitaka Fukuoka , Hiroyuki Hirai , Osamu Shimada , Kenji Sasaoka , Kenichi Matsumura
IPC分类号： H05K3/30 , H05K3/36
CPC分类号： H05K1/184 , H05K1/023 , H05K1/186 , H05K3/3442 , H05K3/4602 , H05K2201/10636 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49146 , Y10T29/49147 , Y10T29/49155 , Y10T29/49165 , Y10T29/49789 , Y10T29/49798
摘要： To provide a component built-in wiring board and a manufacturing method thereof capable of further improving component mounting density without deteriorating-reliability. The component built-in wiring board includes: a conductive layer (34, 35) extending in a thickness direction of the board and buried in the board without being exposed from an upper and a lower surface of the board; an electrical/electronic component (33) having a terminal and buried in the board with the terminal facing the buried conductive layer; a connecting member (36, 37) provided in a gap between the terminal of the buried electrical/electronic component and the conductive layer to electrically/mechanically connect the terminal and the conductive layer; and two upper and lower insulating layers (11, 15) which cover an outer surface of the buried electrical/electronic component excluding a portion connected to the connecting member and which are in close contact with a top and a bottom in the board thickness direction of the electrical/electronic component.

4. 发明申请

US20060254050A1 Method for fabricating wiring board provided with passive element, and wiring board provided with passive element 有权
标题翻译：具有无源元件的布线板的制造方法以及配置有无源元件的布线基板
公开(公告)号：US20060254050A1
公开(公告)日：2006-11-16
申请号：US11489544
申请日：2006-07-20
申请人： Yoshitaka Fukuoka , Tooru Serizawa , Hiroshi Yagi , Osamu Shimada , Hiroyuki Hirai , Yuji Yamaguchi
发明人： Yoshitaka Fukuoka , Tooru Serizawa , Hiroshi Yagi , Osamu Shimada , Hiroyuki Hirai , Yuji Yamaguchi
IPC分类号： C09D5/00 , B05D3/12
CPC分类号： H05K1/162 , H05K1/095 , H05K1/165 , H05K1/167 , H05K3/4069 , H05K3/4614 , H05K3/4652 , H05K2201/0187 , H05K2201/0355 , H05K2201/086 , H05K2201/09763 , H05K2203/0338 , H05K2203/1189 , Y10T29/4902 , Y10T29/49099 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155
摘要： A fabricating method of a wiring board provided with passive elements is disclosed. The fabricating method includes coating one or both of resistive paste and dielectric paste on at least any one of first surfaces of a first metal foil and a second metal foil each of which has a first surface and a second surface; arranging an insulating board having thermo-plasticity and thermo-setting properties so as to face the first surface of the first metal foil, and arranging the first surface side of the second metal foil so as to face a surface different from a surface to which the first metal foil faces of the insulating board; forming a double-sided wiring board by stacking, pressurizing and heating the arranged first metal foil, insulating board, and second metal foil, and thereby integrating these; and patterning the first metal foil and/or the second metal foil.
摘要翻译：公开了一种具有无源元件的布线板的制造方法。制造方法包括在第一金属箔和第二金属箔的至少一个第一表面上涂覆电阻浆料和电介质浆料中的一种或两种，每个第一表面具有第一表面和第二表面; 布置具有热塑性和热固性的绝缘板，以便面对第一金属箔的第一表面，并且将第二金属箔的第一表面侧布置成面对不同于表面的表面绝缘板的第一金属箔面; 通过对所配置的第一金属箔，绝缘板和第二金属箔进行堆叠，加压和加热来形成双面布线板，从而将它们集成; 以及图案化第一金属箔和/或第二金属箔。

5. 发明授权

US5818699A Multi-chip module and production method thereof 失效
标题翻译：多芯片模块及其制作方法
公开(公告)号：US5818699A
公开(公告)日：1998-10-06
申请号：US674807
申请日：1996-07-03
申请人： Yoshitaka Fukuoka
发明人： Yoshitaka Fukuoka
IPC分类号： H01L23/10 , H05K1/18 , H01L25/00
CPC分类号： H01L23/10 , H01L2224/05624 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/07802 , H01L2924/09701 , H01L2924/12042 , H01L2924/15192 , H01L2924/16152 , H01L2924/163 , H01L2924/19041 , H01L2924/19104 , H01L2924/19105 , H01L2924/3025
摘要： An approximately lead-free mounting pad is formed on a first surface of a substrate having wiring circuits, and an electronic element having an approximately lead-free electrode is face-down mounted on the first surface. An approximately lead-free bump is formed on the approximately lead-free electrode of an electronic element. Mounting pads and approximately lead-free bumps are electrically and mechanically connected to each other by approximately lead-free conductive resin. An approximately lead-free sealing pattern is formed at the area which encloses the electronic element mounted area, of the first surface of the substrate. A weld ring made of Kovar is brazed onto the sealing pattern with approximately lead-free solder. The opening edge of a sealing cap made of Kovar disposed opposite to the weld ring and the weld ring are bonded at the deposited zone by welding.
摘要翻译：在具有布线电路的基板的第一表面上形成大致无铅的安装焊盘，并且具有大致无铅电极的电子元件面朝下安装在第一表面上。在电子元件的大致无铅电极上形成大致无铅的凸块。安装焊盘和大致无铅的凸块通过大致无铅的导电树脂彼此电连接和机械连接。在包围基板的第一表面的电子元件安装区域的区域处形成大致无铅密封图案。由Kovar制成的焊环用大致无铅焊料钎焊到密封图案上。由与焊接环相对的科瓦尔（Kovar）制成的密封盖的开口边缘和焊接环通过焊接结合在沉积区。

6. 发明授权

US07772684B2 Electronic device and production method thereof 有权
标题翻译：电子装置及其制造方法
公开(公告)号：US07772684B2
公开(公告)日：2010-08-10
申请号：US10980307
申请日：2004-11-04
申请人： Satoru Kuramochi , Yoshitaka Fukuoka
发明人： Satoru Kuramochi , Yoshitaka Fukuoka
IPC分类号： H01L23/02
CPC分类号： H01L21/6835 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/82 , H01L25/0657 , H01L2221/68345 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/32225 , H01L2224/73267 , H01L2224/82001 , H01L2224/92244 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06582 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/07802 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H05K1/185 , H05K3/4602 , H01L2924/00 , H01L2224/83005
摘要： An object is to provide an electronic device of a multilayer structure with high density and high reliability that can be reduced in size while incorporating an electronic component therein, and further provide a production method for easily producing such an electronic device. An electronic device of the present invention includes wiring layers and electrically insulating layers stacked on a core board and establishes predetermined electrical conduction between the wiring layers through upper-lower side conducting vias provided in the electrically insulating layers. An electronic component incorporating layer formed by directly forming on a lower layer an insulating resin layer having a cutout portion for receiving an electronic component therein and upper-lower side conducting vias and by incorporating the electronic component in the cutout portion is provided at least between one of the wiring layers and one of the electrically insulating layers and/or between the core board and the electrically insulating layer. At least the uppermost-layer electronic component incorporating layer of electronic component incorporating layers has a metal frame body surrounding the electronic component and the upper-lower side conducting vias, and a metal cap having a flange portion fixed to the metal frame body of the uppermost-layer electronic component incorporating layer is provided.
摘要翻译：本发明的目的是提供一种具有高密度和高可靠性的多层结构的电子器件，其可以在将电子元件并入的同时减小其尺寸，并且还提供了容易地制造这种电子器件的制造方法。本发明的电子器件包括堆叠在芯板上的布线层和电绝缘层，并且通过设置在电绝缘层中的上下侧导电孔而在布线层之间建立预定的导电。一种电子部件结合层，其通过在下层直接形成具有用于接收电子部件的切口部分的绝缘树脂层和上下侧导电通孔以及通过将电子部件并入切口部而形成的至少一个的布线层和电绝缘层之一和/或芯板与电绝缘层之间。至少具有电子元件结合层的最上层电子部件具有围绕电子部件和上下侧导电通孔的金属框体，金属盖具有固定在最上层的金属框体上的凸缘部提供了层间电子元件结合层。

7. 发明申请

US20060154496A1 Wiring board incorporating components and process for producing the same 有权
标题翻译：包含组件的接线板及其制造方法
公开(公告)号：US20060154496A1
公开(公告)日：2006-07-13
申请号：US10530518
申请日：2003-10-06
申请人： Tatsuro Imamura , Yuji Yamaguchi , Kazuhiro Shinozaki , Satoshi Shibazaki , Yoshitaka Fukuoka , Hiroyuki Hirai , Osamu Shimada , Kenji Sasaoka , Kenichi Matsumura
发明人： Tatsuro Imamura , Yuji Yamaguchi , Kazuhiro Shinozaki , Satoshi Shibazaki , Yoshitaka Fukuoka , Hiroyuki Hirai , Osamu Shimada , Kenji Sasaoka , Kenichi Matsumura
IPC分类号： H01R12/00
CPC分类号： H05K1/184 , H05K1/023 , H05K1/186 , H05K3/3442 , H05K3/4602 , H05K2201/10636 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49146 , Y10T29/49147 , Y10T29/49155 , Y10T29/49165 , Y10T29/49789 , Y10T29/49798
摘要： To provide a component built-in wiring board and a manufacturing method thereof capable of further improving component mounting density without deteriorating reliability. The component built-in wiring board includes: a conductive layer (34, 35) extending in a thickness direction of the board and buried in the board without being exposed from an upper and a lower surface of the board; an electrical/electronic component (33) having a terminal and buried in the board with the terminal facing the buried conductive layer; a connecting member (36, 37) provided in a gap between the terminal of the buried electrical/electronic component and the conductive layer to electrically/mechanically connect the terminal and the conductive layer; and two upper and lower insulating layers (11, 15) which cover an outer surface of the buried electrical/electronic component excluding a portion connected to the connecting member and which are in close contact with a top and a bottom in the board thickness direction of the electrical/electronic component.
摘要翻译：提供一种组件内置布线板及其制造方法，其能够进一步提高部件安装密度而不劣化可靠性。所述部件内置布线板包括：导电层（34,35），其在所述板的厚度方向上延伸并埋设在所述板中而不暴露于所述板的上表面和下表面; 一个电子/电子部件（33），具有一个终端并埋设在该电路板中，该端子面向该掩埋的导电层; 设置在掩埋电气/电子部件的端子与导电层之间的间隙中的电连接/机械连接端子和导电层的连接件（36,37）; 以及两个覆盖所述埋入的电气/电子部件的外表面的绝缘层（11,15），除了连接到所述连接构件的部分之外，所述外部表面与所述电气/电子部件的板厚方向上的顶部和底部紧密接触电气/电子部件。

8. 发明授权

US06237218B1 Method and apparatus for manufacturing multilayered wiring board and multi-layered wiring board 有权
标题翻译：制造多层布线板和多层布线板的方法和装置
公开(公告)号：US06237218B1
公开(公告)日：2001-05-29
申请号：US09355438
申请日：1999-07-28
申请人： Akira Ogawa , Yoshitaka Fukuoka
发明人： Akira Ogawa , Yoshitaka Fukuoka
IPC分类号： H05K336
CPC分类号： H05K3/4638 , H05K3/0008 , H05K3/4614 , H05K2203/166 , Y10T29/49126 , Y10T29/49155 , Y10T29/53178 , Y10T29/53183 , Y10T428/24917
摘要： A method for manufacturing multi-layered wiring board in which the positions of alignment marks are detected by irradiating a base material with X rays, and the position of the base material is corrected in accordance with the detected positions of the alignment marks. Then, the aligned base material is successively laminated upon another so as to improve the lamination accuracy. In the method, in addition, such a constitution is adopted that, when the laminating process is repeated twice or more, the position of each base material is corrected by offsetting the base material from the laminating position and the base material is laminated upon another base material at the laminating position by backing the base material to the laminating position. Namely, the positional displacement between the base materials to be laminated upon another is corrected by deciding the position of each base material against the preset optical axis of X rays. When such a constitution is adopted, a plurality of base materials can be laminated upon another with accuracy.
摘要翻译：一种制造多层布线板的方法，其中通过用X射线照射基材来检测对准标记的位置，并且根据检测到的对准标记的位置校正基材的位置。然后，对准的基材依次层压在另一个上，以提高层压精度。在该方法中，另外，采用这样的结构，当层叠处理重复两次以上时，通过将基材从层叠位置偏移来校正各基材的位置，并且将基材层压在另一基材上通过将基材背衬到层压位置在层压位置处的材料。也就是说，通过根据X射线的预设光轴确定每个基底材料的位置来校正待叠层的基材之间的位置偏移。当采用这种结构时，可以精确地将多个基材层压在另一个上。

9. 发明授权

US5949654A Multi-chip module, an electronic device, and production method thereof 失效
标题翻译：多芯片模块，电子设备及其制造方法
公开(公告)号：US5949654A
公开(公告)日：1999-09-07
申请号：US9383
申请日：1998-01-20
申请人： Yoshitaka Fukuoka
发明人： Yoshitaka Fukuoka
IPC分类号： H01L21/50 , H01L23/10 , H01L23/538 , H05K1/03 , H05K3/34 , H05K1/18 , H01L25/00
CPC分类号： H01L23/5383 , H01L21/50 , H01L23/10 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01012 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/07802 , H01L2924/09701 , H01L2924/12042 , H01L2924/15192 , H01L2924/16152 , H01L2924/163 , H01L2924/19041 , H01L2924/19105 , H01L2924/3025 , H05K1/0306 , H05K3/3463
摘要： A substantially lead-free mounting pad is formed on a first surface of a substrate having wiring circuits, and an electronic element having a substantially lead-free electrode is face-down mounted on the first surface. A substantially lead-free bump is formed on the substantially lead-free electrode of an electronic element. Mounting pads and substantially lead-free bumps are electrically and mechanically connected to each other by substantially lead-free conductive resin. A substantially lead-free sealing pattern is formed at the area which encloses the electronic element mounted area, of the first surface of the substrate. A weld ring made of Kovar is brazed onto the sealing pattern with substantially lead-free solder. The opening edge of a sealing cap made of Kovar disposed opposite to the weld ring and the weld ring are bonded at the deposited zone by welding.
摘要翻译：在具有布线电路的基板的第一表面上形成基本上无铅的安装焊盘，并且具有大致无铅电极的电子元件面朝下安装在第一表面上。在电子元件的基本上无铅的电极上形成基本无铅的凸点。安装焊盘和基本无铅的凸块通过基本上无铅的导电树脂彼此电连接和机械连接。在包围基板的第一表面的电子元件安装区域的区域处形成基本无铅的密封图案。由Kovar制成的焊环用基本无铅焊料钎焊到密封图案上。由与焊接环相对的科瓦尔（Kovar）制成的密封盖的开口边缘和焊接环通过焊接结合在沉积区。

10. 发明授权

US5915753A Method of producing a high-density printed wiring board for mounting 失效
标题翻译：制造用于安装的高密度印刷线路板的方法
公开(公告)号：US5915753A
公开(公告)日：1999-06-29
申请号：US8494
申请日：1998-01-16
申请人： Tomohisa Motomura , Osamu Shimada , Yoshitaka Fukuoka
发明人： Tomohisa Motomura , Osamu Shimada , Yoshitaka Fukuoka
IPC分类号： H01L21/48 , H01L21/60 , H01L23/12 , H05K1/11 , H05K1/18 , H05K3/06 , H05K3/24 , H05K3/34 , H05K3/40 , H05K3/42 , H05K3/46 , H05K3/36
CPC分类号： H05K3/4617 , H01L21/4857 , H01L21/486 , H05K1/113 , H05K3/4007 , H05K3/4647 , H01L2224/16 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H05K2201/0347 , H05K2201/0355 , H05K2201/0367 , H05K2201/0394 , H05K2201/10674 , H05K2203/0733 , H05K2203/1189 , H05K3/243 , H05K3/423 , Y10T29/49126 , Y10T29/49153
摘要： A method of producing a high-density wiring board for mounting comprises the steps of providing an electroconductive metallic film on the main surface thereof with a photosensitive resist layer, subjecting the photosensitive resist layer to selective exposure to light and development thereby forming holes for selectively exposing the surface of the electroconductive metallic foil in the photosensitive resist layer, depositing an electroconductive metal by plating on the exposed surface of the electroconductive metallic foil thereby forming electroconductive bumps thereon, peeling off the remainder of the photosensitive resist layer, superposing an insulating polymer sheet on the electroconductive bump forming surface, pressing the resultant superposed layers so that the electroconductive bumps to pierce the polymer sheet in the direction of thickness thereof and allowing the leading end parts of the electroconductive bumps to emerge from the polymer sheet and give rise to connecting terminal parts, and selectively etching off the electroconductive metallic foil thereby forming a wiring pattern.
摘要翻译：一种制造用于安装的高密度布线板的方法包括以下步骤：在其主表面上提供导电金属膜，其具有光敏抗蚀剂层，使光敏抗蚀剂层选择性地曝光和显影，从而形成用于选择性曝光的孔在感光性抗蚀剂层中的导电金属箔的表面，通过电镀在导电金属箔的暴露表面上沉积导电金属，从而在其上形成导电凸起，剥离光敏抗蚀剂层的其余部分，将绝缘聚合物片叠加在导电凸块形成表面，压制所得到的叠置层，使得导电凸块在其厚度方向上刺穿聚合物片材，并允许导电凸起的前端部分从聚合物片材出射并产生连接并且选择性地蚀刻掉导电金属箔，从而形成布线图案。

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