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1. 发明授权

US5764999A Enhanced system management mode with nesting 失效
标题翻译：增强的系统管理模式与嵌套
公开(公告)号：US5764999A
公开(公告)日：1998-06-09
申请号：US541359
申请日：1995-10-10
申请人： Christopher G. Wilcox , Joseph F. Baldwin , Xiaoli Y. Mendyke
发明人： Christopher G. Wilcox , Joseph F. Baldwin , Xiaoli Y. Mendyke
IPC分类号： G06F13/10 , G06F9/455 , G06F9/46 , G06F9/48 , G06F12/02 , G06F11/00
CPC分类号： G06F9/4812 , G06F9/45533 , G06F12/0284
摘要： An enhanced system management mode (SMM) includes nesting of SMI (system management interrupt) routines for handling SMI events. Enhanced SMM is implemented in an computer system to support a Virtual System Architecture (VSA) in which peripheral hardware, such as for graphics and/or audio functions, is virtualized (simulated by SMI routines). Reentrant VSA/SMM software (handler) includes VSA/SMI routines invoked either by (a) SMI interrupts, such as from non-virtualized peripheral hardware such as audio FIFO buffers, or (b) SMI traps, such as from accesses to memory mapped or I/O space allocated to a virtualized peripheral function. SMI nesting permits a currently active VSA/SMI routine to be preempted by another (higher priority) SMI event. The SMM memory region includes an SMI header segment and a VSA/SMM software segment--the SMI header segment is organized as a quasi-stack into which nested SMI headers are saved. The VSA/SMM software manages an SMHR register that points to the location for storing the SMI header for a currently active VSA/SMI routine if it is preempted by an SMI event. To improve performance, the entire SMM region is mapped into cacheable system memory. Features that support virtualization include: (a) SMI nesting, (b) SMI trapping for memory (as well as I/O) accesses, (c) caching both VSA/SMI headers and VSA/SMM software, and (d) configuring the SMM region for storing multiple SMI headers at programmable locations.
摘要翻译：增强的系统管理模式（SMM）包括用于处理SMI事件的SMI（系统管理中断）例程的嵌套。增强的SMM在计算机系统中实现以支持虚拟系统架构（VSA），其中诸如用于图形和/或音频功能的外围硬件被虚拟化（由SMI程序模拟）。可重入VSA / SMM软件（处理程序）包括通过（a）SMI中断（例如来自诸如音频FIFO缓冲器的非虚拟化外围硬件）或（b）SMI陷阱（诸如从存储器映射的访问）调用的VSA / SMI例程或分配给虚拟化外设功能的I / O空间。 SMI嵌套允许当前活动的VSA / SMI例程被另一个（较高优先级）的SMI事件抢占。 SMM存储器区域包括SMI标题段和VSA / SMM软件段 - SMI标题段被组织成其中保存嵌套SMI标题的准堆栈。 VSA / SMM软件管理一个SMHR寄存器，如果它被SMI事件抢占，则SMHR寄存器指向用于存储当前活动的VSA / SMI例程的SMI头的位置。为了提高性能，整个SMM区域被映射到可缓存的系统内存中。支持虚拟化的特性包括：（a）SMI嵌套，（b）存储器（以及I / O）访问的SMI陷阱，（c）缓存VSA / SMI头和VSA / SMM软件，以及（d）配置 SMM区域，用于在可编程位置存储多个SMI头。

2. 发明授权

US5860105A NDIRTY cache line lookahead 失效
标题翻译： NDIRTY高速缓存行前瞻
公开(公告)号：US5860105A
公开(公告)日：1999-01-12
申请号：US557977
申请日：1995-11-13
申请人： Mark W. McDermott , Robert W. French , Antone L. Fourcroy , Mark E. Burchfield , Xiaoli Y. Mendyke
发明人： Mark W. McDermott , Robert W. French , Antone L. Fourcroy , Mark E. Burchfield , Xiaoli Y. Mendyke
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0804 , G06F12/0891
摘要： An NDIRTY cache line lookahead technique is used to expedite cache flush and export operations by providing a mechanism to avoid scanning at least some cache lines that do not contain dirty data (and therefore will not have to be exported). The exemplary cache organization uses one-line lookahead where each cache line but the last has associated with it an NDIRTY bit that indicates whether the next cache line contains dirty data. For cache flush and export operations, when a cache line (N) is read to check for dirty data that must be exported, the NDIRTY bit for that cache line is also tested to determine whether the next cache line (N+1) contains dirty data--if the NDIRTY bit is clear, indicating that the next cache line is clean, then that line is skipped and the scan proceeds with the line after that (N+2). This exemplary one-line lookahead implementation is readily extendible to N-line lookahead. The cache line lookahead technique reduces the number of cache line accesses required during flush/export operations, with the attendant advantages of reduced flush/export penalty cycles and power, thereby improving overall system performance.
摘要翻译： NDIRTY高速缓存行前瞻技术用于通过提供一种机制来避免扫描至少一些不包含脏数据的缓存行（因此不必被导出）来加速缓存刷新和导出操作。示例性高速缓存组织使用单行前瞻，其中每个高速缓存行但最后一行与其相关联的NDIRTY位指示下一个高速缓存行是否包含脏数据。对于缓存刷新和导出操作，当读取高速缓存行（N）以检查必须导出的脏数据时，还会测试该高速缓存行的NDIRTY位，以确定下一个高速缓存行（N + 1）是否包含脏数据 - 如果NDIRTY位清除，表示下一个高速缓存行是干净的，那么该行被跳过，扫描将继续进行（N + 2）之后的行。这种示例性的单行前瞻实现可以容易地扩展到N行前瞻。高速缓存行前瞻技术减少了刷新/导出操作期间所需的高速缓存行访问次数，同时具有降低冲洗/导出惩罚周期和功率的优点，从而提高了整体系统性能。

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