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1. 外观设计

USD959611S1 Faucet 有权
公开(公告)号：USD959611S1
公开(公告)日：2022-08-02
申请号：US29785254
申请日：2021-05-25
申请人： Xiaojun Yang
设计人： Xiaojun Yang

2. 发明授权

US09846625B2 Method and device for debugging a MIPS-structure CPU with southbridge and northbridge chipsets 有权
公开(公告)号：US09846625B2
公开(公告)日：2017-12-19
申请号：US13806784
申请日：2011-05-20
申请人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Shengjie Liu , Zhibin Hao , Faqing Liang , Wenhao Yao
发明人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Shengjie Liu , Zhibin Hao , Faqing Liang , Wenhao Yao
IPC分类号： G06F11/22 , G06F11/36
CPC分类号： G06F11/2236 , G06F11/221 , G06F11/3648
摘要： The present invention discloses a method and a device to debug the Loongson CPU (a MIPS-structure CPU) and bridge chips. The device, including HT bus interfaces and the corresponding switches, connects the Loongson CPU and bridge chips through HT bus interfaces. Southbridge chips and northbridge chips with HT buses are selected in the following order: introducing the pins on the Loongson CPU and bridge chips into the debug device; debugging the pins on the Loongson CPU to identify whether there are any bugs with the pins; connecting the pins from the CPU and bridge chips to debug them. If the HT bus of the Loongson CPU fails to accord with the standard protocol, the problematic signal can be identified and further adjusted to improve the CPU. With the help of FPGA, multiple HT bus interfaces can be simulated. As a result, multiple chipsets can be linked to the Loongson CPU, which may be debugged simultaneously.

3. 发明申请

US20140157051A1 METHOD AND DEVICE FOR DEBUGGING A MIPS-STRUCTURE CPU WITH SOUTHBRIDGE AND NORTHBRIDGE CHIPSETS 有权
标题翻译：用于调整MIPS结构CPU的方法和装置，其中包括南瓜和北极巧克力
公开(公告)号：US20140157051A1
公开(公告)日：2014-06-05
申请号：US13806784
申请日：2011-05-20
申请人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Zhibin Hao , Faqing Liang , Wenhao Yao
发明人： Zongyou Shao , Xinchun Liu , Xiaojun Yang , Chenming Zheng , Ying Wang , Hui Wang , Zhibin Hao , Faqing Liang , Wenhao Yao
IPC分类号： G06F11/22
CPC分类号： G06F11/2236 , G06F11/221 , G06F11/3648
摘要： The present invention discloses a method and a device to debug the Loongson CPU (a MIPS-structure CPU) and bridge chips. The device, including HT bus interfaces and the corresponding switches, connects the Loongson CPU and bridge chips through HT bus interfaces. Southbridge chips and northbridge chips with HT buses are selected in the following order: introducing the pins on the Loongson CPU and bridge chips into the debug device; debugging the pins on the Loongson CPU to identify whether there are any bugs with the pins; connecting the pins from the CPU and bridge chips to debug them. If the HT bus of the Loongson CPU fails to accord with the standard protocol, the problematic signal can be identified and further adjusted to improve the CPU. With the help of FPGA, multiple HT bus interfaces can be simulated. As a result, multiple chipsets can be linked to the Loongson CPU, which may be debugged simultaneously.
摘要翻译：本发明公开了一种用于调试龙芯CPU（MIPS结构CPU）和桥芯片的方法和装置。该器件包括HT总线接口和相应的交换机，通过HT总线接口连接龙芯CPU和桥芯片。南桥芯片和HT总线的北桥芯片按以下顺序选择：将龙芯CPU引脚和桥芯片引入调试设备; 调试龙芯CPU上的引脚，以确定引脚是否有任何错误; 连接CPU和桥接芯片的引脚进行调试。如果龙芯CPU的HT总线不符合标准协议，则可以识别并进一步调整有问题的信号以改善CPU。借助FPGA，可以模拟多个HT总线接口。因此，多个芯片组可以连接到可以同时调试的龙芯CPU。

4. 发明申请

US20120005393A1 ELECTRICAL AND ELECTRONIC SYSTEM HAVING AN ELECTRICAL CENTER FOR A VEHICLE 有权
标题翻译：具有用于车辆的电气中心的电气和电子系统
公开(公告)号：US20120005393A1
公开(公告)日：2012-01-05
申请号：US13175003
申请日：2011-07-01
申请人： HAWKING HU , XIAOJUN YANG , JUNJIE XU
发明人： HAWKING HU , XIAOJUN YANG , JUNJIE XU
IPC分类号： G06F13/20
CPC分类号： G06F13/385 , H04L12/40006 , H04L2012/40215 , H04L2012/40234 , H04L2012/40273
摘要： An electrical and electronic system having a control unit connected to a remotely located electrical center by way of a data bus. The electrical center includes a bus interface unit and a main printed circuit board having a plurality of control devices such as relays, which selectively activate vehicle electrical circuits based on instructions from the control unit. The bus interface unit is that of a daughter board configured to be plugged into the main board of the electrical center, such as a Local Interconnect Network (LIN) interface board, and the data bus may be a LIN bus.
摘要翻译：一种具有通过数据总线连接到远程位置的电气中心的控制单元的电气和电子系统。电气中心包括总线接口单元和具有多个控制装置（例如继电器）的主印刷电路板，其基于来自控制单元的指令选择性地激活车辆电路。总线接口单元是被配置为插入电气中心主板的子板的总线接口单元，例如本地互连网络（LIN）接口板，并且数据总线可以是LIN总线。

5. 发明申请

US20080107168A1 Advanced Digital Receiver 有权
标题翻译：高级数字接收机
公开(公告)号：US20080107168A1
公开(公告)日：2008-05-08
申请号：US11547816
申请日：2005-04-08
申请人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
发明人： Jingsong Xia , Shidong Chen , Richard W. Citta , Gopalan Krishnamurthy , Scott M. Lopresto , David A. Willming , Xiaojun Yang , Jilian Zhu
IPC分类号： H04L27/01
CPC分类号： H04L25/03057 , H04L1/006 , H04L7/0062 , H04L7/042 , H04L25/0212
摘要： A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.
摘要翻译：用于处理从信道接收的信号的数字接收机包括耦合到数字解调器的数字解调器和均衡器。均衡器包括前馈滤波器和判决反馈均衡器（DFE），其中前馈滤波器包括多个前馈滤波器抽头。系数与多个前馈滤波器抽头相关联，并且动态地确定与多个前馈滤波器抽头相关联的所有系数的值。

6. 发明授权

US08449701B2 Acoustic baffle members and methods for applying acoustic baffles in cavities 有权
标题翻译：声挡板构件和在空腔中应用隔音板的方法
公开(公告)号：US08449701B2
公开(公告)日：2013-05-28
申请号：US13129136
申请日：2008-11-26
申请人： Mark P. Allen , Tao Chen , Jay M. Tudor , Matthew J. Turpin , Thomas Mettler , Bin Chen , Xiaochun Liu , Xiaojun Yang
发明人： Mark P. Allen , Tao Chen , Jay M. Tudor , Matthew J. Turpin , Thomas Mettler , Bin Chen , Xiaochun Liu , Xiaojun Yang
IPC分类号： B29C44/12 , B32B3/24 , B32B3/30
CPC分类号： G10K11/16 , B60R13/08 , B60R13/0815 , B62D29/002 , Y10T428/24322 , Y10T428/24496 , Y10T428/2457 , Y10T428/249953 , Y10T428/249987
摘要： An uncured acoustic absorbing member for cavity sealing comprises a thermally inert carrier (8, 28) and a thermally expandable material (6, 26) applied to the carrier (8, 28). The carrier (8, 28) contains openings (3) which become covered when the thermally expandable material (6, 26) is expanded to seal the cavity. The thermally expandable material (6, 26) may be in the form of substantially discontinuous segments (25) having an area in the range of 0.25 to 400 mm2. The substantially discontinuous segments (25) provide a highly uniform expansion of the material when it is thermally expanded. The acoustic absorbing members are particularly useful for sealing automotive cavities to provide acoustical abatement and to prevent the entry of fluids into the cavity.
摘要翻译：用于腔密封的未固化的吸声构件包括施加到载体（8,28）的热惰性载体（8,28）和可热膨胀的材料（6,26）。载体（8,28）包含当热膨胀性材料（6,26）膨胀以密封空腔时被覆盖的开口（3）。可热膨胀材料（6,26）可以是具有在0.25至400mm 2范围内的面积的基本上不连续的段（25）的形式。基本不连续的部分（25）在热膨胀时提供高度均匀的材料膨胀。吸音构件特别适用于密封汽车空腔以提供消声和防止流体进入空腔。

7. 发明申请

US20080260014A1 Apparatus for and Method of Controlling a Feedforward Filter of an Equalizer 有权
标题翻译：控制均衡器前馈滤波器的装置和方法
公开(公告)号：US20080260014A1
公开(公告)日：2008-10-23
申请号：US11547937
申请日：2005-04-08
申请人： Xiaojun Yang , Richard W. Citta , Scott M. Lopresto
发明人： Xiaojun Yang , Richard W. Citta , Scott M. Lopresto
IPC分类号： H04L27/01
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of synchronizing a feedforward filter (46) that receives a signal resulting from the transmission of a series of symbols through a channel, wherein the series of symbols includes a predetermined sequence of symbols includes the step of developing a plurality of samples from the received symbols (60), wherein a sequence of samples corresponds to the predetermined sequence of symbols. The method further includes the steps of estimating a channel impulse response from the plurality of samples, calculating a characteristic of the channel impulse response, and synchronizing (54) the feedforward filter in accordance with the estimated channel impulse response.
摘要翻译：一种同步前馈滤波器（46）的方法，所述前馈滤波器（46）通过信道接收由一系列符号的传输产生的信号，其中所述一系列符号包括预定的符号序列包括从接收到的多个样本开发多个样本的步骤符号（60），其中样本序列对应于所述预定符号序列。该方法还包括以下步骤：估计来自多个样本的信道脉冲响应，计算信道脉冲响应的特性，以及根据所估计的信道脉冲响应来同步（54）前馈滤波器。

8. 发明授权

US07376181B2 Transposed structure for a decision feedback equalizer combined with a trellis decoder 有权
标题翻译：用于与网格解码器组合的判决反馈均衡器的转置结构
公开(公告)号：US07376181B2
公开(公告)日：2008-05-20
申请号：US10407610
申请日：2003-04-04
申请人： Shidong Chen , Jilian Zhu , Xiaojun Yang
发明人： Shidong Chen , Jilian Zhu , Xiaojun Yang
IPC分类号： H03K5/159
CPC分类号： H04L1/006 , H04L1/0054 , H04L25/03057 , H04L25/03203 , H04L25/03267
摘要： A DFE comprises a trellis decoder and a plurality of sub-filter pipelines. Each of the plurality of sub-filter pipelines is fed intermediate decoded symbols of one of the stages in a trace-back chain of a current decoding bank. The DFE output is formed by summing the plurality of sub-filter pipelines.
摘要翻译： DFE包括网格解码器和多个子滤波器管线。多个子滤波器管线中的每一个被馈送到当前解码库的追溯链中的一个级的中间解码符号。 DFE输出通过对多个子滤波器管线相加来形成。

9. 发明申请

US20080106138A1 WEAR-RESISTANT CUTTING BIT 审中-公开
标题翻译：耐磨切割机
公开(公告)号：US20080106138A1
公开(公告)日：2008-05-08
申请号：US11935434
申请日：2007-11-06
申请人： Xiaojun YANG
发明人： Xiaojun YANG
IPC分类号： B25D17/02
CPC分类号： B25D17/02 , B25D2222/51 , E21C35/183 , E21C2035/1809
摘要： Taught is a wear-resistant cutting bit for breaking or excavating machines, comprising a carbide alloy bit tip and a bit body, wherein a plurality of wear-resistant members is installed on the bit body around the carbide alloy bit tip. In accordance with the present invention, the strength, hardness, and wear resistance of the bit body are improved largely, alleviating conventional problems of wear and fatigue and reinforcing the attachment of the bit tip. The early failure of the bit tip due to the premature wear of the bit body is overcome; and the lifetime of the bit is increased 2 to 3-fold with respect to that of a conventional bit.
摘要翻译：授课是用于破碎或挖掘机器的耐磨切削刀头，包括碳化物合金钻头头和钻头体，其中多个耐磨构件安装在碳化物合金钻头尖端周围的钻头体上。根据本发明，钻头体的强度，硬度和耐磨性大大提高，减轻了磨损和疲劳的常规问题，并且加强了钻头尖端的附着。由于钻头体的过早磨损引起的尖端的早期失效被克服; 并且该位的寿命相对于传统的位的寿命增加了2至3倍。

10. 发明申请

US20080049871A1 Apparatus for and Method of Controlling a Sampling Frequency of a Sampling Device 有权
标题翻译：控制取样装置采样频率的装置及方法
公开(公告)号：US20080049871A1
公开(公告)日：2008-02-28
申请号：US11547741
申请日：2005-04-08
申请人： Xiaojun Yang , Richard W. Citta , Scott M. Lopresto
发明人： Xiaojun Yang , Richard W. Citta , Scott M. Lopresto
IPC分类号： H04L27/06 , H03D1/06 , H03H7/30 , H04L27/10 , H04L27/22 , H03H7/40 , H03K5/159
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of controlling sampling frequency of a sampling device (40), where the sampling device (40) generates samples (62) in response to the receipt of a signal (20) resulting from a transmission of a series of symbols through a channel, the method including the steps of estimating (46) a channel impulse response of the channel from the samples, calculating a characteristic of the channel impulse response estimate, and determining (52) the sampling frequency in accordance with the characteristic.
摘要翻译：一种控制采样设备（40）的采样频率的方法，其中采样设备（40）响应于通过信道传输一系列符号而产生的信号（20）而产生采样（62）该方法包括以下步骤：从样本估计（46）信道的信道脉冲响应，计算信道脉冲响应估计的特性，以及根据特性确定（52）采样频率。

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