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1. 发明申请

US20100301947A1 RF POWER AMPLIFIER 审中-公开
标题翻译：射频功率放大器
公开(公告)号：US20100301947A1
公开(公告)日：2010-12-02
申请号：US12814881
申请日：2010-06-14
申请人： Toru Fujioka , Toshihiko Shimizu , Masami Ohnishi , Hidetoshi Matsumoto , Satoshi Tanaka
发明人： Toru Fujioka , Toshihiko Shimizu , Masami Ohnishi , Hidetoshi Matsumoto , Satoshi Tanaka
IPC分类号： H03F3/68
CPC分类号： H03G3/004 , H03F1/02 , H03F1/0266 , H03F1/0277 , H03F1/0288 , H03F3/195 , H03F3/211 , H03F3/24 , H03F2200/108 , H03F2200/181 , H03F2200/432 , H03F2200/451 , H03F2200/456 , H04B2001/045
摘要： The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.
摘要翻译： RF功率放大器包括作为在输入端子RF_In和输出端子RF_Out之间并联连接的最终级放大功率器件的第一和第二放大器Q1和Q2。放大器Q1和Q2形成在一个半导体芯片上。放大器Q1的第一偏置电压Vg1被设置为高于放大器Q2的第二偏置电压Vg2，使得放大器Q1在B类和AB之间工作，并且Q2在C类中可操作。第一有效器件尺寸放大器Q1的Wgq1被有意地设置为小于放大器Q2的第二有效器件尺寸Wgq2超过半导体芯片的制造误差的范围。无论输出功率是高还是低，都能实现具有高功率附加效率特性的RF功率放大器。

2. 发明授权

US06825548B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06825548B2
公开(公告)日：2004-11-30
申请号：US10455458
申请日：2003-06-06
申请人： Toru Fujioka , Isao Yoshida , Toshihiko Shimizu
发明人： Toru Fujioka , Isao Yoshida , Toshihiko Shimizu
IPC分类号： H01L23495
CPC分类号： H01L23/66 , H01L21/823425 , H01L21/823475 , H01L23/4824 , H01L24/45 , H01L24/48 , H01L24/49 , H01L29/4175 , H01L29/41758 , H01L29/7835 , H01L2224/45015 , H01L2224/45124 , H01L2224/48091 , H01L2224/48472 , H01L2224/49113 , H01L2224/49175 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01031 , H01L2924/01032 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/10329 , H01L2924/1305 , H01L2924/1306 , H01L2924/13063 , H01L2924/13064 , H01L2924/13091 , H01L2924/15787 , H01L2924/19041 , H01L2924/20755 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00014 , H01L2924/00
摘要： It is to be made possible to eliminate unevenness of the inductances of bonding wires and to reduce the size of semiconductor devices. Over the surface of a semiconductor device in whose MISFET formation area a MISFET comprising a plurality of unit MISFETs connected in parallel, gate electrode pads electrically connected to the gate electrode of the MISFET and drain electrode pads electrically connected to the drain electrode of the same are arranged in a row each. The intervals of the gate electrode pads become gradually shorter from the end areas towards the central area of the electrode array of the gate electrode pads. The intervals of the drain electrode pads also become gradually shorter from the end areas towards the central area of the electrode array of the drain electrode pads.
摘要翻译：可以消除接合线的电感的不均匀性并减小半导体器件的尺寸。在其MISFET形成区域中包括并联连接的多个单位MISFET的MISFET的半导体器件的表面上，与MISFET的栅电极电连接的栅极电极焊盘和与该漏极电极连接的漏电极焊盘是排列成排。栅极电极焊盘的间隔从栅极电极焊盘的电极阵列的端部区域朝向中心区域逐渐变短。漏电极焊盘的间隔也从漏电极焊盘的电极阵列的端部区域朝向中心区域逐渐变短。

3. 发明授权

US06384688B1 High-frequency power amplifier module 失效
标题翻译：高频功率放大器模块
公开(公告)号：US06384688B1
公开(公告)日：2002-05-07
申请号：US09673977
申请日：2000-10-25
申请人： Toru Fujioka , Isao Yoshida , Mineo Katsueda , Masatoshi Morikawa , Yoshikuni Matsunaga , Kenji Sekine , Osamu Kagaya
发明人： Toru Fujioka , Isao Yoshida , Mineo Katsueda , Masatoshi Morikawa , Yoshikuni Matsunaga , Kenji Sekine , Osamu Kagaya
IPC分类号： H03F304
CPC分类号： H03F3/72 , H03F3/193 , H03F3/211 , H03F2200/306 , H03F2200/309 , H03F2200/39 , H03F2200/429 , H04B1/0053 , H04B1/0458
摘要： A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive the first frequency f1 and the second frequency f2 (f2=2×f1) is structured as explained below. This radio frequency power amplifier module for dual-band type mobile communication apparatus is comprised of a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor. The output circuit is constituted of a transmission line connected to the drain end of the output transistor, a parallel resonance circuit connected in series to the transmission line to resonate at the harmonics in the frequency twice the frequency f2, a series resonance circuit provided between one end of the resonance circuit and the ground to resonate at the harmonics in the frequency twice the frequency f2 and an output matching circuit provided in series to the other end of the parallel resonance circuit for the matching with f1 and f2. The transmission line is set to terminate at the drain end for the even number order harmonics of f2 with the reactance existing at the drain end and a circuit element constant forming the parallel resonance circuit is set to open at the drain end for the odd number order harmonics of f2 with the series resonance circuit, transmission line and reactance existing at the drain end. With the structure explained above, since harmonics power can be controlled through control of the predetermined harmonics, high efficiency and reduction in size of the radio frequency power amplifier module can be realized.
摘要翻译：可以发送和接收第一频率f1和第二频率f2（f2 = 2xf1）的用于双频带型移动通信装置的射频功率放大器模块如下所述地构成。该射频功率放大器模块用于双频型移动通信装置包括具有匹配电路的具有在f1和f2的增益峰值的驱动级放大器和包括射频功率输出晶体管的射频功率输出电路。输出电路由连接到输出晶体管的漏极端的传输线构成，并联谐振电路与传输线串联连接，以频率f2的频率谐振地谐振，串联谐振电路设置在一个谐振电路的端部和谐振频率为频率f2的频率的谐波的接地和与并联谐振电路的另一端串联设置以用于与f1和f2匹配的输出匹配电路。传输线被设置为在漏极端处终止，其中存在于漏极端处的电抗的偶数次谐波为f2，并且形成并联谐振电路的电路元件常数设置为在漏极端处为奇数阶开路具有串联谐振电路的f2谐波，漏极端存在的传输线和电抗。通过上述结构，由于能够通过控制预定谐波来控制谐波功率，高效率和减小射频功率放大器的尺寸模块可以实现。

4. 发明授权

US5215643A Electrochemical gas sensor 失效
标题翻译：电化学气体传感器
公开(公告)号：US5215643A
公开(公告)日：1993-06-01
申请号：US364437
申请日：1989-04-28
申请人： Shigekazu Kusanagi , Toru Fujioka , Ayumu Yasuda , Noriyuki Yamaga , Yoshifumi Watabe , Kenji Doi , Keiji Kakite , Koichi Aizawa , Hitoshi Kanagawa
发明人： Shigekazu Kusanagi , Toru Fujioka , Ayumu Yasuda , Noriyuki Yamaga , Yoshifumi Watabe , Kenji Doi , Keiji Kakite , Koichi Aizawa , Hitoshi Kanagawa
IPC分类号： G01N27/49
CPC分类号： G01N27/4045
摘要： An electrochemical gas sensor comprises an insulating substrate, active and counter electrodes disposed on a surface of the insulating substrate mutually spaced to have respectively reactive portions, a reference electrode spaced from the active and counter electrodes and having a reactive portion, and a solid electrolyte layer formed to cover the reactive portions of the active, counter and reference electrodes, whereby the sensitivity to gases of the active electrode is improved and stabilized.
摘要翻译： PCT No.PCT / JP89 / 00182 Sec。 371日期1989年4月28日第 102（e）日期1989年4月28日PCT提交1989年2月23日PCT公布。出版物WO89 / 08249 日本1989年9月8日。电化学气体传感器包括绝缘基板，设置在绝缘基板的表面上的有源和对电极互相间隔开，以分别具有反应部分，与有源和对电极间隔开的参考电极，以及固体电解质层，其形成为覆盖有源电极，反向电极和参考电极的反应部分，从而改善并稳定了对有源电极的气体的敏感性。

5. 发明授权

US08426941B2 Semiconductor chip comprising a directional coupler having a specific main line and sub-line arrangement 有权
标题翻译：半导体芯片包括具有特定主线和分线布置的定向耦合器
公开(公告)号：US08426941B2
公开(公告)日：2013-04-23
申请号：US13666248
申请日：2012-11-01
申请人： Satoshi Sakurai , Satoshi Goto , Toru Fujioka
发明人： Satoshi Sakurai , Satoshi Goto , Toru Fujioka
IPC分类号： H01L27/06 , H01L23/528
CPC分类号： H01L27/088 , H01L21/823425 , H01L23/66 , H01L24/48 , H01L24/49 , H01L27/0629 , H01L27/0635 , H01L2223/6644 , H01L2224/48227 , H01L2224/49111 , H01L2224/49171 , H01L2924/00014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/12041 , H01L2924/1305 , H01L2924/13091 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01P5/184 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A technique capable of promoting miniaturization of an RF power module used in a mobile phone etc. is provided. A directional coupler is formed inside a semiconductor chip in which an amplification part of the RF power module is formed. A sub-line of the directional coupler is formed in the same layer as a drain wire coupled to the drain region of an LDMOSFET, which will serve as the amplification part of the semiconductor chip. Due to this, the predetermined drain wire is used as a main line and the directional coupler is configured by a sub-line arranged in parallel to the main line via an insulating film, together with the main line.
摘要翻译：提供了一种能够促进移动电话等中使用的RF功率模块的小型化的技术。定向耦合器形成在其中形成RF功率模块的放大部分的半导体芯片内部。定向耦合器的子线形成在与作为半导体芯片的放大部分的LDMOSFET的漏极区域的漏极线相同的层中。由此，预定的漏极线用作主线，并且定向耦合器与主线一起经由绝缘膜与由主线平行布置的子线构成。

6. 发明申请

US20130056730A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130056730A1
公开(公告)日：2013-03-07
申请号：US13666248
申请日：2012-11-01
申请人： Satoshi SAKURAI , Satoshi GOTO , Toru FUJIOKA
发明人： Satoshi SAKURAI , Satoshi GOTO , Toru FUJIOKA
IPC分类号： H01L25/16
CPC分类号： H01L27/088 , H01L21/823425 , H01L23/66 , H01L24/48 , H01L24/49 , H01L27/0629 , H01L27/0635 , H01L2223/6644 , H01L2224/48227 , H01L2224/49111 , H01L2224/49171 , H01L2924/00014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/12041 , H01L2924/1305 , H01L2924/13091 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01P5/184 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A technique capable of promoting miniaturization of an RF power module used in a mobile phone etc. is provided. A directional coupler is formed inside a semiconductor chip in which an amplification part of the RF power module is formed. A sub-line of the directional coupler is formed in the same layer as a drain wire coupled to the drain region of an LDMOSFET, which will serve as the amplification part of the semiconductor chip. Due to this, the predetermined drain wire is used as a main line and the directional coupler is configured by a sub-line arranged in parallel to the main line via an insulating film, together with the main line.
摘要翻译：提供了一种能够促进移动电话等中使用的RF功率模块的小型化的技术。定向耦合器形成在其中形成RF功率模块的放大部分的半导体芯片内部。定向耦合器的子线形成在与作为半导体芯片的放大部分的LDMOSFET的漏极区域的漏极线相同的层中。由此，预定的漏极线用作主线，并且定向耦合器与主线一起经由绝缘膜与由主线平行布置的子线构成。

7. 发明授权

US08334580B2 Semiconductor chip comprising a directional coupler having a specific main line and sub-line arrangement 有权
标题翻译：半导体芯片包括具有特定主线和分线布置的定向耦合器
公开(公告)号：US08334580B2
公开(公告)日：2012-12-18
申请号：US11964217
申请日：2007-12-26
申请人： Satoshi Sakurai , Satoshi Goto , Toru Fujioka
发明人： Satoshi Sakurai , Satoshi Goto , Toru Fujioka
IPC分类号： H01L27/06 , H01L23/528
CPC分类号： H01L27/088 , H01L21/823425 , H01L23/66 , H01L24/48 , H01L24/49 , H01L27/0629 , H01L27/0635 , H01L2223/6644 , H01L2224/48227 , H01L2224/49111 , H01L2224/49171 , H01L2924/00014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/12041 , H01L2924/1305 , H01L2924/13091 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01P5/184 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A technique capable of promoting miniaturization of an RF power module used in a mobile phone etc. is provided. A directional coupler is formed inside a semiconductor chip in which an amplification part of the RF power module is formed. A sub-line of the directional coupler is formed in the same layer as a drain wire coupled to the drain region of an LDMOSFET, which will serve as the amplification part of the semiconductor chip. Due to this, the predetermined drain wire is used as a main line and the directional coupler is configured by a sub-line arranged in parallel to the main line via an insulating film, together with the main line.
摘要翻译：提供了一种能够促进移动电话等中使用的RF功率模块的小型化的技术。定向耦合器形成在其中形成RF功率模块的放大部分的半导体芯片内部。定向耦合器的子线形成在与作为半导体芯片的放大部分的LDMOSFET的漏极区域的漏极线相同的层中。由此，预定的漏极线用作主线，并且定向耦合器与主线一起经由绝缘膜与由主线平行布置的子线构成。

8. 发明申请

US20070193680A1 Backup board for machining process 失效
标题翻译：备用板加工工艺
公开(公告)号：US20070193680A1
公开(公告)日：2007-08-23
申请号：US11785649
申请日：2007-04-19
申请人： Kazunori Umeoka , Toru Fujioka , Hideuki Andou , Yuzo Okudaira
发明人： Kazunori Umeoka , Toru Fujioka , Hideuki Andou , Yuzo Okudaira
IPC分类号： B32B27/04
CPC分类号： H05K3/0047 , H05K2201/0278 , H05K2203/0156 , H05K2203/0214 , Y10T29/49126 , Y10T29/5105 , Y10T29/5107 , Y10T408/03 , Y10T408/36 , Y10T428/12444 , Y10T428/24994 , Y10T442/2738 , Y10T442/60 , Y10T442/652
摘要： A backup board for use in a machining process includes a fibrous layer, at least one side of the fibrous layer being provided with a surface layer adhered and laminated thereon, wherein the surface layer is made of a cured paper impregnated with a thermosetting resin. The fibrous layer has a density of about 600˜900 kg/m3 and includes kenaf fibers adhered together by impregnating a thermosetting adhesive into a fibrous mat of the kenaf fibers, the kenaf fibers having an average length of about 10˜200 mm and an average diameter of about 10˜300 μm.
摘要翻译：在加工过程中使用的备用板包括纤维层，纤维层的至少一侧设有粘附并层压在其上的表层，其中表面层由浸渍有热固性树脂的固化纸制成。纤维层的密度为约600〜900kg / m 3，包括通过将热固性粘合剂浸渍在洋麻纤维的纤维垫中而粘接在一起的洋麻纤维，所述洋麻纤维的平均长度约10〜200毫米，平均直径约10〜300毫米。

9. 发明申请

US20060255861A1 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US20060255861A1
公开(公告)日：2006-11-16
申请号：US11431534
申请日：2006-05-11
申请人： Hideyuki Ono , Toru Fujioka , Masahito Numanami
发明人： Hideyuki Ono , Toru Fujioka , Masahito Numanami
IPC分类号： H03F3/04
CPC分类号： H03F1/565 , H03F1/0205 , H03F1/301 , H03F1/3205 , H03F3/195 , H03F3/24 , H03F2200/222 , H03F2200/372 , H03F2200/387
摘要： The present invention is to provide a technique which optimizes a gate resistor of a bias circuit to thereby make it possible to greatly improve a distortion characteristic of a power amplifier. A bias circuit used as for biasing the gate of a final-stage power transistor is included in a power amplifier provided in a communication mobile system. In the bias circuit, an inductance and a resistor are series-connected between a power supply voltage and the gate of the power transistor. The resistance value of the resistor is set to approximately the same order as an input impedance of the power transistor. When the input impedance of the power transistor is about 10 Ω or so, for example, the resistor is set to about a few Ω to about 100 Ω. Thus, the gain of the power transistor at a low-frequency band can greatly be suppressed.
摘要翻译：本发明提供一种优化偏置电路的栅极电阻的技术，从而可以大大提高功率放大器的失真特性。用于偏置最后级功率晶体管的栅极的偏置电路包括在设置在通信移动系统中的功率放大器中。在偏置电路中，电源电压和电阻串联连接在电源电压和功率晶体管的栅极之间。电阻器的电阻值设定为大致与功率晶体管的输入阻抗相同的次数。当功率晶体管的输入阻抗为大约10欧姆左右时，例如，电阻器被设置为大约几欧姆到大约100欧姆。因此，可以大大抑制功率晶体管在低频带的增益。

10. 发明申请

US20080287090A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
标题翻译：半导体集成电路设备
公开(公告)号：US20080287090A1
公开(公告)日：2008-11-20
申请号：US12179716
申请日：2008-07-25
申请人： Hideyuki Ono , Toru Fujioka , Masahito Numanami
发明人： Hideyuki Ono , Toru Fujioka , Masahito Numanami
IPC分类号： H04B1/16
CPC分类号： H03F1/565 , H03F1/0205 , H03F1/301 , H03F1/3205 , H03F3/195 , H03F3/24 , H03F2200/222 , H03F2200/372 , H03F2200/387
摘要： The present invention is to provide a technique which optimizes a gate resistor of a bias circuit to thereby make it possible to greatly improve a distortion characteristic of a power amplifier. A bias circuit used as for biasing the gate of a final-stage power transistor is included in a power amplifier provided in a communication mobile system. In the bias circuit, an inductance and a resistor are series-connected between a power supply voltage and the gate of the power transistor. The resistance value of the resistor is set to approximately the same order as an input impedance of the power transistor. When the input impedance of the power transistor is about 10Ω or so, for example, the resistor is set to about a few Ω to about 100Ω. Thus, the gain of the power transistor at a low-frequency band can greatly be suppressed.
摘要翻译：本发明提供一种优化偏置电路的栅极电阻的技术，从而可以大大提高功率放大器的失真特性。用于偏置最后级功率晶体管的栅极的偏置电路包括在设置在通信移动系统中的功率放大器中。在偏置电路中，电源电压和电阻串联连接在电源电压和功率晶体管的栅极之间。电阻器的电阻值设定为大致与功率晶体管的输入阻抗相同的次数。当功率晶体管的输入阻抗大约为10万左右时，例如，电阻器被设定为大约几欧姆至大约100mega。因此，可以大大抑制功率晶体管在低频带的增益。

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