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1. 发明申请

US20190044341A1 ENERGY HARVESTER WITH MULTIPLE-INPUT MULTIPLE-OUTPUT SWITCHED-CAPACITOR (MIMOSC) CIRCUITRY 审中-公开
公开(公告)号：US20190044341A1
公开(公告)日：2019-02-07
申请号：US15939120
申请日：2018-03-28
申请人： Xiaosen Liu , Khondker Z. Ahmed , Vivek K. De , Nachiket V. Desai , Suhwan Kim , Harish K. Krishnamurthy , Turbo Majumder , Krishnan Ravichandran , Christopher Schaef , Vaibhav A. Vaidya , Sriram R. Vangal
发明人： Xiaosen Liu , Khondker Z. Ahmed , Vivek K. De , Nachiket V. Desai , Suhwan Kim , Harish K. Krishnamurthy , Turbo Majumder , Krishnan Ravichandran , Christopher Schaef , Vaibhav A. Vaidya , Sriram R. Vangal
IPC分类号： H02J3/38 , G05F1/67 , H02M3/156
摘要： In one embodiment, an energy harvesting system includes multiple-input-multiple-output switched-capacitor (MIMOSC) circuitry comprising a plurality of switched-capacitor circuit units to receive a plurality of direct current (DC) input voltages at respective input terminals of the switched-capacitor circuit unit, combine the received DC input voltages, and provide the combined DC input voltages at an output terminal of the switched-capacitor circuit unit. The energy harvesting system also includes maximum power point tracking (MPPT) circuitry coupled to switches of the switched-capacitor circuit units of the MIMOSC circuitry. The MPPT circuitry is to provide a plurality of switching signals to the switches of the switched-capacitor circuit units. The MIMOSC circuitry is to provide a plurality of DC output voltages to respective loads based on the switching signals from the MPPT circuitry.

2. 发明授权

US09151505B2 Door for oven and an oven 有权
标题翻译：炉门和烤箱
公开(公告)号：US09151505B2
公开(公告)日：2015-10-06
申请号：US13553732
申请日：2012-07-19
申请人： Suhwan Kim , Yungeon Baek , Byoungwoo Choi
发明人： Suhwan Kim , Yungeon Baek , Byoungwoo Choi
IPC分类号： F24C15/02
CPC分类号： F24C15/02
摘要： A door for an oven and the oven are provided. The door includes a door frame and a door panel where the door panel is coupled to the door frame. The door panel includes a front panel, a top panel bent from an upper end of the front panel to form a topside of the door, the top panel having a first bent portion spaced from the front panel to contact a top side of the door frame, and a pair of side panels, each side panel being bent from a lateral side of the front panel to form lateral sides of the door, and each side panel having a second bent portion spaced from the front panel to contact sides of the door frame.
摘要翻译：提供烤箱和烤箱门。门包括门框和门面板，门面板联接到门框。门板包括前板，顶板从前板的上端弯曲以形成门顶部，顶板具有与前板间隔开的第一弯曲部分，以接触门框的顶侧和一对侧板，每个侧板从前面板的侧面弯曲形成门的侧面，并且每个侧板具有与前板间隔开的第二弯曲部分，以与门框的侧面接触。

3. 发明授权

US08941627B2 Driving a light scanner 有权
标题翻译：驾驶光扫描仪
公开(公告)号：US08941627B2
公开(公告)日：2015-01-27
申请号：US12421672
申请日：2009-04-10
申请人： Jung Hwan Choi , Jung Hoon Seo , Suhwan Kim , Jae Wook Kwon , Jae Sung Kim
发明人： Jung Hwan Choi , Jung Hoon Seo , Suhwan Kim , Jae Wook Kwon , Jae Sung Kim
IPC分类号： G09G5/00 , G09G5/12 , H04N9/31 , G02B26/08
CPC分类号： G09G5/12 , G02B26/0833 , H04N9/3129 , H04N9/3155
摘要： Driving a light scanner at a resonant frequency of the light scanner using a phase delay compensated driving signal.
摘要翻译：使用相位延迟补偿驱动信号以光扫描器的谐振频率驱动光扫描器。

4. 发明申请

US20080231365A1 OPERATIONAL AMPLIFIER 失效
标题翻译：操作放大器
公开(公告)号：US20080231365A1
公开(公告)日：2008-09-25
申请号：US12053406
申请日：2008-03-21
申请人： Hyunjoong LEE , Young Sik KIM , Suhwan KIM
发明人： Hyunjoong LEE , Young Sik KIM , Suhwan KIM
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , H03F1/083 , H03F3/45654 , H03F3/45659 , H03F2200/153 , H03F2203/45302 , H03F2203/45354 , H03F2203/45512 , H03F2203/45652 , H03F2203/45681
摘要： An operational amplifier including an input amplifier configured to amplify at least one differential input signal, a first common mode feedback amplifier configured to amplify a first common mode voltage, a cascode amplifier configured to cascode-amplify output signals from the input amplifier and the first common mode feedback amplifier, a first common mode voltage generator configured to generate a central voltage of the output signal from the cascode amplifier and input the central voltage to the first common mode feedback amplifier, and a frequency compensator configured to feedback the output signal of the cascode amplifier to the first common mode feedback amplifier so as to compensate a frequency of the first common mode feedback amplifier.
摘要翻译：一种运算放大器，包括被配置为放大至少一个差分输入信号的输入放大器，被配置为放大第一共模电压的第一共模反馈放大器，被配置为对来自输入放大器和第一公共端的输出信号进行共源共放大的共源共栅放大器模式反馈放大器，第一共模电压发生器，其被配置为产生来自所述共源共栅放大器的输出信号的中心电压并将所述中心电压输入到所述第一共模反馈放大器;以及频率补偿器，被配置为反馈所述共源共栅的输出信号放大器到第一共模反馈放大器，以补偿第一共模反馈放大器的频率。

5. 发明申请

US20060064606A1 A METHOD AND APPARATUS FOR CONTROLLING POWER CONSUMPTION IN AN INTEGRATED CIRCUIT 审中-公开
标题翻译：一种用于控制集成电路中的功耗的方法和装置
公开(公告)号：US20060064606A1
公开(公告)日：2006-03-23
申请号：US10711485
申请日：2004-09-21
申请人： Suhwan Kim , Stephen Kosonocky , Peter Sandon
发明人： Suhwan Kim , Stephen Kosonocky , Peter Sandon
IPC分类号： G06F1/26
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3243 , G06F1/3293 , Y02D10/122 , Y02D10/126 , Y02D10/152
摘要： A method and apparatus for controlling power consumption by devices in an integrated circuit. The apparatus includes a complementary device for a corresponding device for which power consumption is desired to be reduced. The complementary device supports all or some of the tasks of the corresponding device. The complementary device receives tasks that can be executed by either itself or the corresponding device and based upon the power management scheme will either execute the task itself or allow the corresponding device.
摘要翻译：一种用于控制集成电路中的器件的功耗的方法和装置。该装置包括用于相应设备的补充设备，期望降低功耗。互补设备支持相应设备的全部或部分任务。互补设备接收可以由其自身或相应设备执行的任务，并且基于功率管理方案将执行任务本身或允许相应的设备。

6. 发明授权

US06876252B2 Non-abrupt switching of sleep transistor of power gate structure 有权
标题翻译：功率门结构睡眠晶体管的非突然切换
公开(公告)号：US06876252B2
公开(公告)日：2005-04-05
申请号：US10609360
申请日：2003-06-28
申请人： Suhwan Kim , Daniel R. Knebel , Stephen V. Kosonocky
发明人： Suhwan Kim , Daniel R. Knebel , Stephen V. Kosonocky
IPC分类号： H03K17/16 , H03K17/72
CPC分类号： H03K17/163 , H03K17/164
摘要： A semiconductor integrated circuit including a non-abrupt switching mechanism for a sleep transistor of a power gate structure to reduce ground bounce is provided. The semiconductor integrated circuit comprises a supply voltage line; a ground voltage line; a virtual ground voltage line; a logic circuit coupled to the supply voltage line and the virtual ground voltage line; at least one sleep transistor for controlling current flow to the logic circuit, the sleep transistor being coupled to the virtual ground voltage line and the ground voltage line; and a non-abrupt switching circuit for sequentially controlling the sleep transistor. The switching mechanism reduces the magnitude of voltage glitches on the power and ground rails as well as the minimum time required to stabilize power and ground.
摘要翻译：提供一种包括用于减少地面反弹的功率门结构的休眠晶体管的非突变切换机构的半导体集成电路。半导体集成电路包括电源电压线; 地电压线; 虚拟地电压线; 耦合到电源电压线和虚拟接地电压线的逻辑电路; 至少一个睡眠晶体管，用于控制到逻辑电路的电流，睡眠晶体管耦合到虚拟接地电压线和地电压线; 以及用于依次控制睡眠晶体管的非突变切换电路。开关机构可以减少电源和接地导轨上的电压毛刺的大小以及稳定电源和接地所需的最短时间。

7. 发明申请

US20190273439A1 REAL-TIME SWITCHING PERIOD ESTIMATION APPARATUS AND METHOD 审中-公开
公开(公告)号：US20190273439A1
公开(公告)日：2019-09-05
申请号：US16409562
申请日：2019-05-10
申请人： Nachiket Desai , Harish Krishnamurthy , Suhwan Kim
发明人： Nachiket Desai , Harish Krishnamurthy , Suhwan Kim
IPC分类号： H02M3/158 , H02M3/157 , H02M1/14 , G06F1/26
摘要： An apparatus is described which includes a delay-line with reasonably matched delay cells and some logic to ascertain both a correct number of DC-DC converters and interleaving angles or phase offsets. The apparatus measures an operating frequency in real-time in multiples of the individual delay cells of the delay-line. The smaller the period, the higher the load coupled to the DC-DC converters and, therefore the greater the number of DC-DC converters are needed to service the load. The period determines the load and can be used to determine the number of DC-DC converters needed and thereby accomplishing autonomous phase enabling/shedding.

8. 发明申请

US20120139584A1 DOMINO LOGIC CIRCUITS AND PIPELINED DOMINO LOGIC CIRCUITS 有权
标题翻译：多米尼加逻辑电路和管道多米诺逻辑电路
公开(公告)号：US20120139584A1
公开(公告)日：2012-06-07
申请号：US13234811
申请日：2011-09-16
申请人： Hyoung-Wook Lee , Gun-Ok Jung , Suhwan Kim , Ah-Reum Kim , Rahul Singh
发明人： Hyoung-Wook Lee , Gun-Ok Jung , Suhwan Kim , Ah-Reum Kim , Rahul Singh
IPC分类号： H03K19/096
CPC分类号： H03K19/0966
摘要： A domino logic circuit includes a first evaluation unit, a second evaluation unit and an output unit. The first evaluation unit precharges a first dynamic node, discharges a footer node in a first phase of a clock signal, and evaluates a plurality of input signals to determine a logic level of the first dynamic node in a second phase of the clock signal. The second evaluation unit precharges a second dynamic node in the first phase of the clock signal, and determines a logic level of the second dynamic node in response to a logic level of the footer node in the second phase of the clock signal. The output unit provides an output signal having a logic level according to levels of a first voltage of the first dynamic node and a second voltage of the second dynamic node.
摘要翻译：多米诺逻辑电路包括第一评估单元，第二评估单元和输出单元。第一评估单元对第一动态节点进行预充电，在时钟信号的第一阶段放电页脚节点，并且评估多个输入信号以在时钟信号的第二阶段中确定第一动态节点的逻辑电平。第二评估单元在时钟信号的第一阶段中对第二动态节点进行预充电，并且响应于时钟信号的第二阶段中的页脚节点的逻辑电平来确定第二动态节点的逻辑电平。输出单元提供具有根据第一动态节点的第一电压的电平和第二动态节点的第二电压的逻辑电平的输出信号。

9. 发明授权

US07714656B2 Operational amplifier 失效
标题翻译：运算放大器
公开(公告)号：US07714656B2
公开(公告)日：2010-05-11
申请号：US12053406
申请日：2008-03-21
申请人： Hyunjoong Lee , Young Sik Kim , Suhwan Kim
发明人： Hyunjoong Lee , Young Sik Kim , Suhwan Kim
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , H03F1/083 , H03F3/45654 , H03F3/45659 , H03F2200/153 , H03F2203/45302 , H03F2203/45354 , H03F2203/45512 , H03F2203/45652 , H03F2203/45681
摘要： An operational amplifier including an input amplifier configured to amplify at least one differential input signal, a first common mode feedback amplifier configured to amplify a first common mode voltage, a cascode amplifier configured to cascode-amplify output signals from the input amplifier and the first common mode feedback amplifier, a first common mode voltage generator configured to generate a central voltage of the output signal from the cascode amplifier and input the central voltage to the first common mode feedback amplifier, and a frequency compensator configured to feedback the output signal of the cascode amplifier to the first common mode feedback amplifier so as to compensate a frequency of the first common mode feedback amplifier.
摘要翻译：一种运算放大器，包括被配置为放大至少一个差分输入信号的输入放大器，被配置为放大第一共模电压的第一共模反馈放大器，被配置为对来自输入放大器和第一公共端的输出信号进行共源共放大的共源共栅放大器模式反馈放大器，第一共模电压发生器，其被配置为产生来自所述共源共栅放大器的输出信号的中心电压并将所述中心电压输入到所述第一共模反馈放大器;以及频率补偿器，被配置为反馈所述共源共栅的输出信号放大器到第一共模反馈放大器，以补偿第一共模反馈放大器的频率。

10. 发明申请

US20100096447A1 OPTICAL IDENTIFICATION TAG, READER AND SYSTEM 审中-公开
标题翻译：光学识别标签，读取器和系统
公开(公告)号：US20100096447A1
公开(公告)日：2010-04-22
申请号：US12530367
申请日：2008-03-07
申请人： Sunghoon Kwon , Youngjune Park , Suhwan Kim
发明人： Sunghoon Kwon , Youngjune Park , Suhwan Kim
IPC分类号： G06F17/00 , G06K7/10 , G06K19/07 , H04B10/00
CPC分类号： G06K19/0723 , G06K19/0728
摘要： The present invention relates to an optical identification tag, a reader, and a system, and more particularly, to an optical identification tag which transmits its identification information using energy input in an optical form, and an optical identification system and reader using the optical identification tag. The present invention provides an optical identification tag and an optical identification reader. The optical identification tag includes a solar cell for converting incident light into an electrical energy, a circuit for providing a transmitted electrical signal corresponding to identification information, and a light emitter for providing a transmitted optical signal corresponding to the transmitted electrical signal, and the optical identification reader provides the incident light to the optical identification tag, and receives the transmitted optical signal from the optical identification tag.
摘要翻译：光学识别标签，读取器和系统技术领域本发明涉及光学识别标签，读取器和系统，更具体地，涉及使用光学形式的能量输入来发送其识别信息的光学识别标签，以及使用光学识别的光学识别系统和读取器标签。本发明提供一种光学识别标签和光学识别读取器。光学识别标签包括用于将入射光转换为电能的太阳能电池，用于提供与识别信息相对应的透射电信号的电路，以及用于提供对应于所发射的电信号的透射光信号的光发射器，识别读取器将入射光提供给光学识别标签，并从光学识别标签接收所发送的光信号。

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