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1. 发明授权

US07557437B2 Fan out type wafer level package structure and method of the same 有权
标题翻译：扇出式晶圆级封装结构及其方法
公开(公告)号：US07557437B2
公开(公告)日：2009-07-07
申请号：US11946424
申请日：2007-11-28
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
IPC分类号： H01L23/02
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2224/82 , H01L2924/00
摘要： To pick and place standard dice on a new base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dice with a side by side structure or a stacking structure.
摘要翻译：在新的基础上选择和放置标准骰子，以获得骰子之间适当和更宽的距离，而不是晶片上骰子的原始距离。包装结构具有比通过扇出型包装的模具尺寸更大的球阵列尺寸。此外，管芯可以与被动部件或其他具有并排结构或堆叠结构的管芯封装。

2. 发明授权

US07196408B2 Fan out type wafer level package structure and method of the same 有权
标题翻译：扇出式晶圆级封装结构及其方法
公开(公告)号：US07196408B2
公开(公告)日：2007-03-27
申请号：US11301303
申请日：2005-12-12
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
IPC分类号： H01L23/02
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2224/82 , H01L2924/00
摘要： To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
摘要翻译：在新的基座上选择和放置标准模具，以获得模具之间适当和更宽的距离，而不是晶片上的模具的原始距离。包装结构具有比通过扇出型包装的模具尺寸更大的球阵列尺寸。此外，模具可以与被动部件或具有并排结构或堆叠结构的其它模具一起封装。

3. 发明授权

US6068129A Indicating adhesion status between substrate and encapsulant of a packaged electronic device 失效
标题翻译：指示封装的电子设备的衬底和密封剂之间的粘附状态
公开(公告)号：US6068129A
公开(公告)日：2000-05-30
申请号：US184262
申请日：1998-11-02
申请人： Shih-Li Chen
发明人： Shih-Li Chen
IPC分类号： B65D79/02 , B65D85/00
CPC分类号： B65D79/02
摘要： An indicator based on the present invention for indicating the adhesion status between a substrate and the encapsulation layer of a packaged electronic device is characterized in that at least one indicating pattern and one indicating region surrounding the indicating pattern are formed on the substrate, the adhesion between the indicating pattern and the encapsulant is very good while that between the indicating region and the encapsulant is relatively poor, both the indicating pattern and the indicating region are covered by molding encapsulant which is stripped off when having become hardening, thereby the status of the indicating pattern appearing after stripping off the encapsulant can indicate the adhesion quality (integration quality) between the encapsulation layer and the substrate. The indicator realizes a non-destructive quality checking process in which each electronic device can be checked to achieve one hundred percent of quality control.
摘要翻译：基于本发明的用于指示衬底和封装电子器件的封装层之间的粘附状态的指示器的特征在于，在衬底上形成至少一个指示图案和围绕指示图案的指示区域，指示图案和密封剂非常好，而指示区域和密封剂之间相对较差，指示图案和指示区域都被成型密封剂覆盖，该密封剂在变硬时被剥离，因此指示状态剥离密封剂后出现的图案可以表示封装层和基材之间的粘合质量（整合质量）。该指标实现了无损检测过程，其中可以检查每个电子设备以达到百分之百的质量控制。

4. 发明授权

US5851337A Method of connecting TEHS on PBGA and modified connecting structure 失效
标题翻译：在PBGA上连接TEHS的方法和改进的连接结构
公开(公告)号：US5851337A
公开(公告)日：1998-12-22
申请号：US885343
申请日：1997-06-30
申请人： Shih-Li Chen
发明人： Shih-Li Chen
IPC分类号： H01L23/31 , H01L23/34 , H01L23/433 , B32B31/00
CPC分类号： H01L23/34 , H01L23/3128 , H01L23/4334 , H01L2924/0002 , H01L2924/15311
摘要： A method for connecting TEHS to PBGA and a modified connecting structure for TEHS and PBGA are disclosed. The structure improves both heat dissipation efficiency of PBGA by TEHS with high heat conductivity and electrical performance of PBGA by TEHS which is electrically connected to the circuit in PBGA substrate. There are two methods of connecting TEHS to PBGA, including metallic soldering and nonmetallic adhesion. In the metallic soldering, the contact region of the TEHS is covered with a layer of solder tin and soldered to metallic contact region of the growing circuit in the substrate. In the nonmetallic adhesion, the metallic contact region of the growing circuit is covered with a layer of conductive resin. The TEHS is adhered and fixed to the metallic region by curing the conductive resin. Such two methods achieve that the TEHS is completely connected to the ground circuit in the substrate and the inductance of the whole device is reduced to decrease the noise which is generated by the inductance, and further to improve the quality of high speed transmission. Modified structures for soldering TEHS are also provided to reduce the concentration of stress.
摘要翻译：公开了一种用于将TEHS连接到PBGA的方法和用于TEHS和PBGA的改进的连接结构。该结构通过TEHS具有高导热性的PBGA和通过TEHS电连接到PBGA基板中的电路的TEHS的电性能来提高散热效率。连接TEHS与PBGA有两种方法，包括金属焊接和非金属粘附。在金属焊接中，TEHS的接触区域覆盖有一层焊锡，并焊接到衬底中生长电路的金属接触区域。在非金属粘合中，生长电路的金属接触区域覆盖有导电树脂层。通过固化导电树脂将TEHS粘附并固定到金属区域。这两种方法实现了TEHS完全连接到衬底中的接地电路，并且整个器件的电感被减小以降低由电感产生的噪声，并且进一步提高高速传输的质量。还提供用于焊接TEHS的改进结构以减少应力集中。

5. 发明申请

US20080105967A1 FAN OUT TYPE WAFER LEVEL PACKAGE STRUCTURE AND METHOD OF THE SAME 有权
标题翻译：风扇式水平包装结构及其方法
公开(公告)号：US20080105967A1
公开(公告)日：2008-05-08
申请号：US11946424
申请日：2007-11-28
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
IPC分类号： H01L23/48
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2224/82 , H01L2924/00
摘要： To pick and place standard dice on a new base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dice with a side by side structure or a stacking structure.
摘要翻译：在新的基础上选择和放置标准骰子，以获得骰子之间适当和更宽的距离，而不是晶片上骰子的原始距离。包装结构具有比通过扇出型包装的模具尺寸更大的球阵列尺寸。此外，管芯可以与被动部件或其他具有并排结构或堆叠结构的管芯封装。

6. 发明授权

US06236567B1 Electronic device package with enhanced heat dissipation effect 失效
标题翻译：电子器件封装具有增强的散热效果
公开(公告)号：US06236567B1
公开(公告)日：2001-05-22
申请号：US09453301
申请日：1999-12-03
申请人： Shih-Li Chen
发明人： Shih-Li Chen
IPC分类号： H05K720
CPC分类号： H01L23/36 , H01L23/4951 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/4826 , H01L2224/49175 , H01L2224/73215 , H01L2224/85399 , H01L2224/8592 , H01L2924/00014 , H01L2924/14 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： An electronic device package with enhanced heat dissipation effect comprises a lead frame and an outer frame with electrically insulating surface. The outer frame encloses the electronic device with a predetermined gap therebetween. The lead frame has a plurality of inner leads extending to the upper surface of the electronic device and a plurality of outer leads enclosing the outer surface of the outer frame. Each inner lead and each outer lead are linked by a slanting portion. The plurality of outer leads includes at least one ground outer lead with larger cross section area than other outer leads. Therefore, the heat generated by the electronic device can be conducted outside through the ground outer lead when the ground outer lead is connected to other device.
摘要翻译：具有增强的散热效果的电子器件封装包括引线框架和具有电绝缘表面的外框架。外框围住电子设备，其间具有预定的间隙。引线框架具有延伸到电子设备的上表面的多个内引线和包围外框的外表面的多个外引线。每个内部引线和每个外部引线通过倾斜部分连接。多个外引线包括至少一个接地外引线，其横截面面积大于其它外引线。因此，当将外部引线连接到其他设备时，电子设备产生的热量可以通过接地外部引线向外部传导。

7. 发明授权

US07667318B2 Fan out type wafer level package structure and method of the same 有权
标题翻译：扇出式晶圆级封装结构及其方法
公开(公告)号：US07667318B2
公开(公告)日：2010-02-23
申请号：US12255868
申请日：2008-10-22
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
IPC分类号： H01L23/12 , H01L23/053
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2224/82 , H01L2924/00
摘要： To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
摘要翻译：在新的基座上选择和放置标准模具，以获得模具之间适当和更宽的距离，而不是晶片上的模具的原始距离。包装结构具有比通过扇出型包装的模具尺寸更大的球阵列尺寸。此外，模具可以与被动部件或具有并排结构或堆叠结构的其它模具一起封装。

8. 发明申请

US20060033196A1 Package structure 有权
标题翻译：包装结构
公开(公告)号：US20060033196A1
公开(公告)日：2006-02-16
申请号：US10918416
申请日：2004-08-16
申请人： Wen-Kun Yang , Shih-Li Chen , Wen-Bin Sun , Ming-Hui Lin , Chao-Nan Chou , Chih-Wei Lin
发明人： Wen-Kun Yang , Shih-Li Chen , Wen-Bin Sun , Ming-Hui Lin , Chao-Nan Chou , Chih-Wei Lin
IPC分类号： H01L23/48
CPC分类号： H01L23/3114 , H01L23/3128 , H01L24/19 , H01L2224/05001 , H01L2224/05026 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05548 , H01L2224/12105 , H01L2924/01029 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3025 , H01L2924/00 , H01L2924/00014
摘要： A package structure including a device, an interconnecting element, a pad and a protecting element is provided. The device connects with a first end of the interconnecting element through the pad. The protecting element covers the pad and the first end of the interconnecting element.
摘要翻译：提供包括器件，互连元件，焊盘和保护元件的封装结构。该装置通过焊盘与互连元件的第一端连接。保护元件覆盖焊盘和互连元件的第一端。

9. 发明申请

US20050124093A1 Fan out type wafer level package structure and method of the same 有权
标题翻译：扇出式晶圆级封装结构及其方法
公开(公告)号：US20050124093A1
公开(公告)日：2005-06-09
申请号：US10725933
申请日：2003-12-03
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-Li Chen
IPC分类号： H01L23/12 , H01L21/44 , H01L21/48 , H01L21/50 , H01L21/58 , H01L21/60 , H01L23/00 , H01L23/14 , H01L23/31 , H01L23/48 , H01L23/485 , H01L23/52 , H01L23/522 , H01L23/538 , H01L23/552 , H01L25/065
CPC分类号： H01L21/561 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/15788 , H01L2924/19041 , H01L2224/82 , H01L2924/00
摘要： To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
摘要翻译：在新的基座上选择和放置标准模具，以获得模具之间适当和更宽的距离，而不是晶片上的模具的原始距离。包装结构具有比通过扇出型包装的模具尺寸更大的球阵列尺寸。此外，模具可以与被动部件或具有并排结构或堆叠结构的其它模具一起封装。

10. 发明授权

US07985626B2 Manufacturing tool for wafer level package and method of placing dies 有权
标题翻译：晶圆级封装的制造工具及放置模具的方法
公开(公告)号：US07985626B2
公开(公告)日：2011-07-26
申请号：US11158167
申请日：2005-06-20
申请人： Wen-Kun Yang , Wen-Pin Yang , Shih-li Chen
发明人： Wen-Kun Yang , Wen-Pin Yang , Shih-li Chen
IPC分类号： H01L21/44
CPC分类号： H01L21/6835 , H01L21/67132 , H01L2221/68354 , H01L2924/0002 , Y10T29/53178 , Y10T29/53191 , Y10T29/53274 , Y10T428/28 , H01L2924/00
摘要： A manufacturing method of placing dice for a wafer level package comprises placing a plurality of dice on an elastic material, which is formed on a first base, and the elastic material of the present invention has viscosity in a first condition to adhere the plurality of dice; forming an adhesive material on a second base; adhering the plurality of dice on the adhesive material of the second base; and stripping the plurality of dice from the elastic material in a second condition.
摘要翻译：将用于晶片级封装的晶片的制造方法包括将多个晶片放置在形成在第一基底上的弹性材料上，并且本发明的弹性材料在第一条件下具有粘度以粘附多个骰子 ; 在第二基底上形成粘合剂材料; 将多个骰子粘附在第二基座的粘合材料上; 以及在第二状态下从所述弹性材料剥离所述多个骰子。

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