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    • 5. 发明授权
    • Data display system having a multilevel video storage device
    • 具有多个视频存储设备的数据显示系统
    • US3964064A
    • 1976-06-15
    • US418154
    • 1973-11-21
    • Ruy L. BrandaoRobert A. Taylor, Jr.The Bendix Corporation
    • Ruy L. BrandaoRobert A. Taylor, Jr.The Bendix Corporation
    • G01S7/06G01S7/28G01S7/41G01S13/95G01S7/04
    • G01S7/2806G01S13/953G01S7/068G01S7/412
    • A radar return signal is analyzed by amplitude comparators so as to classify the radar return signal with respect to 2.sup.n -1 threshold levels to thus produce n parallel bits for each classification defining the instantaneous amplitude of the radar return signal. The bits in a given significant bit position (most significant, least significant, etc.) comprise a word which moves through the video storage device serially with respect to bits in the same significant bit position and in parallel with respect to bits in the word comprised of different significance bits. Input buffers in the form of n storage registers are provided, each storage register being associated with a particular bit significance. The bits are entered into their associated storage register at a rate dependent upon the desired radar range. The bits are optionally integrated on a bit-by-bit basis and then entered into a main memory having n circulating storage registers arranged in parallel. The information stored in the main memory is subsequently recalled and conveyed through output buffers for display on a cathode ray tube. The output buffers are comprised of n further storage registers. Each of these further storage registers is associated with a particular circulating storage register. The bits from a circulating storage register are conveyed to its associated further storage register. The bits in the output buffers are subsequently passed into a digital to analog converter, the output of the converter being applied to the cathode ray tube for display.
    • 8. 发明授权
    • Radar display system
    • 雷达显示系统
    • US4017853A
    • 1977-04-12
    • US595967
    • 1975-07-11
    • Ruy L. BrandaoRobert A. Taylor
    • Ruy L. BrandaoRobert A. Taylor
    • G01S7/06G01S9/02G11C8/00
    • G01S7/068
    • In a radar display system wherein radar return signals are received at a first rate and displayed at a second, usually higher rate, each radar return signal is digitized and used to update a main memory comprised of a random access memory so that the main memory contains information related to a plurality of radar return signals arranged therein in a logical order. The main memory information is continuously clocked out for display by an address counter which counts through two complete cycles in a first stage before incrementing a second stage so that the stored information related to each radar return signal is read out for display twice consecutively before the stored information related to the next radar return signal is read out for display.
    • 在雷达显示系统中,其中以第一速率接收雷达返回信号并以第二通常较高的速率显示,每个雷达返回信号被数字化并用于更新由随机存取存储器组成的主存储器,使得主存储器包含 与其中以逻辑顺序布置的多个雷达返回信号相关的信息。 主存储器信息通过地址计数器连续计时,以在增加第二级之前在第一级中计数两个完整周期,使得存储的与每个雷达返回信号相关的信息在存储之前被连续显示两次 读取与下一个雷达返回信号相关的信息以供显示。