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1. 发明授权

US08936750B2 Functionally graded cemented tungsten carbide with engineered hard surface and the method for making the same 有权
标题翻译：功能分级的硬质合金碳化钨与工程硬表面及其制造方法
公开(公告)号：US08936750B2
公开(公告)日：2015-01-20
申请号：US12621629
申请日：2009-11-19
申请人： Zhigang Z. Fang , Peng Fan , Jun Guo
发明人： Zhigang Z. Fang , Peng Fan , Jun Guo
IPC分类号： C22C1/05
CPC分类号： C22C29/08 , B22F3/1017 , B22F2207/05
摘要： A method of preparing a functionally graded cemented tungsten carbide material via heat treating a sintered cemented tungsten carbide is disclosed and described. The heat treating process comprises at least a step that heats the sintered material to the multi-phase non-equilibrium temperature range in which multiple phases including solid tungsten carbide, liquid metal binder, and solid metal binder coexist. Additionally, the material, after the heat treating process comprises a surface layer with lower metal binder content than the nominal value of metal binder content of the bulk of the material.
摘要翻译：公开并描述了通过热处理烧结的粘结碳化钨制备功能梯度的碳化钨材料的方法。热处理方法至少包括将烧结材料加热到多相非平衡温度范围的步骤，其中包括固体碳化钨，液态金属粘合剂和固体金属粘合剂的多相共存。此外，在热处理工艺之后的材料包括具有低于材料主体的金属粘结剂含量的标称值的较低金属粘合剂含量的表面层。

2. 发明授权

US08289725B2 Package substrate having embedded capacitor 有权
标题翻译：封装衬底具有嵌入式电容器
公开(公告)号：US08289725B2
公开(公告)日：2012-10-16
申请号：US12851795
申请日：2010-08-06
申请人： Chih-Peng Fan
发明人： Chih-Peng Fan
IPC分类号： H05K7/00
CPC分类号： H05K1/162 , H05K3/4602 , H05K3/4623 , H05K3/4644 , H05K2201/0355 , H05K2201/09536 , H05K2201/09763
摘要： A package substrate having embedded capacitor is provided. The package substrate includes a core circuit board, at least one dielectric layer, at least one embedded capacitor, and at least one metal layer. The core circuit board has at least one wiring layer, and the core circuit board has at least one conductive through hole connected to the wiring layer. At least one dielectric layer covers the wiring layer, and the dielectric layer has at least one conductive through hole. At least one embedded capacitor is embedded in the dielectric layer. At least one metal layer covers the dielectric layer and connected to the embedded capacitor, wherein the metal layer is connected to the wiring layer through the conductive through hole.
摘要翻译：提供具有嵌入式电容器的封装基板。封装衬底包括芯电路板，至少一个电介质层，至少一个嵌入式电容器和至少一个金属层。核心电路板具有至少一个布线层，并且核心电路板具有连接到布线层的至少一个导电通孔。至少一个电介质层覆盖布线层，电介质层具有至少一个导电通孔。至少一个嵌入式电容器嵌入电介质层。至少一个金属层覆盖电介质层并连接到嵌入式电容器，其中金属层通过导电通孔连接到布线层。

3. 发明授权

US08186049B2 Method of making a circuit structure 有权
标题翻译：制作电路结构的方法
公开(公告)号：US08186049B2
公开(公告)日：2012-05-29
申请号：US12181556
申请日：2008-07-29
申请人： Chih-Peng Fan , Yen-Ti Chia
发明人： Chih-Peng Fan , Yen-Ti Chia
IPC分类号： H05K3/02
CPC分类号： H05K1/111 , H01L2224/16225 , H05K3/108 , H05K3/243 , H05K3/3452 , H05K3/4007 , H05K2201/0367 , H05K2201/0989 , H05K2201/10674 , H05K2203/0574 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A manufacturing method of a circuit structure is provided as follows. Firstly, a base conductive layer is formed on the carrier board and a first patterned plating-resistant layer having at least one trench for exposing a part of the base conductive layer is formed on the base conductive layer. A first patterned conductive layer is then formed in the trench and a second patterned plating-resistant layer is formed which covers a part of the first patterned conductive layer and a part of the first patterned plating-resistant layer. A second patterned conductive layer is formed on the exposed first patterned conductive layer. The first and the second patterned plating-resistant layers and the base conductive layer exposed by the first patterned conductive layer are removed. Then, a patterned solder mask is formed for covering a part of the first patterned conductive layer.
摘要翻译：电路结构的制造方法如下所述。首先，在载体板上形成基底导电层，在基底导电层上形成具有至少一个露出基底导电层的一部分的沟槽的第一图案化电镀层。然后在沟槽中形成第一图案化导电层，并且形成覆盖第一图案化导电层的一部分和第一图案化电镀层的一部分的第二图案化电镀层。在暴露的第一图案化导电层上形成第二图案化导电层。去除第一和第二图案化电镀层和由第一图案化导电层暴露的基底导电层。然后，形成图案化的焊料掩模以覆盖第一图案化导电层的一部分。

4. 发明申请

US20110222024A1 ILLUMINATION SYSTEM FOR PROJECTION DISPLAY 审中-公开
标题翻译：投影显示照明系统
公开(公告)号：US20110222024A1
公开(公告)日：2011-09-15
申请号：US12723870
申请日：2010-03-15
申请人： Ho LU , Shih-Po Yeh , Peng-Fan Chen
发明人： Ho LU , Shih-Po Yeh , Peng-Fan Chen
IPC分类号： G03B21/28 , F21V1/00 , F21V9/00
CPC分类号： G03B21/14 , G02B27/102 , G02B27/148 , G03B21/2013 , G03B21/208 , G03B21/28 , H04N9/3164
摘要： An illumination system for a projection display is disclosed in the present invention. The illumination system has three light sources for providing three primary color rays, two collimators for collimating the rays into light beams, and two beam splitters for reflecting and passing the light beams to make white light available. It can also include three light sources, one collimator and three individual beam splitters. The illumination system has a compact size and low manufacturing cost. Its lighting efficiency is better than that of a conventional illumination system. Hence, it is suitable for small size projectors.
摘要翻译：在本发明中公开了一种用于投影显示器的照明系统。照明系统具有用于提供三原色光的三个光源，用于将光线准直为光束的两个准直器和用于反射和通过光束以使白光可用的两个分束器。它还可以包括三个光源，一个准直器和三个单独的分束器。照明系统尺寸紧凑，制造成本低。其照明效率优于常规照明系统。因此适用于小型投影机。

5. 发明申请

US20110091352A1 LIGHT METAL SOLID SOLUTION ALLOYS FOR HYDROGEN STORAGE 审中-公开
标题翻译：用于氢储存的轻金属固溶体合金
公开(公告)号：US20110091352A1
公开(公告)日：2011-04-21
申请号：US12757852
申请日：2010-04-09
申请人： Zhigang Z. Fang , Jun Lu , Peng Fan , Hong Yong Sohn , Young Joon Choi
发明人： Zhigang Z. Fang , Jun Lu , Peng Fan , Hong Yong Sohn , Young Joon Choi
IPC分类号： C22C28/00 , C22C1/00
CPC分类号： C22C24/00 , B22F1/0018 , B22F9/023 , B22F9/10 , B22F2009/041 , B82Y30/00 , C01B3/0031 , C01B6/04 , C01B6/24 , C01B6/243 , C22C1/1084 , C22C23/00 , C22C23/02 , Y02E60/327
摘要： A light metal solid solution alloy for reversible hydrogen storage can include a light metal solid solution alloy of M1 and M2. M1 and M2 are different and independently selected from the group consisting of Li, Mg, Al, Na, Be, and Si. Furthermore, the starting materials and formation conditions are chosen such that the resulting alloy has a hydrogenated state and a dehydrogenated state which are each solid solutions.
摘要翻译：用于可逆储氢的轻金属固溶体合金可以包括M1和M2的轻金属固溶体合金。 M1和M2不同且独立地选自Li，Mg，Al，Na，Be和Si。此外，选择起始材料和形成条件使得所得合金具有氢固态和脱氢状态，它们均为固溶体。

6. 发明授权

US07906200B2 Composite circuit substrate structure 有权
标题翻译：复合电路基板结构
公开(公告)号：US07906200B2
公开(公告)日：2011-03-15
申请号：US12424057
申请日：2009-04-15
申请人： Tzyy-Jang Tseng , Chih-Peng Fan
发明人： Tzyy-Jang Tseng , Chih-Peng Fan
IPC分类号： B32B9/00
CPC分类号： H05K3/045 , H05K1/036 , H05K1/0366 , H05K3/107 , H05K3/185 , H05K2201/0236 , H05K2201/029 , H05K2203/0723 , H05K2203/107 , Y10T428/24917 , Y10T428/24926
摘要： A composite circuit substrate structure includes a first dielectric layer, a second dielectric layer, a glass fiber structure, and a patterned circuit. The first dielectric layer has a first surface and a second surface opposite to each other. The second dielectric layer is disposed on the first dielectric layer and entirely connected to the first surface. The glass fiber structure is distributed in the second dielectric layer. The patterned circuit is embedded in the first dielectric layer from the second surface, and the patterned circuit is not contacted with the glass fiber structure.
摘要翻译：复合电路基板结构包括第一电介质层，第二电介质层，玻璃纤维结构和图案化电路。第一介电层具有彼此相对的第一表面和第二表面。第二电介质层设置在第一电介质层上并且完全连接到第一表面。玻璃纤维结构分布在第二电介质层中。图案化电路从第二表面嵌入第一电介质层中，并且图案化电路不与玻璃纤维结构接触。

7. 发明授权

US07772625B2 Image sensor having an RPO layer containing nitrogen 有权
标题翻译：具有含有氮的RPO层的图像传感器
公开(公告)号：US07772625B2
公开(公告)日：2010-08-10
申请号：US11548189
申请日：2006-10-10
申请人： Yao Hsiang Liang , Wen-Kung Cheng , Chen-Peng Fan , Ming-Hsien Chen , Richard Chen , Jung-Chen Yang , Wen-Yu Ho , Chao-Keng Li , Yong-Sin Chang , Labo Chang
发明人： Yao Hsiang Liang , Wen-Kung Cheng , Chen-Peng Fan , Ming-Hsien Chen , Richard Chen , Jung-Chen Yang , Wen-Yu Ho , Chao-Keng Li , Yong-Sin Chang , Labo Chang
IPC分类号： H01L31/09
CPC分类号： H01L27/14609 , H01L27/14643 , H01L27/14689
摘要： A semiconductor structure includes a transistor formed over a substrate. The transistor includes a transistor gate and at least one source/drain region. The semiconductor structure includes a pre-determined region coupled to the transistor. The semiconductor structure further includes a resist protection oxide (RPO) layer formed over the pre-determined region, wherein the RPO layer has a level of nitrogen of about 0.35 atomic % or less.
摘要翻译：半导体结构包括形成在衬底上的晶体管。晶体管包括晶体管栅极和至少一个源极/漏极区域。半导体结构包括耦合到晶体管的预定区域。半导体结构还包括形成在预定区域上的抗蚀剂保护氧化物（RPO）层，其中RPO层具有约0.35原子％或更低的氮含量。

8. 发明申请

US20100002196A1 PROJECTION SYSTEM 审中-公开
标题翻译：投影系统
公开(公告)号：US20100002196A1
公开(公告)日：2010-01-07
申请号：US12271366
申请日：2008-11-14
申请人： Ho Lu , Shih-Po Yeh , Tsung-Hsien Wu , Peng-Fan Chen
发明人： Ho Lu , Shih-Po Yeh , Tsung-Hsien Wu , Peng-Fan Chen
IPC分类号： G03B21/14
CPC分类号： G03B21/14 , G02B27/1053 , G02B27/1086 , G02B27/123 , G02B27/145 , G02B27/149 , G03B21/005 , G03B21/2033 , G03B33/14 , H04N9/3161
摘要： A projection system includes a multi-laser beam generator, a beam switching device, a split beam projecting device and a transmissive light valve. The multi-laser beam generator selectively generates a red beam, a green beam and a blue beam. The beam switching device receives the red, green and blue beams, splits the red, green and blue beams into a plurality of light beams of different angles, and directs the red, green and blue beams of the different angles into a common optical path. The split beam projecting device includes a plurality of micro-lenses. The transmissive light valve has a plurality of pixels for receiving the red, green and blue beams that are guided by the split beam projecting device. The red, green and blue beams of the different angles are received by the micro-lenses and guided onto the pixels of the transmissive light valve for imagining on the pixels.
摘要翻译：投影系统包括多激光束发生器，光束切换装置，分束投射装置和透射光阀。多激光束发生器选择性地产生红色光束，绿色光束和蓝色光束。光束切换装置接收红色，绿色和蓝色光束，将红色，绿色和蓝色光束分成多个不同角度的光束，并将不同角度的红色，绿色和蓝色光束引导到公共光路中。分束投影装置包括多个微透镜。透射光阀具有用于接收由分束投影装置引导的红色，绿色和蓝色光束的多个像素。不同角度的红色，绿色和蓝色光束由微透镜接收并被引导到透射光阀的像素上，用于想象像素。

9. 发明申请

US20060213778A1 Method for electrochemical plating on semiconductor wafers 审中-公开
标题翻译：半导体晶片电化学电镀方法
公开(公告)号：US20060213778A1
公开(公告)日：2006-09-28
申请号：US11089404
申请日：2005-03-23
申请人： Hsi-Kuei Cheng , Steven Lin , Chih-Chang Huang , Tzu-Ling Liao , Hsien-Ping Peng , Ming-Yuan Cheng , Ying-Jing Lu , Chieh-Tsao Wang , Ray Chuang , Chen-Peng Fan
发明人： Hsi-Kuei Cheng , Steven Lin , Chih-Chang Huang , Tzu-Ling Liao , Hsien-Ping Peng , Ming-Yuan Cheng , Ying-Jing Lu , Chieh-Tsao Wang , Ray Chuang , Chen-Peng Fan
IPC分类号： C25D5/18 , C25D5/02
CPC分类号： C25D5/18 , C25D5/02 , C25D7/123 , H01L21/2885
摘要： A method of electroplating conductive material on semiconductor wafers improves deposited film quality by providing greater control over the formation of the film grain structure. Better grain size control is achieved by applying a continuous DC plating current to the wafer which avoids sharp discontinuities in the current as the applied current is increased in successive stages during a plating cycle. Current discontinuities are avoided by gradually increasing the current in a ramp-like fashion between the successive plating stages.
摘要翻译：在半导体晶片上电镀导电材料的方法通过提供对薄膜晶粒结构的形成的更大控制来提高沉积膜质量。通过向晶片施加连续的直流电镀电流来实现更好的晶粒尺寸控制，其避免了在电镀循环期间的连续阶段中所施加的电流增加的电流中的尖锐的不连续性。通过在连续的电镀阶段之间以斜坡状的方式逐渐增加电流来避免电流不连续性。

10. 发明申请

US20050245064A1 Method for preventing voids in metal interconnects 有权
标题翻译：防止金属互连中空隙的方法
公开(公告)号：US20050245064A1
公开(公告)日：2005-11-03
申请号：US10835315
申请日：2004-04-28
申请人： Jung-Chih Tsao , Chi-Wen Liu , Si-Kua Cheng , Che-Tsao Wang , Steven Lin , Hsien-Ping Feng , Chen-Peng Fan
发明人： Jung-Chih Tsao , Chi-Wen Liu , Si-Kua Cheng , Che-Tsao Wang , Steven Lin , Hsien-Ping Feng , Chen-Peng Fan
IPC分类号： H01L21/00 , H01L21/4763 , H01L21/687 , H01L21/768
CPC分类号： H01L21/68728 , H01L21/67109 , H01L21/68707 , H01L21/76877
摘要： A novel method for preventing the formation of voids in metal interconnects fabricated on a wafer, particularly during a thermal anneal process, is disclosed. The method includes fabricating metal interconnects between metal lines on a wafer. During a thermal anneal process carried out to reduce electrical resistance of the interconnects, the wafer is positioned in spaced-apart relationship to a wafer heater. This spacing configuration facilitates enhanced stabilility and uniformity in heating of the wafer by reducing the presence of particles on and providing a uniform flow of heated air or gas against and the wafer backside. This eliminates or at least substantially reduces the formation of voids in the interconnects during the anneal process.
摘要翻译：公开了一种用于防止在晶片上制造的金属互连中空隙形成的新方法，特别是在热退火工艺期间。该方法包括在晶片上的金属线之间制造金属互连。在进行用于降低互连的电阻的热退火工艺期间，晶片以与晶片加热器隔开的关系定位。这种间隔结构通过减少加热的空气或气体抵靠和晶片背面的颗粒的存在而提高晶片加热的稳定性和均匀性。这在退火过程中消除或至少基本上减少了互连件中空隙的形成。

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